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1. 发明公开

KR1020110052112A 반도체 패키지의 제조 방법 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：KR1020110052112A
公开(公告)日：2011-05-18
申请号：KR1020090109027
申请日：2009-11-12
申请人： 삼성전기주식회사
发明人： 강준석 , 권영도 , 박승욱 , 이종윤 , 오경섭
IPC分类号： H01L23/48
CPC分类号： H01L23/5389 , H01L23/49827 , H01L24/24 , H01L24/82 , H01L2224/0231 , H01L2224/24226 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H05K1/185 , H05K2201/10674 , H05K2203/1469 , H01L2924/00
摘要： PURPOSE: A semiconductor package and manufacturing method thereof are provided to directly contact a via unit of a circuit board and install an electrode pattern unit for electrically connecting the semiconductor package with the via unit, thereby removing a separate bump forming process. CONSTITUTION: A groove(113) by which a semiconductor chip(120) is mounted on a metal core(112) is formed on a circuit board(110). An electrode pattern unit(130) is formed on the semiconductor chip by rewiring plating. A via unit(116) is formed on the circuit board to electrically connect the electrode pattern unit. The via unit is formed by filling a conductive material in a via hole(117). The semiconductor chip is inserted into the receiving space of the circuit board to electrically connect the via unit.
摘要翻译：目的：提供半导体封装及其制造方法，以直接接触电路板的通孔单元，并安装用于将半导体封装与通孔单元电连接的电极图案单元，从而去除单独的凸块形成工艺。构成：在电路板（110）上形成有用于将金属芯（112）上的半导体芯片（120）安装在其上的凹槽（113）。电极图案单元（130）通过重新布线形成在半导体芯片上。通孔单元（116）形成在电路板上以电连接电极图案单元。通孔单元是通过在通孔（117）中填充导电材料形成的。将半导体芯片插入到电路板的接收空间中以电连接通孔单元。

2. 发明公开

KR1020110045310A 웨이퍼 레벨 패키지의 제조방법 失效
标题翻译：制造水平包装的方法
公开(公告)号：KR1020110045310A
公开(公告)日：2011-05-04
申请号：KR1020090101823
申请日：2009-10-26
申请人： 삼성전기주식회사
发明人： 김홍원 , 강준석 , 정두성 , 문선희
IPC分类号： H01L23/28
CPC分类号： H01L23/562 , H01L21/568 , H01L23/3171 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2924/181 , H01L2924/18162 , H01L2924/3511 , H01L2924/00
摘要： PURPOSE: A method for manufacturing a wafer level package is provided to both compress and harden a protective layer to reduce hardening deformation of a protective layer, thereby suppressing warpage of the wafer level package. CONSTITUTION: A semiconductor die(101) is arranged in a carrier(102). A releasing layer(107) is formed between the carrier and the semiconductor die. A protective layer(104) is formed in the gap between semiconductor dies by a screen print method. The protective layer is hardened by heat. The protective layer is compressed and hardened.
摘要翻译：目的：提供一种制造晶片级封装的方法，以压缩和硬化保护层，以减少保护层的硬化变形，从而抑制晶片级封装的翘曲。构成：半导体管芯（101）布置在载体（102）中。在载体和半导体管芯之间形成释放层（107）。通过丝网印刷法在半导体管芯之间的间隙中形成保护层（104）。保护层通过加热硬化。保护层被压缩和硬化。

3. 发明公开

KR1020110028138A 반도체 칩 패키지 및 그의 제조방법 无效
标题翻译：半导体芯片封装及其制造方法
公开(公告)号：KR1020110028138A
公开(公告)日：2011-03-17
申请号：KR1020090086089
申请日：2009-09-11
申请人： 삼성전기주식회사
发明人： 이요석 , 심현섭 , 류종인 , 강준석
IPC分类号： H01L23/34 , H01L23/48
CPC分类号： H01L24/96 , H01L21/568 , H01L2224/12105 , H01L2224/19 , H01L2224/20 , H01L2924/181 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE: A semiconductor chip package and a method for manufacturing the same are provided to form an insulation layer and a solder resist layer of a semiconductor layer by a heat conductive low dielectric material, thereby increasing heat emitting effects of the semiconductor chip package. CONSTITUTION: A semiconductor chip(10) comprises an active surface(12) on which a chip pad(11) is formed. A heat conductive low dielectric molding film(20) exposes the active surface. An insulation layer(30) includes the first opening for exposing one area of the chip pad. A rewiring pattern(40) is electrically connected to the chip pad. A solder resist layer(50) comprises the second opening exposing one area of the rewiring pattern.
摘要翻译：目的：提供半导体芯片封装及其制造方法，通过导热性低介电材料形成半导体层的绝缘层和阻焊层，由此增加半导体芯片封装的散热效果。构成：半导体芯片（10）包括其上形成有芯片焊盘（11）的有源表面（12）。导热性低介电模塑薄膜（20）暴露活性表面。绝缘层（30）包括用于暴露芯片焊盘的一个区域的第一开口。重新布线图案（40）电连接到芯片焊盘。阻焊层（50）包括暴露重新布线图案的一个区域的第二开口。

4. 发明公开

KR1020100136174A 인캡슐화된 다이를 구비한 다이 패키지 및 그 제조방법 有权
标题翻译：具有封装的DIE包装及其制造方法
公开(公告)号：KR1020100136174A
公开(公告)日：2010-12-28
申请号：KR1020090054396
申请日：2009-06-18
申请人： 삼성전기주식회사
发明人： 강준석 , 권영도 , 김홍원 , 양,징리
IPC分类号： H01L23/28 , H01L21/60
CPC分类号： H01L23/5389 , H01L21/568 , H01L23/3107 , H01L23/3171 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2224/20 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00
摘要： PURPOSE: The bending generation by the difference of the coefficient of thermal expansion it is minimized and the reliability of the die package is improved. CONSTITUTION: The encapsulant layer(108) covers up the side of die. The encapsulant layer is up covered and if the support layer(110) is burned of die. The passivation layer(112) is formed in order to expose pad to the other side of die. The redistribution layer(114) is formed into the state where one end is connected to pad in the passivation layer to be expanded.
摘要翻译：目的：通过其热膨胀系数的差异的弯曲产生被最小化并且模具封装的可靠性得到改善。构成：密封剂层（108）覆盖模具的侧面。封装层被覆盖，并且如果支撑层（110）被烧死。形成钝化层（112）以将焊盘暴露于管芯的另一侧。再分配层（114）形成为其一端与钝化层中的焊盘连接以扩展的状态。

5. 发明授权

KR100986296B1 반도체 패키지 및 그 제조 방법 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：KR100986296B1
公开(公告)日：2010-10-07
申请号：KR1020080087908
申请日：2008-09-05
申请人： 삼성전기주식회사
发明人： 김운천 , 임순규 , 강준석
IPC分类号： H01L23/488 , H01L21/60 , H01L23/12 , H01L23/28
CPC分类号： H01L24/05 , H01L24/03 , H01L24/11 , H01L24/13 , H01L2224/03462 , H01L2224/0347 , H01L2224/0401 , H01L2224/05569 , H01L2224/05572 , H01L2224/1132 , H01L2224/11849 , H01L2224/131 , H01L2924/00013 , H01L2924/0002 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552
摘要： 반도체 패키지 및 그 제조 방법이 개시된다. 일면에 전도성 패턴(conductive pattern)이 형성된 기판(substrate), 기판의 일면에 형성되며 전도성 패턴이 노출되도록 관통홀이 형성되는 절연층, 일단이 전도성 패턴에 접하고 타단은 절연층으로부터 돌출되도록 관통홀에 형성되는 메탈 포스트(metal post), 및 메탈 포스트의 타단에 형성되는 솔더 범프(solder bump)를 포함하는 반도체 패키지(semiconductor package)는, 메탈 포스트와 솔더 범프 간의 접촉 면적이 증가되어, 이들 간의 접착력이 향상될 수 있다. 이에 따라, 반도체 패키지가 솔더 범프에 의하여 외부 장치에 접합된 후 반도체 패키지에 횡방향으로 작용하는 하중에 대한 저항력이 향상될 수 있다.
패키지, 메탈 포스트, 돌출

6. 发明公开

KR1020100090083A 웨이퍼 레벨 방열 패키지 및 그 제조방법 有权
标题翻译：用于其散热和制造方法的WAFER LEVEL PACKAGE
公开(公告)号：KR1020100090083A
公开(公告)日：2010-08-13
申请号：KR1020090009369
申请日：2009-02-05
申请人： 삼성전기주식회사
发明人： 강준석 , 이성 , 권영도
IPC分类号： H01L23/36 , H01L23/02
CPC分类号： H01L23/5389 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/4334 , H01L24/19 , H01L24/96 , H01L2224/05001 , H01L2224/05022 , H01L2224/05548 , H01L2224/12105 , H01L2924/00014 , H01L2924/01012 , H01L2924/01073 , H01L2924/10253 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/00 , H01L2224/05599
摘要： PURPOSE: A wafer level heat dissipation package and a manufacturing method thereof are provided to protect the backside of a die by mounting the die in the cavity of a heat sink plate and form a rewiring layer without an additional insulation layer by removing the height step of the heat sink plate and the die by using a support plate. CONSTITUTION: A heat sink plate(112) has a hole and a cavity for inserting a die. A die(108) has a pad mounted in the cavity of the heat sink plate with a face up type. A thermal conductive adhesive(118) is interposed between the die and the inner side of the cavity or the hole. One end of a rewiring layer(122) is connected to the pad and is extended to the die.
摘要翻译：目的：提供晶片级散热封装及其制造方法，以通过将模具安装在散热板的空腔中来保护模具的背面，并通过去除高温步骤形成不具有附加绝缘层的重新布线层散热板和模具通过使用支撑板。构成：散热板（112）具有用于插入模具的孔和空腔。模具（108）具有以面朝上型安装在散热板的空腔中的衬垫。导热粘合剂（118）插入在模具和空腔或孔的内侧之间。重新布线层（122）的一端连接到焊盘并延伸到管芯。

7. 发明公开

KR1020090070916A 반도체 장치 및 그 제조방법 无效
标题翻译：半导体器件及其制造方法
公开(公告)号：KR1020090070916A
公开(公告)日：2009-07-01
申请号：KR1020070139081
申请日：2007-12-27
申请人： 삼성전기주식회사
发明人： 양징리 , 권영도 , 강준석 , 백종환 , 박승욱 , 이종윤
IPC分类号： H01L21/60
CPC分类号： H01L24/05 , H01L24/03 , H01L24/11 , H01L24/13 , H01L2224/02313 , H01L2224/02351 , H01L2224/0236 , H01L2224/02377 , H01L2224/0332 , H01L2224/0401 , H01L2224/05548 , H01L2224/05567 , H01L2224/05572 , H01L2224/0579 , H01L2224/058 , H01L2224/11849 , H01L2224/13022 , H01L2224/131 , H01L2924/00013 , H01L2924/0002 , H01L2924/01019 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/00014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552
摘要： A semiconductor device and a manufacturing method thereof are provided to minimize a breakage of a solder bump due to difference of a thermal expansion coefficient by maximally distributing the stress concentrated on the solder bump when mounting the semiconductor device. A wafer(110) includes an electrode pad. An insulating layer(130) is formed in an upper side of the wafer. In the insulating layer, an exposure hole(131) exposing an electrode pad(120) is formed in one side. A support post unit with a buffer groove(132) is formed on the other side. A redistribution layer(140) is formed in the upper surface of the insulating layer. One end of the redistribution layer is connected to the electrode pad. The other end of the redistribution layer is extended to the support post unit. An encapsulation layer is formed in the upper surface of the redistribution layer and the insulating layer and exposes the redistribution layer formed in the support post unit. A solder bump(160) is equipped in the exposed part of the redistribution layer. The buffer layer is formed to surround the boundary of the support post unit.
摘要翻译：提供一种半导体器件及其制造方法，用于通过在安装半导体器件时最大限度地分布集中在焊料凸块上的应力，从而最小化由于热膨胀系数的差异导致的焊料凸块的破损。晶片（110）包括电极焊盘。绝缘层（130）形成在晶片的上侧。在绝缘层中，在一侧形成露出电极焊盘（120）的曝光孔（131）。在另一侧形成有具有缓冲槽（132）的支撑柱单元。在绝缘层的上表面形成再分布层（140）。再分配层的一端连接到电极焊盘。再分配层的另一端延伸到支撑柱单元。在再分配层和绝缘层的上表面形成封装层，并使形成在支撑柱单元中的再分布层露出。在再分布层的暴露部分中装备有焊锡凸块（160）。缓冲层形成为围绕支撑柱单元的边界。

8. 发明公开

KR1020080104748A 반도체 패키지 및 그 제조방법 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：KR1020080104748A
公开(公告)日：2008-12-03
申请号：KR1020070051965
申请日：2007-05-29
申请人： 삼성전기주식회사
发明人： 백종환 , 이성 , 도재천 , 권영도 , 박진선 , 강준석 , 황순욱 , 김선경
IPC分类号： H01L23/28
CPC分类号： H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/32145 , H01L2224/73267 , H01L2224/92144 , H01L2924/18162 , H01L2924/351 , H01L2924/00 , H01L2924/00012
摘要： According to the semiconductor package and manufacturing method thereof, the semiconductor chip is welded to the cooling fin with directly and it makes the thermal pathway short. The heat emission efficiency of the semiconductor package can be strengthened. The method for manufacturing a semiconductor package comprises as follows. A step is for contacting the one-side of the semiconductor chip(26) having the connection terminal(28) with the one-side of the cooling fin(20) having penetration hole(22). A step is for encapsulating the semiconductor chip by coating the insulating material(30) in the one-side of the cooling fin. A step is for being laminated the insulating layer(32) in the other side of the cooling fin. A step is for forming the first VIA(36) by punching the insulating layer and being electrically connected with the connection terminal.
摘要翻译：根据半导体封装及其制造方法，将半导体芯片直接焊接在散热片上，使热路短路。可以加强半导体封装的散热效率。半导体封装的制造方法如下。使具有连接端子（28）的半导体芯片（26）的一侧与具有贯通孔（22）的冷却翅片（20）的一侧接触的步骤。通过将绝缘材料（30）涂覆在冷却翅片的一侧来封装半导体芯片的步骤。步骤是将绝缘层（32）层压在冷却翅片的另一侧。通过冲压绝缘层并与连接端子电连接来形成第一VIA（36）的步骤。

9. 发明公开

KR1020080080782A 전자소자 패키지 및 그 제조방법 无效
标题翻译：电子元件封装及其制造方法
公开(公告)号：KR1020080080782A
公开(公告)日：2008-09-05
申请号：KR1020070020943
申请日：2007-03-02
申请人： 삼성전기주식회사
发明人： 백종환 , 이성 , 도재천 , 노재기 , 강준석 , 김선경
IPC分类号： H01L23/48
CPC分类号： H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/32245 , H01L2224/32257 , H01L2224/73267 , H01L2224/9222 , H01L2924/15151 , H01L2924/15153 , H01L2924/00012
摘要： An electronic component package and a method for manufacturing thereof are provided to simplify a process and to improve heat-radiating efficiency by molding an electronic element in a cavity of a heat-radiating plate. An electronic component is mounted on one surface of a first insulating layer(S110). An adhesive is coated on the electronic component(S120). A heat-radiating plate including a cavity is bonded with one surface of the first insulating layer to cover the electronic component(S130). A circuit pattern is formed on the other surface of the first insulating layer(S140). A plurality of air bents for penetrating the heat-radiating plate are formed in a bottom surface of the heat-radiating plate.
摘要翻译：提供一种电子元件封装及其制造方法，以简化工艺并通过将电子元件模制在散热板的空腔中来提高散热效率。电子部件安装在第一绝缘层的一个表面上（S110）。将粘合剂涂覆在电子部件上（S120）。包括空腔的散热板与第一绝缘层的一个表面接合以覆盖电子部件（S130）。在第一绝缘层的另一个表面上形成电路图案（S140）。在散热板的底面上形成有用于穿透散热板的多个空气弯针。

10. 发明授权

KR100401104B1 광 스위치 失效
标题翻译： 광스위치
公开(公告)号：KR100401104B1
公开(公告)日：2003-10-10
申请号：KR1020010077186
申请日：2001-12-07
申请人： 삼성전기주식회사
发明人： 홍윤식 , 강준석 , 윤상기 , 정성천 , 이정현 , 이현기
IPC分类号： G02B26/00
CPC分类号： G02B6/358 , B81B3/0054 , B81B2201/045 , B81B2203/053 , G02B6/3514 , G02B6/3546 , G02B6/357 , G02B6/3584 , G02B26/0841 , H02N1/006
摘要： Disclosed herein is an optical switch. The optical switch includes an electrostatic actuator and a substrate. The electrostatic actuator includes an electrostatic actuator, the electrostatic actuator comprising, a reciprocating mass located in the center of the electrostatic actuator, first rotating axes located symmetrically at the left and right sides of the reciprocating mass, first rotating masses rotatably connected to the first rotating axes, first rotating springs for supporting the first rotating masses, linear springs connected to the first rotating masses, second rotating masses connected to the linear springs, second rotating springs for supporting the second rotating masses, second rotating axes connected to the second rotating masses, structural anchors at the side ends of the actuator, drive electrodes, and a micro mirror movable by the same displacement as the reciprocating mass.
摘要翻译：这里公开了一种光学开关。光开关包括静电致动器和基板。所述静电致动器包括静电致动器，所述静电致动器包括位于所述静电致动器的中心的往复运动质量块，所述往复运动质量块的左侧和右侧对称地定位的第一旋转轴，可旋转地连接至所述第一旋转件的第一旋转质量块，用于支撑第一旋转质量的第一旋转弹簧，连接到第一旋转质量的线性弹簧，连接到线性弹簧的第二旋转质量，用于支撑第二旋转质量的第二旋转弹簧，连接到第二旋转质量的第二旋转轴，位于致动器侧端的结构锚定件，驱动电极以及可通过与往复运动质量相同位移移动的微镜。

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