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    • 1. 发明公开
    • 컨트롤러
    • CONTROLLER
    • KR1020130061096A
    • 2013-06-10
    • KR1020120137035
    • 2012-11-29
    • 르네사스 일렉트로닉스 가부시키가이샤
    • 무라까미히로시야마구찌유끼히꼬마끼세다꾸야
    • G05F1/56
    • G05F3/02H02M3/1584
    • PURPOSE: A controller is provided to prevent the generation of overshoot and undershoot when switching voltages without using two kinds of regulators. CONSTITUTION: Voltage regulators(30-1 to 30-n) supply a source voltage to a CPU(Central Processing Unit)(25). An SVID(Serial Voltage Identification) interface(14) receives a command changing the number of operating voltage regulators among the multiple voltage regulators from the outside. A phase clock generation part(21) changes the number of operating voltage regulators step by step from a current number to a number after the instructed change. [Reference numerals] (10) PMBUS interface; (14) SVID interface; (15) Sequence table register; (16) Motion mode register; (18) Voltage command value register; (19) Power state command value register; (20) DAC digital step control part; (21) Phase clock generation part; (26) Potential fixation part; (27) System control part; (3) Power supply failure detection part; (30-1,30-2,30-n) Voltage regulator; (4) Voltage comparator; (6) PIN control part; (7) Flash memory; (8) Parameter register; (9) Performance register; (AA) CPU voltage line; (BB) Serial communication line
    • 目的:提供控制器,以防止在不使用两种调节器的情况下切换电压时产生过冲和下冲。 构成:电压调节器(30-1至30-n)向CPU(中央处理器)提供源电压(25)。 SVID(串行电压识别)接口(14)从外部接收改变多个电压调节器中的工作电压调节器的数量的命令。 相位时钟生成部件(21)在指示的改变之后,将工作电压调节器的数量从当前数量逐步改变为数字。 (附图标记)(10)PMBUS接口; (14)SVID接口; (15)序列表寄存器; (16)运动模式寄存器; (18)电压指令值寄存器; (19)电源状态指令值寄存器; (20)DAC数字步进控制部分; (21)相位时钟发生部分; (26)电位固定部分; (27)系统控制部分; (3)电源故障检测部分; (30-1,30-2,30-n)稳压器; (4)电压比较器; (6)PIN控制部分; (7)闪存; (8)参数寄存器; (9)履约登记册; (AA)CPU电压线; (BB)串行通讯线