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    • 1. 发明公开
    • 필드 플레이트 구조를 가지는 전력 반도체 소자
    • 具有现场板结构的功率半导体器件
    • KR1020130040516A
    • 2013-04-24
    • KR1020110105340
    • 2011-10-14
    • (주) 트리노테크놀로지
    • 김수성
    • H01L29/78H01L21/336
    • H01L29/7395H01L29/66045H01L29/7393H01L29/772
    • PURPOSE: A power semiconductor device with a field plate structure is provided to implement a stable breakdown voltage property by suppressing the deterioration of a breakdown voltage even though charges are changed on an interface between a semiconductor substrate and an oxide layer. CONSTITUTION: A plurality of field limiting rings(121) are formed on one side of a semiconductor substrate. An interlayer dielectric layer(108) is formed on the upper side of the field limiting ring. A plurality of field plates(122) are formed on the upper side of the interlayer dielectric layer. In comparison with a bonding boundary side of an active region side of the corresponding field limiting ring, the end of an active region side of each field plate is closer to the active region to reduce the change of a breakdown voltage due to the change of an interfacial charge. [Reference numerals] (AA,BB) End region direction; (CC,DD) Active region direction; (EE) Formation end of a field plate; (FF) Formation end of a field limiting ring;
    • 目的:提供具有场板结构的功率半导体器件,以便即使在半导体衬底和氧化物层之间的界面上改变电荷,也可以通过抑制击穿电压的劣化来实现稳定的击穿电压特性。 构成:在半导体衬底的一侧上形成多个场限制环(121)。 层间介质层(108)形成在场限制环的上侧。 在层间电介质层的上侧形成有多个场板(122)。 与相应的限界环的有源区域侧的接合边界侧相比,每个场板的有源区域侧的端部更靠近有源区域,以减小由于其的变化引起的击穿电压的变化 界面电荷。 (附图标记)(AA,BB)端部区域方向; (CC,DD)有源区域方向; (EE)场板的形成端; (FF)场限制环的形成端;
    • 6. 发明公开
    • 수평형 초접합 전력 반도체 소자
    • 卧式超级结半导体器件
    • KR1020170041964A
    • 2017-04-18
    • KR1020150141234
    • 2015-10-07
    • (주) 트리노테크놀로지
    • 윤종만오광훈김수성정진영김은택
    • H01L29/06H01L29/739H01L29/78
    • 수평형초접합전력반도체소자가개시된다. 수평형초접합전력반도체소자는, 소스전극, 게이트전극및 드레인전극에대응하여전기적으로연결되기위해, 상기전력반도체소자의상부에위치되어, 제1 도전형웰, 상기제1 도전형웰의상부영역에형성되는소스영역및 드레인영역이형성되는트랜지스터층; 및상기트랜지스터층의하부에형성되는전하균형바디층을포함하되, 상기전하균형바디층에는제1 도전형의불순물영역인제1 도전형필러(pillar)와제2 도전형의불순물영역인제2 도전형필러가배치된다.
    • 公开了一种卧式超级结功率半导体器件。 水平超级结功率半导体器件中,源电极的上部区域,以相应地电连接到所述栅电极和漏电极,位于所述功率半导体器件的顶部,第一导电hyeongwel,第一导电hyeongwel 晶体管层,其中形成要形成的源极区和漏极区; 并包括:形成在所述晶体管层的下部的电荷平衡体层,所述电荷平衡体层已在西班牙在西班牙第二导电型柱的第一导电型杂质区域的第一导电型柱(柱)沃赫第二导电型杂质区域 它被设置。
    • 8. 发明公开
    • 전력 반도체 소자
    • 功率半导体器件
    • KR1020110052836A
    • 2011-05-19
    • KR1020090109523
    • 2009-11-13
    • (주) 트리노테크놀로지
    • 김수성오광훈
    • H01L29/772
    • H01L29/7823H01L29/408H01L29/7395
    • PURPOSE: A power semiconductor device is provided to prevent a depletion layer from being extended to a channel stopper by thinning an insulation layer on the end region than a withstand voltage maintaining region. CONSTITUTION: A gate pad electrode and an emitter electrode(210) are formed on an active region(110). A loop type field limiting ring(250) is arranged around an active region with a preset space. A channel stopper(265) is formed on the upper side of an N type semiconductor substrate(220). A field oxide layer is formed on the upper side of the channel stopper. A channel stopper electrode(270) is arranged on the upper side of the field oxide layer.
    • 目的:提供一种功率半导体器件,以防止耗尽层通过使端部区域上的绝缘层变薄而超过耐电压保持区域而延伸到沟道阻挡层。 构成:在有源区(110)上形成栅极焊盘电极和发射极(210)。 循环型场限制环(250)围绕具有预设空间的有源区域布置。 在N型半导体衬底(220)的上侧形成沟道限制器(265)。 在通道止动器的上侧形成场氧化物层。 沟道阻挡电极(270)布置在场氧化物层的上侧。