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21. 发明授权

KR100572313B1 디지털- 아날로그 변환기 失效
标题翻译：数字 - 模拟转换器
公开(公告)号：KR100572313B1
公开(公告)日：2006-04-19
申请号：KR1019990010298
申请日：1999-03-25
申请人： 삼성전자주식회사
发明人： 이광희
IPC分类号： H03M1/66
CPC分类号： H03M1/0604 , H03M1/687 , H03M1/745 , H03M1/747
摘要： 본 발명에 따른 디지털-아날로그 변환기는 전류 공급부와 전류-전압 변환부를 포함한다. 상기 전류 공급부는 복수 개의 전류 공급 회로들을 포함하며, 각 전류 공급 회로들은 외부로부터의 디지털 신호들에 상응하는 양들의 전류들을 상기 전류-전압 변환부로 공급한다. 특히, 본 발명에 따른 디지털-아날로그 변환기의 해상도를 높이기 위한 하위 비트의 전류 공급 회로들은 전류 분배 회로들을 이용하여 전원 전압으로부터의 전류를 분배하고 그리고 스위치 회로들을 이용하여 입력되는 디지털 신호들에 따라 전류 분배 회로들로부터의 전류들을 전류-전압 변환부로 전달한다. 이와 같은, 구조적 특징에 의해서 본 발명에 따른 전류 공급 회로들은 출력 신호의 전압 변화에 대해 일정한 양들의 전류들을 전류-전압 변환부로 공급한다. 이와 같이, 전류-전압 변환부로 안정된 일정한 양들을 가지는 전류들의 공급이 이루어짐으로써, 높은 해상도를 가지는 출력 신호가 출력된다.
摘要翻译：根据本发明的数字 - 模拟转换器包括电流供应单元和电流 - 电压转换单元。电流供应单元包括多个电流供应电路，并且每个电流供应电路将对应于来自外部的数字信号的量的电流供应给电流 - 电压转换单元。特别地，根据本发明的用于提高数模转换器的分辨率的低位电流供应电路使用电流分配电路分配来自电源电压的电流，并将电流从配电电路传输到电流 - 电压转换器。根据这样的结构特征，根据本发明的电流供应电路为输出信号的电压变化向电流 - 电压转换器提供一定量的电流。如上所述，通过向电流电压转换器提供具有稳定恒定量的电流，输出具有高分辨率的输出信号。

22. 发明公开

KR1020050026172A 전류 가산형 디지털/아날로그 컨버터 및 전류 가산형디지털/아날로그 변환방법 失效
标题翻译：电流型数字转换器和数字转换模数转换器
公开(公告)号：KR1020050026172A
公开(公告)日：2005-03-15
申请号：KR1020030063150
申请日：2003-09-09
申请人： 삼성전자주식회사
发明人： 문경태
IPC分类号： H03M1/76
CPC分类号： H03M1/687 , H03M1/0602 , H03M1/745 , H03M1/747
摘要： A current added digital/analog converter and a current added digital analog converting method are provided to reduce current consumption by using a current compensating circuit that compensates a current from a reference current source by sensing a part of an output current from a current source. A switch control signal generator(250) receives k-bit digital input signals and generates m+(2n-1) number of switch control signals. A current source unit(210) generates a first current signal and a second current signal that is 2m times in size of the first current signal. A first current supplier(220) generates m number of third current signals which have different weight factors of 2p(0
摘要翻译：提供了现有的附加数字/模拟转换器和电流相加的数字模拟转换方法，以通过使用电流补偿电路来减少电流消耗，所述电流补偿电路通过感测来自电流源的输出电流的一部分来补偿来自参考电流源的电流。开关控制信号发生器（250）接收k位数字输入信号并产生m +（2n-1）个开关控制信号。电流源单元（210）产生第一电流信号和第二电流信号，其大小为第一电流信号的2m倍。第一当前供应商（220）响应于第一电流信号产生m个具有不同的权重因子2p（0 <= p

23. 发明公开

KR1020040067501A 스큐 및 글리치가 적은 디지털 아날로그 변환장치 失效
标题翻译：数字/模拟转换器，用于减少脚和玻璃
公开(公告)号：KR1020040067501A
公开(公告)日：2004-07-30
申请号：KR1020030004627
申请日：2003-01-23
申请人： 삼성전자주식회사
发明人： 권대훈 , 조계옥 , 문재준
IPC分类号： H03M1/08
CPC分类号： H03M1/745
摘要： PURPOSE: A digital/analog converter for reducing a skew and a glitch is provided to reduce the skew and the glitch by maintaining constantly parasitic capacitance of a MOS transistor. CONSTITUTION: A digital/analog converter for reducing a skew and a glitch includes a current cell having the different amount of output and a current switch(210-240) for enabling selectively the current cell. The digital/analog converter for reducing the skew and the glitch further includes a MOS transistor. The MOS transistor has a controlled aspect ratio and a constant capacitive load regardless of the amount of the output current of the current cells. The skew and the glitch are reduced by the constant capacitive load when the current cells are turned on or turned off.
摘要翻译：目的：提供用于减少偏斜和毛刺的数字/模拟转换器，以通过保持MOS晶体管的恒定寄生电容来减少偏斜和毛刺。构成：用于减少偏斜和毛刺的数字/模拟转换器包括具有不同输出量的当前单元和用于选择性地使当前单元实现的电流开关（210-240）。用于减少偏斜和毛刺的数字/模拟转换器还包括MOS晶体管。 MOS晶体管具有受控的纵横比和恒定的电容性负载，而与当前单元的输出电流量无关。当电流单元导通或关闭时，歪斜和毛刺减小恒定的容性负载。

24. 发明公开

KR1020040034422A 유기 ＥＬ 소자 구동 회로 및 이 구동 회로를 이용한 유기ＥＬ 디스플레이 장치 失效
标题翻译：有机电致发光电路减少功耗和有机电致发光显示装置使用相同，特别降低功耗
公开(公告)号：KR1020040034422A
公开(公告)日：2004-04-28
申请号：KR1020030070973
申请日：2003-10-13
申请人： 로무 가부시키가이샤
发明人： 마에데준 , 아베시니치 , 후지카와아키오
IPC分类号： G09G3/30
CPC分类号： G09G3/3216 , G09G3/3283 , G09G2310/0251 , G09G2310/027 , G09G2330/021 , H03M1/745
摘要： PURPOSE: An organic electro-luminescence driving circuit and an organic electro-luminescence display device using the same are provided to reduce a power consumption due to resetting operations and peak currents. CONSTITUTION: An organic EL(Electro-Luminescence) element driving circuit includes a switch circuit, a peak current generator circuit(4), a reset inhibit circuit(6) and a determination unit. The switch circuit resets organic EL elements by setting anode sides of the organic EL elements to a predetermined potential through the terminal pins in the reset period. The peak current generator circuit generates a peak current overlapped on the driving currents of the organic EL elements. The reset inhibit circuit inhibits a resetting by the switch circuit and stops generation of the peak currents by the peak current generator circuit. The determination unit determines whether the driving current for the current display period is substantially the same as that in the display period of a next horizontal scan line. The reset inhibit circuit inhibits the resetting and stopping the generation of the peak current when the driving current for the display period of a current display period is substantially the same as that of a next horizontal scan line.
摘要翻译：目的：提供一种有机电致发光驱动电路和使用其的有机电致发光显示装置，以减少由复位操作和峰值电流引起的功耗。构成：有机EL（电致发光）元件驱动电路包括开关电路，峰值电流发生电路（4），复位禁止电路（6）和确定单元。开关电路通过在复位期间通过端子引脚将有机EL元件的阳极侧设定为规定的电位来复位有机EL元件。峰值电流发生器电路产生与有机EL元件的驱动电流重叠的峰值电流。复位禁止电路禁止开关电路的复位，并停止由峰值电流发生电路产生的峰值电流。确定单元确定当前显示周期的驱动电流是否与下一个水平扫描线的显示周期中的驱动电流基本相同。当当前显示周期的显示周期的驱动电流与下一个水平扫描线的驱动电流基本相同时，复位禁止电路禁止复位并停止产生峰值电流。

25. 发明公开

KR1020030086644A 코드 변환 장치, 디지털-아날로그 변환 장치, 그리고 지연동기 루프회로 失效
标题翻译：代码转换器，数字模拟转换器和DLL电路
公开(公告)号：KR1020030086644A
公开(公告)日：2003-11-12
申请号：KR1020020024738
申请日：2002-05-06
申请人： 삼성전자주식회사
发明人： 정인영
IPC分类号： H03M7/00
CPC分类号： H03M1/0687 , G11C7/16 , G11C7/22 , G11C7/222 , H03L7/0812 , H03L7/089 , H03M1/0863 , H03M1/664 , H03M1/745
摘要： PURPOSE: A code conversion device, a digital-analog conversion device, and a DLL circuit are provided to minimize the analog noise due to a change of a binary code by converting the binary code to an escalator code. CONSTITUTION: A code conversion device includes a difference detection block(120) and an escalator code generation block(140). The difference detection block(120) is used for detecting a difference between a previous binary input code and a present binary input code. The escalator code generation block(140) is used for generating an escalator code having a cash code and a coin code in response to the output of the difference detection block(120). A value of the cash code is increased proportionally to a value of the coin code when a value of the binary input code is increased. The value of the cash code is reduced proportionally to the value of the coin code when the value of the binary input code is reduced.
摘要翻译：目的：提供代码转换装置，数模转换装置和DLL电路，以通过将二进制代码转换为自动扶梯代码来最小化由于二进制代码的改变引起的模拟噪声。构成：代码转换装置包括差分检测块（120）和自动扶梯代码生成块（140）。差分检测块（120）用于检测先前二进制输入代码和当前二进制输入代码之间的差异。自动扶梯代码生成块（140）用于响应于差分检测块（120）的输出生成具有现金代码和硬币代码的自动扶梯代码。当二进制输入代码的值增加时，现金密码的值与硬币代码的值成正比地增加。当二进制输入代码的值减小时，现金代码的值与硬币代码的值成比例地减小。

26. 发明公开

KR1020030068433A 유기 ＥＬ 구동회로 및 이를 이용한 디스플레이 장치 失效
标题翻译：有机EL驱动电路及使用其的显示装置
公开(公告)号：KR1020030068433A
公开(公告)日：2003-08-21
申请号：KR1020030008692
申请日：2003-02-12
申请人： 로무 가부시키가이샤
发明人： 하나다고이치 , 시마다유지 , 후지사와마사노리
IPC分类号： G09G3/30
CPC分类号： G09G3/3283 , G09G2310/027 , G09G2340/0428 , H03M1/70 , H03M1/745
摘要： D/A 컨버터 회로의 입력측 구동 전류는 커런트 미러 형태로 연결된 복수개의 입력측 트랜지스터 중에서 적어도 하나와 직렬로 연결된 스위치에 의해 제어된다. 스위치 회로를 온 상태에서 오프 상태로 바꾸면, 스위치 회로에 의해 오프 상태가 되는 입력측 트랜지스터를 통해 흐르던 정전류가 나머지 입력측 트랜지스터들로 분산되어 흐르게 되고 그 결과 커런트 미러형으로 연결된 출력측 트랜지스터에 D/A 변환에 의해 발생한 큰 전류가 제공된다.
따라서 디스플레이 데이터의 값을 줄일 수 있고 그 결과 D/A 컨버터 회로의 비트 개수를 하나 이상 줄일 수 있게 된다.

27. 发明公开

KR1020000072961A 전류 세그먼트형 디지털-아날로그 변환기 无效
标题翻译：当前类型的数字模拟转换器
公开(公告)号：KR1020000072961A
公开(公告)日：2000-12-05
申请号：KR1019990015932
申请日：1999-05-03
申请人： 삼성전자주식회사
发明人： 백승범
IPC分类号： H03M1/66
CPC分类号： H03M1/745 , H03M2201/6372
摘要： PURPOSE: A digital-analog converter is provided which minimizes differential non-linearity error and integral non-linearity error. CONSTITUTION: A current segment type digital-analog converter includes a decoder, a selection control circuit, a current source circuit and a current compensation control circuit. The selection control circuit(110) generates signals for selecting current sources according to the output signal of the decoder. A current cell array(120) is configured of LSB binary current cells, MSB segment current cells and switch paris corresponding to the current cells. Odd-numbered switches(S1,S3,S5,S9,Sn-1) among the switch paris are connected to the current compensation control circuit(130) in common. The current compensation control circuit measures current provided by the selected current cells to determine the amount of current to be compensated. The output of the current compensation circuit enters the segment current cells to compensate for current.
摘要翻译：目的：提供数字模拟转换器，可最大限度地减少差分非线性误差和积分非线性误差。构成：当前段型数模转换器包括解码器，选择控制电路，电流源电路和电流补偿控制电路。选择控制电路（110）根据解码器的输出信号产生用于选择电流源的信号。当前单元阵列（120）由LSB二进制当前单元，MSB段当前单元和与当前单元相对应的开关代码配置。交换机中的奇数开关（S1，S3，S5，S9，Sn-1）共同地连接到电流补偿控制电路（130）。电流补偿控制电路测量由所选择的当前单元提供的电流以确定待补偿的电流量。电流补偿电路的输出进入段电流单元以补偿电流。

28. 发明授权

KR1019960013048B1 디지탈/아날로그변환기의오차보상회로 失效
标题翻译：数字/模拟转换器
公开(公告)号：KR1019960013048B1
公开(公告)日：1996-09-25
申请号：KR1019940010843
申请日：1994-05-17
申请人： 현대반도체 주식회사
发明人： 박용인
IPC分类号： H03M1/12
CPC分类号： H03M1/68 , H03M1/745 , H03M1/765
摘要： The error compensation circuit compensates the process variation using electric current to improve the density of a semiconductor. The circuit includes : a coarse bit decoder(10) outputting a driving control signal after decoding the upper M bits of a digital signal of K bits; a current scaler(20) outputting current according to the driving control signal; a current/voltage transformer(30) changing the current to a correspondent voltage; a voltage elevator(40) selecting and outputting a coarse bit step of the analog coarse bit step from the transformer(30); a voltage distributer(50) dividing the voltage by 2N and outputting the correspondent voltage of it; a current compensate unit(60) controlling the current supply; and a fine bit decoder(70) decoding the lower N bits of the digital signal of K bits to output a driving control signal as a switching control signal of the voltage distributer(50).
摘要翻译：误差补偿电路使用电流来补偿工艺变化，以提高半导体的密度。该电路包括：粗位比特解码器（10），在解码K比特的数字信号的高M比特之后输出驱动控制信号; 根据驱动控制信号输出电流的电流定标器（20）; 电流/电压变换器（30）将电流改变为对应电压; 电压电梯（40）从所述变压器（30）中选择并输出所述模拟粗位步长的粗位步骤; 电压分配器（50）将电压除以2N并输出其相应的电压; 控制电流供应的电流补偿单元（60）; 以及精细比特解码器（70），对K比特的数字信号的低N比特进行解码，以输出作为电压分配器（50）的切换控制信号的驱动控制信号。

29. 发明授权

KR1019930009435B1 디지탈/아날로그 변환기 失效
标题翻译：数字/模拟转换器
公开(公告)号：KR1019930009435B1
公开(公告)日：1993-10-04
申请号：KR1019860000168
申请日：1986-01-14
申请人： 코닌클리케 필립스 엔.브이.
发明人： 프란시스쿠스아드리아누스 , 마르티누스페트루스마리아 , 요브프란시스쿠스페트루스반밀 , 알베르트헨드리쿠스슬롬프
IPC分类号： H03M1/66
CPC分类号： H03M1/004 , H03M1/745
摘要： The currents (I3, I4, I5) of first current-source transistors (T3, T4, T5) constitute a binary weighted series of currents, which currents are each in a given ratio to a current (I1) which is applied to a reference transistor (T1). The currents (I3, I4, I5) from the first current-source transistors (T3, T4, T5) are switched to the analog output (15) or to the positive power-supply terminal (20) by means of first switching devices (3.1, 3.2, 3.3). The converter further comprises a control device (30), which comprises a second current-source transistor (T8), which is connected to a reference-current source (2) or to the positive power-supply terminal (20) by means of a second switching device (4). The current (I8) from the second current-source transistor (T8) has a given ratio to the current (I1) in the reference transistor (T1). If the second current-source transistor (T8) is connected to the positive power-supply terminal (20), the reference transistor (T1) will carry the full reference current (Iref) from the reference current source (2), and if the second current-source transistor (T8) is connected to the reference current source (2) the reference transistor (T1) will carry only a fraction of the reference current (Iref). As the currents (I3, I4, I5) from the first current-source transistors (T3, T4, T5) are in a given ratio to the current (I1) in the reference transistor (T1), these currents (I3, I4, I5) are a similar fraction smaller in the first case than in the second case. By increasing the current (I1) in the reference transistor (T1) stepwise from a fraction to the full reference current (Iref) over the range of the digital input code, the output current range of the converter will also vary stepwise.

30. 发明公开

KR1020160041638A 디지털 아날로그 컨버터 审中-实审
标题翻译：数字到模拟转换器
公开(公告)号：KR1020160041638A
公开(公告)日：2016-04-18
申请号：KR1020140136005
申请日：2014-10-08
申请人： 에스케이하이닉스 주식회사
发明人： 안창용 , 천준호
IPC分类号： H03M1/66
CPC分类号： H03M1/002 , H03M1/00 , H03M1/70 , H03M1/745 , H03M1/747
摘要： 기준전압을생성하는기준전압생성부; 및디지털코드에응답하여활성화되는개수가결정되는복수개의단위변환부를포함하고, 활성화된단위변환부는상기기준전압의전압레벨에대응하는전압레벨로제어노드를구동하고, 비활성화된단위변환부는상기제어노드를접지전압보다높은설정된전압레벨로유지시킨다.
摘要翻译：本发明是提供一种数模转换器来降低故障的可能性。数模转换器包括：产生参考电压的参考电压产生单元; 以及响应于数字代码来确定激活的单位转换单元的数量的多个单位转换单元。激活的单位转换单元将控制节点驱动在与参考电压的电压电平相对应的电压电平，并且非激活单元转换单元将控制节点保持在高于接地电压的设定电压电平。

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