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121. 发明授权

KR101831378B1 반도체 제조 장치 有权
公开(公告)号：KR101831378B1
公开(公告)日：2018-02-23
申请号：KR1020110049091
申请日：2011-05-24
申请人： 삼성전자주식회사
发明人： 한일영 , 권재성 , 박상욱 , 김원근
IPC分类号： H01L21/50
CPC分类号： H01L21/67115 , H01L21/67178 , H01L21/6719 , H05B6/80
摘要： 반도체제조장치가제안될수 있다. 상기반도체제조장치는밑면, 측벽, 및덮개를가지는챔버를포함할수 있다. 상기챔버의내부에조사유닛이배치될수 있다. 상기밑면과조사유닛사이에기판안착유닛이배치될수 있다. 상기조사유닛은하면이개방된디스크모양의중공형조사관, 및조사관의중앙을관통하는중앙홀을포함할수 있다.

122. 发明授权

KR101794066B1 플라즈마 공정 최적화 방법 有权
标题翻译：等离子体工艺优化法
公开(公告)号：KR101794066B1
公开(公告)日：2017-11-07
申请号：KR1020110088026
申请日：2011-08-31
申请人： 삼성전자주식회사
发明人： 박상욱 , 신경섭 , 백계현 , 이호기
IPC分类号： H01L21/205 , H01L21/3065 , H01L21/66
CPC分类号： H01J37/32972 , H01J37/32862
摘要： 본발명은시즈닝공정의재현성과생산성을향상시킬수 있는반도체제조설비및 그의시즈닝공정최적화방법을개시한다. 그의최적화방법은, 챔버내에서의플라즈마반응으로부터계측스펙트럼을획득하는단계와, 계측스펙트럼의일반화된계측스펙트럼과, 일반화된계측기준치를각각산출하는단계와, 상기일반화된계측스펙트럼과일반화된레퍼런스스펙트럼을비교하는단계와, 상기일반화된계측스펙트럼과상기일반화된레퍼런스스펙트럼이불 일치시에상기일반화된계측기준치와일반화된레퍼런스기준치를비교하여상기플라즈마반응의공정파라미터변경또는챔버의세정을판단하는단계를포함할수 있다.
摘要翻译：本发明涉及半导体制造设备和它的调料过程优化方法，该方法可以改善调料过程的可再现性和生产率。他的优化方法，包括以下步骤：从所述等离子体反应测量光谱eseoui腔室，其包括以下步骤：计算一个广义的测量光谱和测量光谱的，广义的测量参考值，分别为参考光谱广义和广义测量光谱一个比较步骤，确定所述测量广义光谱的清洁和公共参考光谱被子匹配的步骤中，当相比于广义和广义测量参考值改变或腔室中的等离子体的反应的参考标准的工艺参数你可以。

123. 发明公开

KR1020170106022A 영상 신호의 처리를 위한 전자 장치 审中-实审
标题翻译：一种用于处理视频信号的电子设备
公开(公告)号：KR1020170106022A
公开(公告)日：2017-09-20
申请号：KR1020160029593
申请日：2016-03-11
申请人： 삼성전자주식회사
发明人： 박상욱 , 이정원 , 정봉수 , 조성대 , 염동현 , 이창수
IPC分类号： G06T5/00 , H04N9/64 , G06T3/40
摘要： 전자장치가개시된다. 일실시예에따른전자장치는제1 색영역(color gamut)에맵핑된 HDR(high dynamic range) 영상신호를디코딩하는디코더, 제1 색영역보다좁은제2 색영역을지원하는디스플레이패널및 디코더및 디스플레이패널과전기적으로연결된프로세서를포함하고, 프로세서는, 디코딩에의해획득된디코딩신호에대하여 HDR 영상신호와연관된메타데이터및 제2 색영역에기초한영상처리를수행하고, 영상처리에의해획득된출력신호를디스플레이패널을통해출력하는 GPU(graphic processing unit) 또는 DSP(digital signal processor)이고, 디코딩신호의색 심도는 HDR 영상신호의색 심도보다낮을수 있다. 이외에도명세서를통해파악되는다양한실시예가가능하다.
摘要翻译：公开了一种电子设备。根据一个实施例的电子装置包括：第一色域（色域）显示HDR支持解码器，狭窄的第二色域比色域的视频信号（高动态范围）进行解码映射到面板和一个解码器，并且显示面板和电耦合到所述处理器，并且所述处理器，所述基于所述相关联的元数据和所述第二颜色区域和HDR视频信号由解码获得的解码信号中的图像处理，并且由图像处理输出获得的和GPU（图形处理单元）或DSP（数字信号处理器），用于输出从所述显示面板的信号，解码信号的颜色深度可以比HDR图像信号的颜色深度低。通过说明书已知的各种实施例也是可能的。

124. 发明授权

KR101718011B1 반도체 패키지 및 그 제조방법 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：KR101718011B1
公开(公告)日：2017-03-21
申请号：KR1020100107831
申请日：2010-11-01
申请人： 삼성전자주식회사
发明人： 박상욱 , 이종기 , 임원철
IPC分类号： H01L23/525 , H01L23/00
CPC分类号： H01L24/03 , H01L23/3114 , H01L24/19 , H01L24/20 , H01L24/92 , H01L24/96 , H01L24/97 , H01L2224/0231 , H01L2224/02311 , H01L2224/02375 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05548 , H01L2224/05553 , H01L2224/12105 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/83143 , H01L2224/83192 , H01L2224/92144 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1437 , H01L2924/15311 , H01L2924/3511 , H01L2224/83 , H01L2924/00
摘要： 본발명은반도체패키지및 그제조방법에관한것으로, 본딩패드를갖는반도체칩과, 상기반도체칩과전기적으로연결되며외부단자가접속되는단자를갖는금속배선과, 상기금속배선을덮어상기단자를정의하는개구를갖는절연막과, 그리고상기반도체칩을몰딩하는몰딩막을포함할수 있다. 상기몰딩막은상기본딩패드를노출시키며상기본딩패드로부터상기단자를향해연장된리세스패턴을포함할수 있다. 상기금속배선은상기리세스패턴내에임베드되어상기본딩패드와접속될수 있다.
摘要翻译：本发明定义了终端涉及一种半导体封装件及其制造的方法，和具有键合焊盘的半导体芯片，并电连接到半导体芯片覆盖所述外部端子被连接在金属布线和具有末端的金属布线，其和用于模制半导体芯片的模制膜。模制膜可以包括暴露键合焊盘并从键合焊盘向端子延伸的凹陷图案。金属布线可以嵌入在凹陷图案中并且连接到键合焊盘。

125. 发明授权

KR101678054B1 반도체 패키지 및 그 반도체 패키지 제조방법 有权
标题翻译：用于制造封装的半导体封装和方法
公开(公告)号：KR101678054B1
公开(公告)日：2016-11-22
申请号：KR1020100061266
申请日：2010-06-28
申请人： 삼성전자주식회사
发明人： 이종기 , 박상욱 , 홍지석
IPC分类号： H01L21/60 , H01L21/56
CPC分类号： H01L24/19 , H01L21/561 , H01L21/568 , H01L23/3114 , H01L23/5389 , H01L24/20 , H01L24/96 , H01L25/0655 , H01L2224/12105 , H01L2224/2101 , H01L2224/211 , H01L2224/215 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00
摘要： 본발명의사상은 PCB 없는반도체패키지에있어서, 기존범프및 재배선을위한포토공정의적용없이무범프(Bumpless) 패드위에프린팅공정만으로패턴을형성함으로써, TAT(Turn Around Time)을향상시키고, 저비용으로구현할수 있는반도체패키지, 그반도체패키지를포함한전기전자장치, 및그 반도체패키지제조방법을제공한다. 그반도체패키지는패드가형성되어있는반도체칩; 상기반도체칩을밀폐시키되, 상기반도체칩의상기패드가형성되어있는제1 면을노출시키는밀봉재; 상기제1 면의소정부분과상기제1 면으로부터연장된상기밀봉재상면의소정부분상에형성되고, 상기패드에바로콘택되어있는메탈배선; 및상기메탈배선및 상기메탈배선이형성되지않은상기제1 면과상기밀봉재상면을덮으며, 상기메탈배선의소정부분을노출시키는개구부들이형성되어있는솔더레지스트(Solder Resist: SR);를포함한다.

126. 发明公开

KR1020130118175A 반도체 패키지 및 그의 제조 방법 无效
标题翻译：半导体封装及其制造方法
公开(公告)号：KR1020130118175A
公开(公告)日：2013-10-29
申请号：KR1020120041167
申请日：2012-04-19
申请人： 삼성전자주식회사
发明人： 윤성환 , 박상욱 , 김형섭
IPC分类号： H01L23/12 , H01L23/48
CPC分类号： H01L23/49811 , H01L23/3128 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/04026 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/0566 , H01L2224/0568 , H01L2224/131 , H01L2224/13294 , H01L2224/133 , H01L2224/16225 , H01L2224/29294 , H01L2224/293 , H01L2224/32145 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2224/83851 , H01L2224/92225 , H01L2224/97 , H01L2225/0651 , H01L2225/06548 , H01L2225/06562 , H01L2924/15311 , H01L2924/181 , H01L2924/014 , H01L2924/00012 , H01L2924/00 , H01L2224/83 , H01L2224/81
摘要： PURPOSE: A semiconductor package and a manufacturing method thereof are provided to prevent the degradation of structural stability due to the loads of semiconductor chips which are offset and laminated on a circuit board by forming a supporting structure. CONSTITUTION: A circuit board (100) includes a first signal pad and a second signal pad. A first semiconductor chip (200A) is mounted on one surface of the circuit board. A second semiconductor chip (200B) is offset and laminated on the first semiconductor chip. A supporting structure (300) is located between the second signal pad and a second input and output pad and includes a bottom pad (330), a top pad (310), an insulating body (320), and a conductive pillar (340). The conductive pillar passes through the insulating body and electrically connects the bottom pad to the top pad.
摘要翻译：目的：提供半导体封装及其制造方法，以防止由于通过形成支撑结构而偏移并层压在电路板上的半导体芯片的负载导致的结构稳定性的劣化。构成：电路板（100）包括第一信号焊盘和第二信号焊盘。第一半导体芯片（200A）安装在电路板的一个表面上。第二半导体芯片（200B）被偏置并层压在第一半导体芯片上。支撑结构（300）位于第二信号焊盘和第二输入和输出焊盘之间，并且包括底焊盘（330），顶焊盘（310），绝缘体（320）和导电柱（340）。导电柱通过绝缘体并将底垫电连接到顶垫。

127. 发明公开

KR1020130008826A 스테이지 장치 无效
标题翻译：阶段装置
公开(公告)号：KR1020130008826A
公开(公告)日：2013-01-23
申请号：KR1020110069446
申请日：2011-07-13
申请人： 삼성전자주식회사
发明人： 장상돈 , 박상욱 , 장인배 , 김의석
IPC分类号： H01L21/683 , B23Q1/25 , H01L21/027 , G03F7/20
CPC分类号： G01B5/0004 , G01B11/002 , B23Q1/25 , G03F7/70716 , G03F7/70775 , H01L21/0274 , H01L21/6831
摘要： PURPOSE: A stage apparatus is provided to accurately measure the position of a stage by using an interferometer system. CONSTITUTION: A stage(12) has a covering range. An interferometer(41,42) and a fixing mirror(51,52,53) are installed at the outside of the stage. A first movement mirror is arranged in the stage. The light coming from the interferometer is reflected in the first movement mirror to the fixing mirror. The light reflected in the fixing mirror is reflected in the interferometer.
摘要翻译：目的：提供一种舞台装置，通过使用干涉仪系统精确测量舞台的位置。规定：舞台（12）有覆盖范围。干燥器（41,42）和固定反射镜（51,52,53）安装在平台的外侧。第一运动镜布置在舞台上。来自干涉仪的光在第一移动镜中反射到固定镜。在定影镜中反射的光被反射在干涉仪中。

128. 发明公开

KR1020120130968A 반도체 제조 장치 审中-实审
标题翻译：制造半导体器件的设备
公开(公告)号：KR1020120130968A
公开(公告)日：2012-12-04
申请号：KR1020110049091
申请日：2011-05-24
申请人： 삼성전자주식회사
发明人： 한일영 , 권재성 , 박상욱 , 김원근
IPC分类号： H01L21/50
CPC分类号： H01L21/67115 , H01L21/67178 , H01L21/6719 , H05B6/80 , H01L21/50 , H01L21/64 , H01L21/67
摘要： PURPOSE: An apparatus for manufacturing a semiconductor is provided to maintain a cleaning period to be long by absorbing microwaves which are reflected from a processing chamber. CONSTITUTION: A chamber comprises a bottom plane, a sidewall, and a cover(20). An irradiation unit(180) is located inside the chamber. A substrate mounting unit(30) is arranged between the bottom plane and the irradiation unit. An irradiation tube is formed into a disk shape with an opening lower side. A center hole passes through the center of the irradiation tube.
摘要翻译：目的：提供一种用于制造半导体的装置，通过吸收从处理室反射的微波来保持清洁周期较长。构成：室包括底平面，侧壁和盖（20）。照射单元（180）位于室内。衬底安装单元（30）布置在底平面和照射单元之间。照射管形成为具有开口下侧的盘状。中心孔穿过照射管的中心。

129. 发明公开

KR1020120048414A 반도체 칩의 제조 방법 有权
标题翻译：制造半导体芯片的方法
公开(公告)号：KR1020120048414A
公开(公告)日：2012-05-15
申请号：KR1020100110032
申请日：2010-11-05
申请人： 삼성전자주식회사
发明人： 박상욱 , 정태경 , 송호건 , 임원철
IPC分类号： H01L21/782 , H01L25/065
CPC分类号： H01L21/78 , H01L25/0657 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/73265 , H01L2225/06562 , H01L2924/15311 , H01L2924/181 , H01L21/782 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE: A method for manufacturing a semiconductor chip is provided to control the generation of a crack site by eliminating layer which is damaged due to laser and to form a plurality of circuit regions on a semiconductor substrate. CONSTITUTION: A semiconductor substrate(100) including circuit regions(102) is prepared. A protection sheet(108) is attached to the front side of the semiconductor substrate. A damaged layer is formed by irradiating the inner side of the semiconductor substrate with laser. A semiconductor chip(112) is formed by polishing the semiconductor substrate and respectively dividing the circuit regions. The damage layer is eliminated while polishing the semiconductor substrate. The semiconductor substrate comprises a scribe lane which isolates the circuit regions. The scribe lane comprises a region in which metal patterns are formed.
摘要翻译：目的：提供一种制造半导体芯片的方法，通过消除由于激光而损坏的层并且在半导体衬底上形成多个电路区域来控制裂纹位置的产生。构成：制备包括电路区域（102）的半导体衬底（100）。保护片（108）附接到半导体衬底的正面。通过用激光照射半导体衬底的内侧形成损伤层。半导体芯片（112）通过对半导体衬底进行抛光并分别划分电路区域而形成。在抛光半导体衬底时消除损伤层。半导体衬底包括隔离电路区域的划线。划线通道包括形成金属图案的区域。

130. 发明公开

KR1020120045936A 반도체 패키지 및 그 제조방법 有权
标题翻译：半导体封装及其相关方法
公开(公告)号：KR1020120045936A
公开(公告)日：2012-05-09
申请号：KR1020100107831
申请日：2010-11-01
申请人： 삼성전자주식회사
发明人： 박상욱 , 이종기 , 임원철
IPC分类号： H01L23/525 , H01L23/00
CPC分类号： H01L24/03 , H01L23/3114 , H01L24/19 , H01L24/20 , H01L24/92 , H01L24/96 , H01L24/97 , H01L2224/0231 , H01L2224/02311 , H01L2224/02375 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05548 , H01L2224/05553 , H01L2224/12105 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/83143 , H01L2224/83192 , H01L2224/92144 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1437 , H01L2924/15311 , H01L2924/3511 , H01L23/525 , H01L2224/83 , H01L2924/00
摘要： PURPOSE: A semiconductor package and a manufacturing method thereof are provided to improve solder bonding reliability by increasing contact area between a solder ball and a metal wiring. CONSTITUTION: A semiconductor chip includes a bonding pad(13). A metal wiring is electrically connected to the semiconductor chip. The metal wiring includes a terminal for connecting an external terminal. An insulating film(17) has an opening part for defining the terminal by covering the metal wiring. A molding film(110) molds the semiconductor chip. The molding film comprises a recess pattern which is extended toward the terminal from the bonding pad while exposing the bonding pad. The metal wiring is connected to the bonding pad by being embedded within the recess pattern.
摘要翻译：目的：提供半导体封装及其制造方法，以通过增加焊球和金属布线之间的接触面积来提高焊接接合可靠性。构成：半导体芯片包括焊盘（13）。金属布线与半导体芯片电连接。金属布线包括用于连接外部端子的端子。绝缘膜（17）具有用于通过覆盖金属布线来限定端子的开口部分。模制薄膜（110）模制半导体芯片。该成型膜包括凹槽图案，该露出图案在接合焊盘暴露的同时从接合焊盘向端子延伸。金属布线通过嵌入凹槽图案中而与接合焊盘连接。

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