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1. 发明专利

JP2001093987A NEW CMOS CIRCUIT OF GaAs/Ge ON SI SUBSTRATE 失效
公开(公告)号：JP2001093987A
公开(公告)日：2001-04-06
申请号：JP2000230590
申请日：2000-07-31
申请人： ST MICROELECTRONICS INC
发明人： GAO GUANG-BO , HOANG HOANG HUY
IPC分类号： H01L21/762 , H01L21/316 , H01L21/76 , H01L21/8238 , H01L21/8258 , H01L27/06 , H01L27/092 , H01L29/38 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To improve the speed of a semiconductor integrated circuit utilizing the electrical characteristics of a different substance. SOLUTION: By utilizing high electron mobility for GeAs in an N-channel device and a high hole mobility for Ge in a P-channel device, a CMOS integrated circuit with GaAs/Ge is formed on an Si for improving the switching (propagation) delay of a transistor. A semi-insulation (non-doped) layer 102b of GaAs is formed on a silicon base 102a for giving a buffer layer, thus eliminating the possibility of latch-up. Then, a GaAs well 106 and a Ge well 110 are formed on the semi-insulation GaAs layer 102b for electrical isolation by thermal oxide and/or flowing oxide (HSQ) 112. By forming an N-channel MOS device 114 and a P-channel MOS device 116 in the GaAs well 106 and the Ge well 110, respectively, an integrated circuit is formed by interconnection.

2. 发明专利

JPH05175144A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH05175144A
公开(公告)日：1993-07-13
申请号：JP34455591
申请日：1991-12-26
申请人： FUJITSU LTD
发明人： HIROSE TATSUYA
IPC分类号： H01L21/203 , H01L21/20 , H01L21/205 , H01L29/38
摘要： PURPOSE:To suppress the mutual diffusion of elements constituting adjacent semiconductor layers in a semiconductor device having a structure, in which III-V compound semiconductor layer or IIVI compound semiconductor layer and group TV elements semiconductor layer are laminated by crystal growth techniques such as MBE, MOCVD and MOVPE, and the manufacture of the semiconductor device. CONSTITUTION:Atom diffusion suppression layers 3, 5 of Si, etc., for suppressing the mutual diffusion of atoms constituting III-V compound semiconductor layer of GaAs, GaSb, ZnSe, etc., and II-VI compound semiconductor layer 2, 6 and group IV elements semiconductor layer 4 of Ge, Sn, etc., are inserted into the interface between the compound semiconductor layer 2 or 6 and the elements semiconductor layer 4 and the crystal structure and electrical property of adjacent semiconductor layers are smoothly connected by the atom diffusion suppression layers 3, 5 so that the characteristics of the title semiconductor device are improved.

3. 发明专利

JPH0469976A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0469976A
公开(公告)日：1992-03-05
申请号：JP18151390
申请日：1990-07-11
申请人： SUGAWARA FUMIHIKO , HARUHARA YOSHIO , SHINDENGEN ELECTRIC MFG
发明人： SUGAWARA FUMIHIKO , HARUHARA YOSHIO , KIMURA MITSUTERU , HIRAI MINORU
IPC分类号： H01L29/68 , H01L29/06 , H01L29/38 , H01L29/417 , H01L29/74 , H01L29/744
摘要： PURPOSE:To realize a high speed turning-OFF and to increase a frequency even when capacity of a semiconductor device is increased by providing a reverse conductivity type high impurity concentration region and the same conductivity type high impurity concentration region in a base region, and providing a switching element to short-circuit the base region simultaneously upon starting of turning-OFF operation. CONSTITUTION:Holes injected from an anode emitter are run in an N-type base so as to circulate along an NB type region, and are mainly directed toward a P-type base through a PC type region. On the other hand, electrons injected from a cathode emitter are run in the N-type base to flow to an anode side through a low resistance NB type region. When a light signal pulse is emitted simultaneously to two photoresist transistors Tr1, Tr2, a normal turning- OFF operation is started by the Tr1, and storage carrier of the PB type region is output from a gate G. Simultaneously, the Tr2 is conducted to short-circuit electrodes C to B, holes of minority carrier in the N-type base are output from the PC type region and recombined with electrons output from the NB type region on the metal electrode C. Accordingly, the minority carrier in the n-type base is vanished.

4. 发明专利

JPS59220976A SCHOTTKY BARRIER DIODE 失效
公开(公告)号：JPS59220976A
公开(公告)日：1984-12-12
申请号：JP9766183
申请日：1983-05-31
申请人： NIPPON DENKI HOME ELECTRONICS
发明人： ISHIKURA OSAMU
IPC分类号： H01L29/38 , H01L29/47 , H01L29/872 , H01L29/91
摘要： PURPOSE:To avoid the deterioration of characteristics by eliminating mechanical stress influencing the Schottky junction by a method wherein a p-n junction is generated by providing a p type region in the surface layer part of an n type Si layer, the entire surface is covered with an insulation film, an ohmic metallic layer is adhered on the p type region by opening a window, and a Schottky barrier metal surrounding it is adhered, leading to the short-circuit of the p-n junction exposing to the surface with the barrier metallic layer. CONSTITUTION:An n type layer 2 is epitaxially grown on an n type Si substrate 1 having a back electrode 10, and the p type region 4 is diffusion-formed in its surface layer part, thus generating the p-n junction 5 between the layer 2. Next, an SiO2 film 3 is adhered over the entire surface, a window being opened. The ohmic metallic layer 6 made of Ti.Ag is adhered on the exposed region 4, and the Schottky forming metallic layer 7 made of Mo on the exposed surface of the layer 2 surrounding it, respectively. The exposed end surface of the junction 5 is thus short-circuited with the layer 7, and a Pt layer and an Ag layer 9 are adhered by lamination thereon. At the time of reverse bias, a high reverse withstand voltage is obtained by generating a depletion layer 12 around the region 4.

5. 发明专利

JPS5832510B2 失效
公开(公告)号：JPS5832510B2
公开(公告)日：1983-07-13
申请号：JP1971475
申请日：1975-02-19
申请人： HITACHI LTD
发明人： AOKI MASAO , TAKAHASHI SUSUMU , MURAI FUMIO , KODERA HIROSHI
IPC分类号： H01L29/80 , H01L21/338 , H01L29/38 , H01L29/812

6. 发明专利

JPS5134269B1 失效
公开(公告)号：JPS5134269B1
公开(公告)日：1976-09-25
申请号：JP4812275
申请日：1975-04-19
IPC分类号： H01L21/265 , H01L21/76 , H01L21/8236 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/00 , H01L29/10 , H01L29/78 , H01L27/04 , H01L29/38 , H01L29/58

7. 发明专利

JPS51102580A 失效
公开(公告)号：JPS51102580A
公开(公告)日：1976-09-10
申请号：JP2819375
申请日：1975-03-07
申请人： MITSUBISHI ELECTRIC CORP
发明人： YUKIMOTO YOSHINORI , KAJIWARA YASUNARI
IPC分类号： H01L29/80 , H01L21/337 , H01L29/38 , H01L29/808

8. 发明专利

JP2001144014A SUBSTRATE FOR EPITAXIAL GROWTH AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JP2001144014A
公开(公告)日：2001-05-25
申请号：JP32656199
申请日：1999-11-17
申请人： NGK INSULATORS LTD
发明人： ASAI KEIICHIRO , SHIBATA TOMOHIKO , NAKAMURA YUKINORI
IPC分类号： H01L29/38 , C30B25/02 , C30B25/18 , H01L21/20 , H01L21/205 , H01L33/06 , H01L33/16 , H01L33/32 , H01L33/00
摘要： PROBLEM TO BE SOLVED: To provide a substrate for epitaxial growth wherein defects are little and crystallinity and surface evenness are excellent, especially a substrate for epitaxially growing an AlxGayInzN (x-+-y-+-z=1, x, y, z>=0) film, and a manufacturing method of the substrate. SOLUTION: A C surface sapphire substrate main body 11 is exposed to an ammonia atmosphere, and an aluminium nitride film 13 is formed to be several hundreds Å thick on the surface. The sapphire substrate main body 11 is introduced in a CVD chamber 14, an Al,xGayInzN (x-+-y-+-z=1, x, y, z>=0) film 15 excellent in crystallinity is formed on the aluminium nitride film 13 by epitaxial growth. After that, a surface of the film 15 is chemically and mechanically polished, the surface is flattened, and a substrate for epitaxial growth whose crystallinity and surface evenness are excellent can be obtained. An AlxGayInzN (x+y+z=1, x, y, z>=0) film which is formed by epitaxial growth on the substrate for epitaxial growth is also excellent in crystallinity and surface evenness.

9. 发明专利

JPH065762A HYBRID INTEGRATED CIRCUIT 失效
公开(公告)号：JPH065762A
公开(公告)日：1994-01-14
申请号：JP16129592
申请日：1992-06-19
申请人： SANYO ELECTRIC CO
发明人： TOYOOKA SHINICHI , SAITO HIDESHI
IPC分类号： H01L23/50 , H01L29/38 , H05K1/11 , H05K3/34
摘要： PURPOSE:To make it possible to form a large solder fillet at a bent part where an outer lead tenninal is bonded by making a longitudinal slit in a folded part formed in the vicinity of the outer lead terminal bonding part. CONSTITUTION:The hybrid integrated circuit comprises a board 1, a conductive path 2 of desired pattern formed on the board 1, a plurality of circuit elements 3 connected with the conductive path 2, and an outer lead terminal 4 having a bent part connected with a bonding pad 2A provided at the end of extension of the conductive path 2. In particular, the outer lead terminal 4 is folded in the vicinity of a part 4A bonded onto the bonding pad 2A, and a longitudinal slit 6 is made at the folded part A. The slit 6 is made while extending from the bonding part 4A to the folded part A. This constitution allows to form a sufficiently large solder fillet 7 at the folded part A.

10. 发明专利

JPS5947472B2 JPS5947472B2 - 失效
公开(公告)号：JPS5947472B2
公开(公告)日：1984-11-19
申请号：JP3054675
申请日：1975-03-12
申请人： Mitsubishi Electric Corp
发明人： KAWAZU SATORU
IPC分类号： H01L29/78 , H01L29/38

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