会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明专利
    • Anisotropic conductive bonding package
    • 各向异性导电粘接包装
    • JP2009164095A
    • 2009-07-23
    • JP2008118639
    • 2008-04-30
    • Fujifilm Corp富士フイルム株式会社
    • HATANAKA YUSUKEHOTTA YOSHINORITOMITA TADAFUMI
    • H01R11/01H01B5/16H01R43/00
    • H01L23/5389H01L23/49827H01L2924/0002H01R12/714Y10T29/49126Y10T29/4921Y10T428/24074Y10T428/24083Y10T428/24091Y10T428/24174Y10T428/24917Y10T428/249953Y10T428/249956H01L2924/00
    • PROBLEM TO BE SOLVED: To provide an anisotropic conductive bonding package capable of rapidly improving mounting density of conductive passages and using as an anisotropic conductive member or an inspection connector of an electronic component such as a semiconductor device in a highly integrated structure, and to provide a method of manufacturing the same.
      SOLUTION: In the package for bonding an anisotropic conductive film 51 on a conductive raw material, the anisotropic conductive film 51 is a structure made of an anodic oxide film of an aluminum base plate, wherein the plurality of conductive passages 3 made of a conductive member in an insulated base material 2 are penetrated into the insulated base material 2 in the width direction while each conductive passage is insulated and an end of each conductive passage 3 is exposed at one surface of the insulated base material 2 and the other end of each conductive passage 3 are provided at an exposed state on the other surface of the insulated base material 2 and density of the conductive passage 3 is ≥3,000,000 pieces/mm
      2 and the insulated base material 2 has micropores. The micropores do not have branched structures in the depth direction.
      COPYRIGHT: (C)2009,JPO&INPIT
    • 解决问题的方案为了提供能够快速提高导电通路的安装密度并且作为高度一体化的结构中的半导体装置等电子部件的各向异性导电部件或检查连接器使用的各向异性导电接合封装, 并提供其制造方法。 解决方案:在用于将导电原料上的各向异性导电膜51接合的封装中,各向异性导电膜51是由铝基板的阳极氧化膜构成的结构,其中多个导电通路3由 绝缘基材2中的导电构件在宽度方向上穿透绝缘基材2,而每个导电通路绝缘,并且每个导电通道3的一端在绝缘基材2的一个表面露出,另一端 每个导电通道3在绝缘基材2的另一个表面上以暴露状态设置,导电通道3的密度≥3,000,000个/ mm 2 ,绝缘基材2具有微孔 。 微孔在深度方向上不具有分支结构。 版权所有(C)2009,JPO&INPIT