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1. 发明专利

JP2018139314A 半導体装置审中-公开
公开(公告)号：JP2018139314A
公开(公告)日：2018-09-06
申请号：JP2018092839
申请日：2018-05-14
申请人：株式会社半導体エネルギー研究所
发明人：松林大介 , 篠原聡始 , 関根航
IPC分类号： H01L21/336 , H01L21/8234 , H01L27/088 , H01L27/06 , H01L21/8242 , H01L27/108 , H01L27/1156 , H01L29/788 , H01L29/792 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/4908 , H01L29/78612 , H01L29/78696
摘要：【課題】微細化に伴い顕著となる電気特性の低下を抑制できる構成の半導体装置を提供する。【解決手段】基板上に基板側から第1の酸化物半導体層、第2の酸化物半導体層、第3の酸化物半導体層の順で積層した酸化物半導体層と、酸化物半導体層と接するソース電極層およびドレイン電極層と、酸化物半導体層、ソース電極層およびドレイン電極層上に形成されたゲート絶縁膜と、ゲート絶縁膜上に形成されたゲート電極層と、を有し、第1の酸化物半導体層は第1の領域を有し、ゲート絶縁膜は第2の領域を有し、第1の領域の膜厚をT S1 、第2の領域の膜厚をT GI とするとき、T S1 ≧T GI とする。【選択図】図1

2. 发明专利

JP6340190B2 半導体装置有权
公开(公告)号：JP6340190B2
公开(公告)日：2018-06-06
申请号：JP2013246931
申请日：2013-11-29
申请人：株式会社半導体エネルギー研究所
发明人：松林大介 , 篠原聡始 , 関根航
IPC分类号： H01L29/786 , H01L21/8242 , H01L27/108 , H01L27/10 , H01L29/788 , H01L29/792 , H01L21/28 , H01L29/417 , H01L21/8234 , H01L27/088 , H01L21/336
CPC分类号： H01L29/7869 , H01L29/4908 , H01L29/78612 , H01L29/78696

3. 发明专利

JP2014131025A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014131025A
公开(公告)日：2014-07-10
申请号：JP2013246931
申请日：2013-11-29
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： MATSUBAYASHI DAISUKE , SHINOHARA SOJI , SEKINE WATARU
IPC分类号： H01L29/786 , H01L21/28 , H01L21/336 , H01L21/8234 , H01L21/8242 , H01L21/8247 , H01L27/08 , H01L27/088 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/417 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7869 , H01L29/4908 , H01L29/78612 , H01L29/78696
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a configuration capable of suppressing reduction in electrical characteristics that becomes remarkable associated with miniaturization.SOLUTION: A semiconductor device includes: an oxide semiconductor layer in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are laminated on a substrate in this order from a substrate side; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a gate insulating film formed on the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer formed on the gate insulating film. The first oxide semiconductor layer has a first region, and the gate insulating film has a second region. When the film thickness of the first region is Tand the film thickness of the second region is T, the following expression is satisfied: T≥T.
摘要翻译：要解决的问题：提供具有能够抑制与小型化相关的显着性降低的结构的半导体器件。解决方案：半导体器件包括：氧化物半导体层，其中第一氧化物半导体层，第二氧化物半导体层和第三氧化物半导体层从基板侧依次层叠在基板上; 与氧化物半导体层接触的源电极层和漏电极层; 在所述氧化物半导体层上形成的栅极绝缘膜，所述源极电极层和所述漏极电极层; 以及形成在栅极绝缘膜上的栅极电极层。第一氧化物半导体层具有第一区域，栅极绝缘膜具有第二区域。当第一区域的膜厚为T，第二区域的膜厚为T时，满足以下表达式：T≥T。

4. 发明专利

JP5204763B2 Method for producing a soi transistor floating body effects were reduced have a buried strained layer 有权
公开(公告)号：JP5204763B2
公开(公告)日：2013-06-05
申请号：JP2009507692
申请日：2007-03-29
申请人：アドバンスト・マイクロ・ディバイシズ・インコーポレイテッドAdvanced Micro Devices Incorporated
发明人：ウェイアンディ , カムラートルシュテン , ホンツェルヤン , ホルストマンマンフレッド
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/78612 , H01L21/26513 , H01L21/823807 , H01L21/823878 , H01L21/84 , H01L29/1045 , H01L29/41783 , H01L29/665 , H01L29/6659 , H01L29/66636 , H01L29/66772 , H01L29/7833 , H01L29/7843 , H01L29/7848 , H01L29/78621 , H01L29/78684
摘要： By forming a portion of a PN junction within strained silicon/germanium material in SOI transistors with a floating body architecture, the junction leakage may be significantly increased, thereby reducing floating body effects. The positioning of a portion of the PN junction within the strained silicon/germanium material may be accomplished on the basis of implantation and anneal techniques, contrary to conventional approaches in which in situ doped silicon/germanium is epitaxially grown so as to form the deep drain and source regions. Consequently, high drive current capability may be combined with a reduction of floating body effects.

6. 发明专利

JP4397491B2 Semiconductor device and method of forming the same using the silicon with a (111) face orientation on the surface 有权
公开(公告)号：JP4397491B2
公开(公告)日：2010-01-13
申请号：JP37617099
申请日：1999-11-30
申请人：財団法人国際科学振興財団
发明人：忠弘大見 , 祐司斎藤 , 克行関根 , 成利須川
IPC分类号： H01L21/316 , G11C11/16 , H01L21/28 , H01L21/318 , H01L21/336 , H01L21/8246 , H01L21/8247 , H01L27/12 , H01L29/04 , H01L29/49 , H01L29/51 , H01L29/786 , H01L29/788
CPC分类号： H01L21/28185 , G11C11/16 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L21/28238 , H01L21/28291 , H01L27/11521 , H01L27/11585 , H01L27/1159 , H01L27/1203 , H01L29/045 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66825 , H01L29/7833 , H01L29/78603 , H01L29/78612 , H01L29/7883
摘要： A semiconductor device includes a Si crystal having a crystal surface in the vicinity of a (111) surface, and an insulation film formed on said crystal surface, at least a part of said insulation film comprising a Si oxide film containing Kr or a Si nitride film containing Ar or Kr.

7. 发明专利

JP3871352B2 Thin film soi device and a method of manufacturing the same 失效
公开(公告)号：JP3871352B2
公开(公告)日：2007-01-24
申请号：JP18816194
申请日：1994-08-10
申请人：コーニンクレッカフィリップスエレクトロニクスエヌヴィKoninklijke Philips Electronics N.V.
发明人：エルマーチャントスティーブン
IPC分类号： H01L29/40 , H01L29/786 , H01L29/06 , H01L29/08 , H01L29/423 , H01L29/739 , H01L29/78
CPC分类号： H01L29/402 , H01L29/0847 , H01L29/42368 , H01L29/42384 , H01L29/66772 , H01L29/7393 , H01L29/7394 , H01L29/7813 , H01L29/7824 , H01L29/78612 , H01L29/78624 , H01L29/861
摘要： The present application is directed to a thin film silicon SOI device having improved source-high performance especially for bridge-type circuits. The device prevents forward current saturation during such source-high operations, and is made by providing the drift region of a transistor with both a thicker and a thinner portion with reduced thickness over 1/3 to 2/3 of its length. Further a field plate is provided, which is separated from the gate electrode and extends over the thinner portion of the drift region. The gate electrode and field plate are short-circuited by a metal interconnect.

8. 发明专利

JP2006173538A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2006173538A
公开(公告)日：2006-06-29
申请号：JP2004367856
申请日：2004-12-20
申请人： Oki Electric Ind Co Ltd , 沖電気工業株式会社
发明人： FUKUDA KOICHI
IPC分类号： H01L21/336 , H01L29/786
CPC分类号： H01L29/78657 , H01L29/78612 , H01L29/78621
摘要： PROBLEM TO BE SOLVED: To provide a means of suppressing a leak current of a reverse-surface channel of a MOSFET formed on an SOS substrate where a thin silicon layer of ≤0.1 μm is laminated.
SOLUTION: A semiconductor device has a silicon film of ≤0.1 μm formed on a sapphire substrate, a gate electrode formed above the silicon layer, a source layer and a drain layer formed on the silicon layer, a source-side diffusion layer which is formed on the silicon layer between the gate electrode and source layer while extended to below the gate electrode, and has a diffusion depth large enough to reach the interface between the sapphire substrate and silicon layer, the same conductivity type with the source layer, and lower impurity density than the source layer, and a drain-side diffusion layer which is formed on the silicon layer between the gate electrode and drain layer while extended to below the gate electrode, and has the same conductivity type with the drain layer and lower impurity density than the drain layer.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种抑制形成在SOS衬底上的MOSFET的反面沟道的泄漏电流的方法，其中层叠有≤0.1μm的薄硅层。解决方案：半导体器件具有形成在蓝宝石衬底上的≤0.1μm的硅膜，形成在硅层上的栅电极，形成在硅层上的源极层和漏极层，源极侧扩散层其形成在栅电极和源极层之间的硅层上，同时延伸到栅电极下方，并且具有足够大的扩散深度到达蓝宝石衬底和硅层之间的界面，与源层相同的导电类型，并且比源极层的杂质浓度低;以及漏极侧扩散层，其在栅电极和漏极层之间的硅层上形成，同时延伸到栅电极下方，并且与漏层和导电类型具有相同的导电类型杂质浓度比漏极层高。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2004311903A Semiconductor device and manufacturing method 审中-公开
公开(公告)号：JP2004311903A
公开(公告)日：2004-11-04
申请号：JP2003106793
申请日：2003-04-10
申请人： Oki Electric Ind Co Ltd , 沖電気工業株式会社
发明人： FUKUDA KOICHI
IPC分类号： H01L21/265 , H01L21/336 , H01L27/01 , H01L29/786
CPC分类号： H01L29/66772 , H01L29/78612 , H01L29/78621
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which restrains substrate suspension effect without deteriorating integration degree, and its manufacturing method. SOLUTION: The semiconductor device has an SOI structure forming at least one MOSFET element in a silicon layer on an insulator. The MOSFET element consists of a source region, a drain region facing the source region, a body region formed between the source region and the drain region and a gate region formed near a surface of the body region and forms a conductive channel in the body region. It comprises a suction region which is in contact with the body region and the source region, has the same conductivity type as the body region and has higher concentration than that of the body region, In the manufacturing method, such a suction region is formed in a source region side by using an ion implantation method. COPYRIGHT: (C)2005,JPO&NCIPI

10. 发明专利

JP3504212B2 Semiconductor device of Soi structure 有权
公开(公告)号：JP3504212B2
公开(公告)日：2004-03-08
申请号：JP2000102359
申请日：2000-04-04
申请人：シャープ株式会社
发明人：オー．アダンアルベルト
IPC分类号： H01L27/12 , H01L21/84 , H01L29/78 , H01L29/786
CPC分类号： H01L29/78696 , H01L29/7841 , H01L29/78612 , H01L2924/0002 , H01L2924/00

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