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    • 1. 发明专利
    • Sequence control device, and module device and connection device
    • 序列控制装置,以及模块装置和连接装置
    • JP2010152872A
    • 2010-07-08
    • JP2009246429
    • 2009-10-27
    • Yokogawa Electric Corp横河電機株式会社
    • OKAMOTO HIROFUMIONO KOICHI
    • G05B19/05
    • G05B19/054G05B2219/15018G05B2219/25464
    • PROBLEM TO BE SOLVED: To provide a sequence control device and the like which can improve the data transfer efficiency so as to improve the entire processing efficiency.
      SOLUTION: The sequence control device includes: a plurality of modules 20a to 20d which can transmit/receive a packet; and a backboard 10 which mutually connects the modules 20a to 20d. The sequence control device 1 executes sequence control while transferring a packet between the modules 20a to 20d via the backboard 10, wherein the modules 20a to 20d have serial transmission I/F circuits 21a to 21d, respectively, for transmitting/receiving a packet by serial communication, and the backboard 10 has a serial transfer switch 11 which transfers the packet transmitted from the serial transmission I/F circuits 21a to 21d to a transfer destination module by the serial communication.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:提供一种可以提高数据传输效率的序列控制装置等,以提高整个处理效率。 解决方案:序列控制装置包括:可以发送/接收分组的多个模块20a至20d; 以及相互连接模块20a〜20d的背板10。 顺序控制装置1经由背板10在模块20a〜20d之间传送分组时执行顺序控制,其中模块20a至20d分别具有用于通过串行发送/接收分组的串行传输I / F电路21a至21d 通信和背板10具有串行转接开关11,其通过串行通信将从串行传输I / F电路21a至21d发送的分组传送到传送目的地模块。 版权所有(C)2010,JPO&INPIT
    • 4. 发明专利
    • Sequence controller
    • 序列控制器
    • JPS59103105A
    • 1984-06-14
    • JP21369482
    • 1982-12-06
    • Koyo Denshi Kogyo Kk
    • DAIGO HIROKI
    • G05B19/048G05B19/05
    • G05B19/05G05B2219/15018G05B2219/15078
    • PURPOSE:To improve both installation performance and operability of a programmable controller (PC) by constituting the PC with a central control unit and a power supply unit and using a connecting means to connect said control unit and power supply unit. CONSTITUTION:A sequence controller is provided with a central processing unit CEN and an input/output-power supply unit I/O-P consisting of an input/output part 5 and a power supply part 6. The unit CEN consists of a program counter 1, a program storage part 2, an arithmetic part 3, an internal storage part 4 and a programmer 7. Then both units CEN and I/O-P are connected to each other by a flexible connecting means (l) consisting of transmission circuits 8 and 8'. The unit CEN when not in use is detained to a detaining part 9 of the unit I/O-P. Thus both sequence controller and unit CEN can be installed freely at an optional place with improvement of their operability.
    • 目的:通过使用中央控制单元和电源单元构成PC并使用连接手段连接所述控制单元和电源单元,提高可编程控制器(PC)的安装性能和可操作性。 构成:序列控制器配有中央处理单元CEN和由输入/输出部分5和电源部分6组成的输入/输出电源单元I / OP。单元CEN由程序计数器1, 程序存储部分2,运算部分3,内部存储部分4和编程器7.然后两个单元CEN和I / OP通过由传输电路8和8'组成的灵活连接装置(l)彼此连接, 。 未使用的单元CEN被扣留到单元I / O-P的扣留部分9。 因此,序列控制器和单元CEN可以自由地安装在可选的位置,同时提高其可操作性。
    • 5. 发明专利
    • Programmable logic controller
    • 可编程逻辑控制器
    • JPS5769305A
    • 1982-04-28
    • JP14261080
    • 1980-10-13
    • Omron Tateisi Electronics Co
    • NISHIKIDO KENJI
    • G06F9/46G05B19/05G06F15/17
    • G05B19/052G05B2219/15018
    • PURPOSE:To easily constitute a large-scale control system, by connecting plural controllers of the same constitution with a link bus and executing each user program in parallel. CONSTITUTION:Both the new data NEW read out of an input/output memory 4 of a master device plus the old data OLD read out of a reference memory 9 are supplied to an exclusive OR circuit 11. Then a data change signal (eor) is obtained from the circuit 11. Both the data (eor) and the NEW are sent alternately to a link bus 10 via multiplexer 35. These data are supplied to a mixing circuit 32 of a slave device to which no right of transmission is given and mixed up there to be changed into a mixture data MIX. This data MIX is written into the memory 9 as well as to the memory 4 via a mask circuit 33. Then the right of transmission is transferred to a master device from the master device to carry out the transmission in the same way to the master device from the slave device. In such way, the data produced at the master and slave devices are made alternately to have the same contents for the memories of both devices.
    • 目的:为了容易地构成大型控制系统,通过连接多个具有相同结构的控制器和链路总线并行执行每个用户程序。 构成:从主设备的输入/输出存储器4中读出的新数据NEW和从参考存储器9读出的旧数据OLD都被提供给异或电路11.然后数据改变信号(eor) 数据(eor)和新的数据(eor)和新的数据经由多路复用器35被交替地发送到链路总线10.这些数据被提供给从设备的混合电路32,其中没有发送权和混合权 在那里改成混合数据MIX。 该数据MIX经由屏蔽电路33被写入存储器9以及存储器4.然后,传输权从主设备传送到主设备,以与主设备相同的方式执行传输 从从设备。 以这种方式,在主设备和从设备处产生的数据被交替地进行以对于两个设备的存储器具有相同的内容。
    • 8. 发明专利
    • Programmable logic controller
    • 可编程逻辑控制器
    • JPS5769306A
    • 1982-04-28
    • JP14261180
    • 1980-10-13
    • Omron Tateisi Electronics Co
    • OOTSU TATSUONISHIKIDO KENJI
    • G06F9/46G05B19/05G06F15/17
    • G05B19/052G05B2219/15018
    • PURPOSE:To simplify the constitution of a data change exchanging part and at the same time to realize a high-speed exchanging action, by transmitting simultaneously the data change detection signals to a link but through each controller and exchanging the data to each other. CONSTITUTION:Both the new and old data NEW and OLD are read out of an input/output memory 4 and a reference memory 9 of a master device and a slave device respectively to be supplied to an exclusive OR circuit 11. Thus a data change signal (eor) is obtained from the circuit 11. The data (eor) is inverted by an inverter 12 and sent to a bus B1 in a link bus 10 at a time for both the master and slave devices. At the same time, the signal (eor) is applied to a gate 24 in the form of a control signal of the data NEW, and the change data new is sent to a bus B3 in the link 10 from the gate 24 simultaneously for both the master and slave devices. Furthermore the signal (eor) on the bus B1 is fetched into each device to be applied in the form of the control signals of both an inhibition gate 21 and a gate 22. At the same time, the data new on the bus B3 is also supplied to a gate 21 of each device.
    • 目的:为了简化数据更换交换部件的结构,同时实现高速交换动作,通过同时传送数据变化检测信号到链路,但是通过每个控制器并且彼此交换数据。 构成:新旧数据NEW和OLD分别从主器件和从器件的输入/输出存储器4和参考存储器9中读出,以提供给异或电路11.因此,数据改变信号 (eor)从电路11获得。数据(eor)由逆变器12反相,并且一次一起发送到链路总线10中的总线B1,用于主设备和从设备。 同时,以数据NEW的控制信号的形式将信号(eor)施加到门24,并且改变数据新的同时从门24发送到链路10中的总线B3 主设备和从设备。 此外,总线B1上的信号(eor)以禁止门21和门22的控制信号的形式被提取到要施加的每个设备中。同时,总线B3上的新数据也是 提供给每个设备的门21。
    • 9. 发明专利
    • Communication interface, network system and programmable controller
    • 通信接口,网络系统和可编程控制器
    • JP2005174306A
    • 2005-06-30
    • JP2004329487
    • 2004-11-12
    • Omron Corpオムロン株式会社
    • SAWA KAZUYAMURAYAMA SHINJI
    • G05B19/042G05B19/05
    • G05B19/054G05B19/0423G05B2219/15018G05B2219/15021
    • PROBLEM TO BE SOLVED: To provide a protocol execution part that can use a gateway function for access from a peripheral device to an external general purpose device via a communication interface, without stopping command/response communication between a PLC in the process of operating a protocol macro and the external general purpose device.
      SOLUTION: The protocol execution part comprises relaying means for relay-converting a communication command addressed to the external general purpose device, which has been received from the peripheral device via the PLC so as to fit to communication on a general purpose serial line, issuing the command to the external general purpose device, and relay-converting a response to the command from the external general purpose device to a response for the peripheral device; and also comprises a function of, when the communication command addressed to the external general purpose device, which has been issued by the peripheral device, is relayed, determining whether or not response reception is being waited for from the external general purpose device and, if a reception wait is set, temporarily stopping the relay and on condition that the response reception wait ends, allowing the relaying means to communicate with the external general purpose device.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种可以使用网关功能的协议执行部件,用于经由通信接口从外围设备到外部通用设备的访问,而不停止PLC在过程中的命令/响应通信 操作协议宏和外部通用设备。 解决方案:协议执行部分包括中继装置,用于中继转换通过PLC从外围设备接收到的寻址到外部通用设备的通信命令,以适应通用串行线路上的通信 向外部通用设备发出命令,并将来自外部通用设备的命令的响应中继转换为外围设备的响应; 并且还包括当外部设备发出的发往外部通用设备的通信命令被中继时,确定是否正在等待来自外部通用设备的响应接收的功能,以及如果 设置接收等待,暂时停止中继,并且在响应接收等待结束的条件下,允许中继装置与外部通用设备通信。 版权所有(C)2005,JPO&NCIPI