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    • 7. 发明专利
    • Multi-output determination circuit
    • 多输出确定电路
    • JP2009303321A
    • 2009-12-24
    • JP2008152666
    • 2008-06-11
    • Keihin Corp株式会社ケーヒン
    • TAKEBAYASHI KENICHISUZUKI KOJISENOO KAZUTAKA
    • H02P23/00
    • G01R19/16528G01R19/16595
    • PROBLEM TO BE SOLVED: To provide a multi-output determination circuit which can reduce its cost by reducing the number of comparators. SOLUTION: This multi-output determination circuit, which determines whether or not one input voltage of a plurality of input voltages is at an upper limit voltage value or higher, is equipped with: the first diode OR, which consists of a plurality of first diodes, where a plurality of input voltages are connected severally to their anodes and whose cathodes are connected in common; an upper limit reference voltage generating means, which has the first resistor, the first diode; and the second resistor connected in series between the first and second power potentials and which generates an upper reference voltage, based on the cathode of the first diode, and the first comparator which compares the voltage of the cathode of the first diode OR with the upper limit reference voltage. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:提供可以通过减少比较器的数量来降低成本的多输出确定电路。 解决方案:该多输出确定电路,其确定多个输入电压的一个输入电压是否在上限电压值以上,配备有:第一二极管OR,其由多个 的第一二极管,其中多个输入电压分别连接到它们的阳极并且其阴极共同连接; 上限参考电压产生装置,其具有第一电阻器,第一二极管; 和第二电阻器串联连接在第一和第二功率电势之间,并且基于第一二极管的阴极产生上参考电压,第一比较器将第一二极管OR的阴极的电压与上电压 限制参考电压。 版权所有(C)2010,JPO&INPIT