会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 7. 发明专利
    • Sweep signal generating circuit
    • 振动信号发生电路
    • JPS6145974A
    • 1986-03-06
    • JP16853884
    • 1984-08-10
    • Iwatsu Electric Co Ltd
    • SUZUKI TATSUMI
    • G01R13/24G01R13/32
    • G01R13/24G01R13/32
    • PURPOSE: To reduce the cost by providing a hold-off signal generating circuit, FF for frequency division, voltage divider, FF for a sweep gate, etc., and allowing the FF for the sweep gate to respond to frequencies lower than an input trigger.
      CONSTITUTION: The frequency divider 6 composed of an FF5 is connected to a trigger input terminal 1. This frequency divider 6 is connected by connecting the terminal 1 to the clock input terminal C of the FF5, The Q' output terminal to a data input terminal D, and the output terminal of the hold-off signal generating circuit 4 to the reset terminal R. Then, a terminal C of the sweep gate FF7 is connected to the Q' terminal of the FF5, the data input terminal D is connected to +V, and the terminal R is connected tothe output terminal of the circuit 4. Further, a trigger pulse is inputted to the terminal 1, but the FF5 is reset while the output of the circuit 4 is at a high level, so the acceptance of the trigger pulse is inhibited and no frequency division output is generated. Therefore, the pulse is frequency-divided and inputted to the FF7, so the maximum operating frequency of the FF7 is lowered.
      COPYRIGHT: (C)1986,JPO&Japio
    • 目的:通过提供保持信号发生电路,FF分频,分频器,扫描门等的FF等来降低成本,并允许扫频门的FF响应低于输入触发的频率 。 构成:由FF5组成的分频器6连接到触发输入端子1.该分频器6通过将端子1连接到FF5的时钟输入端子C,将Q'输出端子连接到数据输入端子 D和保持信号发生电路4的输出端连接到复位端R.然后,扫描栅极FF7的端子C连接到FF5的Q'端,数据输入端D连接到 + V,并且端子R连接到电路4的输出端子。此外,触发脉冲被输入到端子1,但是在电路4的输出处于高电平时FF5被复位,因此接受 的触发脉冲被禁止,并且不产生分频输出。 因此,脉冲被分频并输入到FF7,因此FF7的最大工作频率降低。