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1. 发明专利

JP2011204916A Solid-state imaging device and method of manufacturing the same 审中-公开
标题翻译：固态成像装置及其制造方法
公开(公告)号：JP2011204916A
公开(公告)日：2011-10-13
申请号：JP2010070927
申请日：2010-03-25
申请人： Toshiba Corp , 株式会社東芝
发明人： UTSUMI KUNIAKI
IPC分类号： H01L27/146 , H04N5/374
摘要： PROBLEM TO BE SOLVED: To provide a solid-state imaging device and a method of manufacturing the same which can suppress variation of contact resistance between pixels and can take a homogeneous image.SOLUTION: The solid-state imaging device 1 includes: a photo diode (a photoelectric conversion part) 10 for converting an incident light into a signal charge; a transfer transistor 3A for reading and transferring the signal charge from the photo diode 10; a floating diffusion layer 7A formed on a semiconductor substrate 2 and accumulating the signal charge transferred by the transfer transistor 3A; a silicide layer 8A formed on a part of the floating diffusion layer 7A; and a contact plug 6 connected to the silicide layer 8A.
摘要翻译：要解决的问题：提供一种可以抑制像素之间的接触电阻的变化并且可以获得均匀的图像的固态成像装置及其制造方法。解决方案：固态成像装置1包括：光电二极管（光电转换部）10，用于将入射光转换为信号电荷; 用于读取和转移来自光电二极管10的信号电荷的转移晶体管3A; 形成在半导体基板2上并积累由转移晶体管3A转移的信号电荷的浮动扩散层7A; 形成在浮动扩散层7A的一部分上的硅化物层8A; 以及连接到硅化物层8A的接触插头6。

2. 发明专利

JP2010061190A Model parameter extraction device and model parameter extraction method 审中-公开
标题翻译：模型参数提取装置和模型参数提取方法
公开(公告)号：JP2010061190A
公开(公告)日：2010-03-18
申请号：JP2008223247
申请日：2008-09-01
申请人： Toshiba Corp , 株式会社東芝
发明人： WAKITA NAOKI , UTSUMI KUNIAKI
IPC分类号： G06F17/50 , H01L21/336 , H01L29/00 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To improve accuracy of circuit simulation in a model parameter extraction device and a model parameter extraction method. SOLUTION: The model parameter extraction device has: an input part 10 for inputting measurement data showing an electric property of a measurement point; a first approximate function expression creation part 201 creating a first approximate function expression approximating the electric property of the measurement point based on the inputted measurement data about the measurement point wherein the inputted measurement data are present; a second approximate function expression creation part 202 correcting the first approximate function expression created by the first approximate function expression creation part 201 about the measurement point wherein the inputted measurement data are insufficient, and creating a second approximate function expression approximating the electric property of the measurement point; an approximate value calculation part 30 calculating an approximate value of the electric property of the measurement point based on the first and second approximate function expressions created by the first and second approximate function expression creation parts 201, 202; a model parameter set generation part 8 generating a model parameter set including the calculated approximate value; and an output part 90 outputting the generated model parameter set. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提高模型参数提取装置中的电路仿真精度和模型参数提取方法。解决方案：模型参数提取装置具有：用于输入表示测量点的电性的测量数据的输入部分10; 第一近似函数表达式创建部分201，基于输入的测量数据，输入的测量数据存在，产生近似于测量点的电特性的第一近似函数表达式; 第二近似函数表达式创建部分202，校正由第一近似函数表达式创建部分201创建的关于输入的测量数据不足的测量点的第一近似函数表达式，以及创建接近测量的电特性的第二近似函数表达式点; 基于由第一和第二近似函数表达创建部分201,202创建的第一和第二近似函数表达式来计算测量点的电特性的近似值的近似值计算部分30; 模型参数集生成部8生成包含计算出的近似值的模型参数集合; 以及输出部90，输出生成的模型参数集。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2009158621A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2009158621A
公开(公告)日：2009-07-16
申请号：JP2007333302
申请日：2007-12-25
申请人： Toshiba Corp , 株式会社東芝
发明人： HIRAOKA TAKAYUKI , UTSUMI KUNIAKI , HONDA KENJI , KOJIMA TSUTOMU
IPC分类号： H01L21/8234 , H01L21/822 , H01L21/8238 , H01L27/04 , H01L27/06 , H01L27/088 , H01L27/092
CPC分类号： H01L21/823418 , H01L27/0266 , H01L27/088 , H01L29/0847 , H01L29/105 , H01L29/1083 , H01L29/665 , H01L29/66659 , H01L29/7835
摘要： PROBLEM TO BE SOLVED: To easily enhance an ESD discharging performance in a MOSFET type ESD protection element having an LDD structure.
SOLUTION: Formed is, just under the silicide block 51a of an HV ESD protection device 1A, a diffusion layer resistance region 29a of the same junction depth as those of LDD diffusion layers 26a and 27a for forming an extension region. Just under the silicide block 51b of an LV ESD protection device 1B, a diffusion resistance region 29b of the same junction depth as the LDD diffusion layers 26a and 27a, and the diffusion layer resistance region 29a, to be formed simultaneously with the LDD diffusion layers 26a and 27a, and diffusion layer resistance region 29a of the HV ESD protection device 1A, is provided.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：为了容易地提高具有LDD结构的MOSFET型ESD保护元件的ESD放电性能。解决方案：形成在HV ESD保护装置1A的硅化物块51a正下方的与用于形成延伸区域的LDD扩散层26a和27a相同的结深度的扩散层电阻区域29a。在LV ESD保护器件1B的硅化物块51b的正下方，与LDD扩散层同时形成的与LDD扩散层26a和27a以及扩散层电阻区域29a相同的结深度的扩散电阻区域29b 26a和27a以及HV ESD保护装置1A的扩散层电阻区域29a。版权所有（C）2009，JPO＆INPIT

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