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    • 1. 发明专利
    • Semiconductor device and manufacturing method thereof
    • 半导体器件及其制造方法
    • JP2013179221A
    • 2013-09-09
    • JP2012043040
    • 2012-02-29
    • Toshiba Corp株式会社東芝
    • KONO HIROSHISHINOHE TAKASHISUZUKI TAKUMANISHIO JOJI
    • H01L29/78H01L21/336H01L29/12H01L29/739
    • H01L21/0465H01L29/0878H01L29/1095H01L29/1608H01L29/66068H01L29/66477H01L29/7395H01L29/7802H01L29/7827
    • PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method thereof for achieving low on-resistance.SOLUTION: A semiconductor device according to an embodiment comprises: a first semiconductor region; a second semiconductor region; a third semiconductor region; a fourth semiconductor region; a fifth semiconductor region; an insulation film; a control electrode; a first electrode; and a second electrode. The first semiconductor region includes first conductive type silicon carbide having a first impurity concentration, and has a first portion. The second semiconductor region is provided on an upper side of the first semiconductor region, and includes second conductive type silicon carbide. The third semiconductor region is provided on an upper side of the second semiconductor region, and includes first conductive type silicon carbide. The fourth semiconductor region is provided between the first portion and the second semiconductor region and the third semiconductor region, and includes second conductive type silicon carbide. The fifth semiconductor region has a first region provided between the first portion and the second semiconductor region, and includes first conductive type silicon carbide having a second impurity concentration higher than the first impurity concentration.
    • 要解决的问题:提供一种用于实现低导通电阻的半导体器件及其制造方法。解决方案:根据实施例的半导体器件包括:第一半导体区域; 第二半导体区域; 第三半导体区域; 第四半导体区域; 第五半导体区域; 绝缘膜; 控制电极; 第一电极; 和第二电极。 第一半导体区域包括具有第一杂质浓度的第一导电型碳化硅,并且具有第一部分。 第二半导体区域设置在第一半导体区域的上侧,并且包括第二导电型碳化硅。 第三半导体区域设置在第二半导体区域的上侧,并且包括第一导电型碳化硅。 第四半导体区域设置在第一部分与第二半导体区域和第三半导体区域之间,并且包括第二导电型碳化硅。 第五半导体区域具有设置在第一部分和第二半导体区域之间的第一区域,并且包括第二杂质浓度高于第一杂质浓度的第一导电型碳化硅。
    • 3. 发明专利
    • Semiconductor device, and method for manufacturing semiconductor device
    • 半导体器件及制造半导体器件的方法
    • JP2012059902A
    • 2012-03-22
    • JP2010201452
    • 2010-09-08
    • Toshiba Corp株式会社東芝
    • OTA CHIHARUKONO HIROSHITAKAO KAZUTOSHINOHE TAKASHI
    • H01L29/861
    • H01L29/0615H01L29/0619H01L29/1608H01L29/868H01L29/872
    • PROBLEM TO BE SOLVED: To provide a device capable of lowering a loss while maintaining a basic characteristic of a diode.SOLUTION: The semiconductor device in an embodiment comprises a first conductive-type semiconductor substrate, a first conductive-type first semiconductor layer, a second conductive-type first conductor area, a second conductive-type second semiconductor area, a first conductive-type third semiconductor area, a first electrode, and a second electrode. The second conductive-type first semiconductor area is selectively formed at one part on the first semiconductor layer. The second conductive-type second semiconductor area is selectively formed to reach inside the first semiconductor layer at another part on the first semiconductor layer, so as to have a higher concentration of impurities than that of the first semiconductor area. The first electrode is selectively formed on the second and third semiconductor areas. The second electrode is formed to contact a rear face of the semiconductor substrate.
    • 要解决的问题:提供一种能够在保持二极管的基本特性的同时降低损耗的装置。 解决方案:实施例中的半导体器件包括第一导电型半导体衬底,第一导电型第一半导体层,第二导电型第一导体区域,第二导电型第二半导体区域,第一导电型 型第三半导体区域,第一电极和第二电极。 第二导电型第一半导体区域选择性地形成在第一半导体层的一部分上。 选择性地形成第二导电型第二半导体区域,以在第一半导体层的另一部分到达第一半导体层的内部,从而具有比第一半导体区域更高的杂质浓度。 第一电极选择性地形成在第二和第三半导体区域上。 第二电极形成为接触半导体衬底的后表面。 版权所有(C)2012,JPO&INPIT
    • 4. 发明专利
    • Semiconductor device and method for manufacturing the semiconductor device
    • 用于制造半导体器件的半导体器件和方法
    • JP2010238738A
    • 2010-10-21
    • JP2009082276
    • 2009-03-30
    • Toshiba Corp株式会社東芝
    • KONO HIROSHISHINOHE TAKASHIMIZUKAMI MAKOTO
    • H01L29/78H01L21/28H01L21/336H01L29/12H01L29/417H01L29/739
    • H01L29/1608H01L21/0465H01L21/0485H01L29/41766H01L29/42368H01L29/45H01L29/66068H01L29/66325H01L29/66477H01L29/7393H01L29/7396H01L29/7397H01L29/78H01L29/7802H01L29/7813
    • PROBLEM TO BE SOLVED: To provide a semiconductor device and a method for manufacturing the semiconductor device which enable micro fabrication by the use of SiC, and are excellent in ultra-low on-resistance and reliability. SOLUTION: The semiconductor device has: an SiC substrate, a first conductive type first SiC layer of a first main face thereof, a second conductive type first SiC region of the surface, a first conductive type second SiC region of the surface, a second conductive type third SiC region of a lower part thereof, a trench which penetrates the second SiC region and reaches the third SiC region, a gate insulating film, a gate electrode, an interlayer insulating film coating the gate electrode, a first electrode formed on the second SiC region on the trench side face and the interlayer insulating film, and containing a metal element selected from a group composed of Ni, Ti, Ta, Mo, and W, a second electrode formed on the third SiC region of a trench bottom and on the first electrode and containing Al, a first main electrode on the second electrode, and a second main electrode formed on a second main face of the SiC substrate. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供半导体器件和制造半导体器件的方法,其能够通过使用SiC进行微制造,并且具有优异的超低导通电阻和可靠性。 解决方案:半导体器件具有:SiC衬底,其第一主面的第一导电型第一SiC层,表面的第二导电型第一SiC区域,表面的第一导电型第二SiC区域, 其下部的第二导电型第三SiC区域,穿过第二SiC区域并到达第三SiC区域的沟槽,栅极绝缘膜,栅电极,涂覆栅电极的层间绝缘膜,形成的第一电极 在沟槽侧面的第二SiC区域和层间绝缘膜上,并且含有选自由Ni,Ti,Ta,Mo和W构成的组的金属元素,形成在沟槽的第三SiC区域上的第二电极 底部并且在第一电极上并且包含Al,第二电极上的第一主电极和形成在SiC衬底的第二主面上的第二主电极。 版权所有(C)2011,JPO&INPIT
    • 6. 发明专利
    • Semiconductor device
    • 半导体器件
    • JP2014067760A
    • 2014-04-17
    • JP2012210188
    • 2012-09-24
    • Toshiba Corp株式会社東芝
    • TAKAO KAZUTOKONO HIROSHIKIKUCHI TAKUO
    • H01L25/18H01L25/07H02M1/00H02M7/48
    • G05F3/20H01L2224/49113H01L2224/49175H01L2224/73265H01L2924/1305H01L2924/13055H01L2924/13091H02M7/003H01L2924/00
    • PROBLEM TO BE SOLVED: To reduce a parasitic inductance.SOLUTION: A semiconductor device according to the embodiment includes a substrate, a first circuit part, and a second circuit part. The first circuit part includes a first switching element, a first diode, a second switching element, and a second diode. The second circuit part includes a third switching element, a third diode, a fourth switching element, and a fourth diode. The first switching element is juxtaposed with any one of the second switching element and the third switching element in a first direction along the substrate, and juxtaposed with the fourth switching element in a second direction along the substrate and crossing the first direction. The other of the second switching element and the third switching element, is juxtaposed with the fourth switching element in the first direction, and juxtaposed with any one of the second switching element and the third switching element in the second direction.
    • 要解决的问题:降低寄生电感。根据实施例的半导体器件包括衬底,第一电路部分和第二电路部分。 第一电路部分包括第一开关元件,第一二极管,第二开关元件和第二二极管。 第二电路部分包括第三开关元件,第三二极管,第四开关元件和第四二极管。 第一开关元件沿着基板沿第一方向与第二开关元件和第三开关元件中的任一个并置,并且沿着基板沿第二方向与第四开关元件并置并与第一方向交叉。 第二开关元件和第三开关元件中的另一个在第一方向上与第四开关元件并置,并且与第二开关元件和第三开关元件中的任一个并排放置在第二方向上。
    • 7. 发明专利
    • Transistor and manufacturing method of the same
    • 晶体管及其制造方法
    • JP2014029952A
    • 2014-02-13
    • JP2012170281
    • 2012-07-31
    • Toshiba Corp株式会社東芝
    • NISHIO JOJIKONO HIROSHISUZUKI TAKUMASHIMIZU TATSUOSHINOHE TAKASHI
    • H01L29/12H01L21/336H01L29/739H01L29/78
    • H01L29/105H01L29/045H01L29/0878H01L29/1041H01L29/1095H01L29/1608H01L29/161H01L29/66068H01L29/7395H01L29/7802
    • PROBLEM TO BE SOLVED: To provide a transistor and a manufacturing method of the same which can achieve improvement and stabilization of characteristics.SOLUTION: A transistor according to an embodiment comprises a structure, an insulation film, a control electrode, a first electrode and a second electrode. The structure includes a first conductivity type first semiconductor region, a second conductivity type second semiconductor region provided on the first semiconductor region, and a first conductivity type third semiconductor region provided on the second semiconductor region, and includes a compound semiconductor having a first element and a second element. The control electrode is provided on the insulation film. The first electrode is electrically connected with the third semiconductor region. The second electrode is electrically connected with the first semiconductor region. The structure includes a first region provided above a bottom edge of the second semiconductor region and a second region other than the first region. The first region is a region formed to have a ratio over 1.0 between a material gas concentration of the second element to a material gas concentration of the first element. A concentration of a first conductivity type impurity in the first region is higher than a concentration of the first conductivity type impurity in the second region.
    • 要解决的问题:提供可以实现特性的改善和稳定的晶体管及其制造方法。解决方案:根据实施例的晶体管包括结构,绝缘膜,控制电极,第一电极和 第二电极。 该结构包括第一导电类型的第一半导体区域,设置在第一半导体区域上的第二导电类型的第二半导体区域和设置在第二半导体区域上的第一导电类型的第三半导体区域,并且包括具有第一元素的化合物半导体 第二个元素。 控制电极设置在绝缘膜上。 第一电极与第三半导体区域电连接。 第二电极与第一半导体区域电连接。 该结构包括设置在第二半导体区域的底部边缘之上的第一区域和除第一区域之外的第二区域。 第一区域是形成为在第二元素的材料气体浓度与第一元素的材料气体浓度之间具有超过1.0的比率的区域。 第一区域中的第一导电型杂质的浓度高于第二区域中的第一导电类型杂质的浓度。
    • 8. 发明专利
    • Semiconductor device
    • 半导体器件
    • JP2012059744A
    • 2012-03-22
    • JP2010198629
    • 2010-09-06
    • Toshiba Corp株式会社東芝
    • KONO HIROSHISHINOHE TAKASHIOTA CHIHARUMIZUKAMI MAKOTOSUZUKI TAKUMANISHIO JOJI
    • H01L29/12H01L21/336H01L29/78
    • H01L29/7395H01L29/1033H01L29/66333
    • PROBLEM TO BE SOLVED: To provide a semiconductor device using silicon carbide (SiC) that has low on-resistance and can achieve a stable breakdown voltage under high temperatures.SOLUTION: A semiconductor device comprises: a silicon carbide substrate having a first and second primary surfaces; a first silicon carbide layer of a first conductive type provided on the first primary surface; first silicon carbide regions of a second conductive type formed on a surface of the first silicon carbide layer; second silicon carbide regions of a first conductive type formed on surfaces of the first silicon carbide regions; third silicon carbide regions of a second conductive type formed on the surfaces of the first silicon carbide regions; fourth silicon carbide regions of a second conductive type that are formed between the first silicon carbide regions and the second silicon carbide regions and have a higher impurity concentration than that of the first silicon carbide regions; a gate insulating film; a gate electrode formed on the gate insulating film; an interlayer insulating film covering the gate electrode; a first electrode electrically connected to the second silicon carbide regions and the third silicon carbide regions; and a second electrode formed on the second primary surface.
    • 要解决的问题:提供使用具有低导通电阻并且可以在高温下实现稳定的击穿电压的碳化硅(SiC)的半导体器件。 解决方案:半导体器件包括:具有第一和第二主表面的碳化硅衬底; 设置在所述第一主表面上的第一导电类型的第一碳化硅层; 形成在第一碳化硅层的表面上的第二导电类型的第一碳化硅区域; 形成在第一碳化硅区域的表面上的第一导电类型的第二碳化硅区域; 形成在第一碳化硅区域的表面上的第二导电类型的第三碳化硅区域; 形成在第一碳化硅区域和第二碳化硅区域之间并且具有比第一碳化硅区域的杂质浓度更高的第二导电类型的第四碳化硅区域; 栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; 覆盖栅电极的层间绝缘膜; 电连接到第二碳化硅区域和第三碳化硅区域的第一电极; 以及形成在第二主表面上的第二电极。 版权所有(C)2012,JPO&INPIT
    • 9. 发明专利
    • Silicon carbide semiconductor device
    • 硅碳化硅半导体器件
    • JP2013138245A
    • 2013-07-11
    • JP2013036973
    • 2013-02-27
    • Toshiba Corp株式会社東芝
    • SUZUKI TAKUMAKONO HIROSHISHINOHE TAKASHI
    • H01L29/78H01L21/28H01L21/283H01L21/336H01L29/12H01L29/739
    • PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor device with improved reliability of a gate insulating film.SOLUTION: The silicon carbide semiconductor device includes: a silicon carbide substrate having a first primary surface and a second primary surface; a first silicon carbide layer of a first conductivity type provided on the first primary surface of the silicon carbide substrate; a second silicon carbide layer of a second conductivity type provided on the first silicon carbide layer; a first silicon carbide region of the first conductivity type and a second silicon carbide region of the first conductivity type provided spaced apart from the first silicon carbide region and having the same depth and the same impurity concentration distribution as the first silicon carbide region that are provided on a surface of the second silicon carbide layer; a third silicon carbide region of the first conductivity type connecting the second silicon carbide region and the first silicon carbide layer; a gate insulating film continuously formed on surfaces of the first silicon carbide region and the second silicon carbide region, and a surface of the second silicon carbide layer sandwiched between the first silicon carbide region and the second silicon carbide region; a gate electrode formed on the gate insulating film; a first electrode buried in a trench at a portion adjacent to the second silicon carbide layer and the first silicon carbide region; and a second electrode formed on the second primary surface of the silicon carbide substrate.
    • 要解决的问题:提供具有改善的栅极绝缘膜的可靠性的碳化硅半导体器件。解决方案:碳化硅半导体器件包括:具有第一主表面和第二主表面的碳化硅衬底; 设置在碳化硅衬底的第一主表面上的第一导电类型的第一碳化硅层; 设置在第一碳化硅层上的第二导电类型的第二碳化硅层; 第一导电类型的第一碳化硅区域和第一导电类型的第二碳化硅区域与第一碳化硅区域间隔开并具有与所提供的第一碳化硅区域相同的深度和相同的杂质浓度分布 在第二碳化硅层的表面上; 连接第二碳化硅区域和第一碳化硅层的第一导电类型的第三碳化硅区域; 连续地形成在第一碳化硅区域和第二碳化硅区域的表面上的栅极绝缘膜和夹在第一碳化硅区域和第二碳化硅区域之间的第二碳化硅层的表面; 形成在栅极绝缘膜上的栅电极; 在与所述第二碳化硅层相邻的部分和所述第一碳化硅区域中埋设在沟槽中的第一电极; 以及形成在碳化硅衬底的第二主表面上的第二电极。
    • 10. 发明专利
    • Semiconductor device and manufacturing method for the same
    • 半导体器件及其制造方法
    • JP2012190982A
    • 2012-10-04
    • JP2011052788
    • 2011-03-10
    • Toshiba Corp株式会社東芝
    • KONO HIROSHINAKABAYASHI YUKIOSHINOHE TAKASHIMIZUKAMI MAKOTO
    • H01L29/78H01L21/28H01L29/12H01L29/423H01L29/49
    • H01L29/7802H01L21/049H01L29/0623H01L29/1608H01L29/4236H01L29/45H01L29/4966H01L29/66068H01L29/7813
    • PROBLEM TO BE SOLVED: To provide a semiconductor element with high breakdown voltage.SOLUTION: A semiconductor device includes: a silicon carbide substrate having first and second main surfaces; a first silicon carbide layer of a first conductivity type provided on the first main surface of the silicon carbide substrate; a first silicon carbide region of a second conductivity type formed on a surface of the first silicon carbide layer; a second silicon carbide region of the first conductivity type formed on a surface of the first silicon carbide region; a third silicon carbide region of the second conductivity type formed on the surface of the first silicon carbide region; a gate insulation film formed successively on the surfaces of the first silicon carbide layer, the first silicon carbide region, and the third silicon carbide region; a first electrode including silicon carbide formed on the gate insulation film; a second electrode formed on the first electrode; an interlayer insulation film covering the first and second electrodes; a third electrode electrically connected to the second silicon carbide region and the third silicon carbide region; and a fourth electrode formed on the second main surface of the silicon carbide substrate.
    • 要解决的问题:提供具有高击穿电压的半导体元件。 解决方案:半导体器件包括:具有第一和第二主表面的碳化硅衬底; 设置在碳化硅衬底的第一主表面上的第一导电类型的第一碳化硅层; 形成在第一碳化硅层的表面上的第二导电类型的第一碳化硅区域; 形成在第一碳化硅区域的表面上的第一导电类型的第二碳化硅区域; 形成在第一碳化硅区域的表面上的第二导电类型的第三碳化硅区域; 在第一碳化硅层,第一碳化硅区域和第三碳化硅区域的表面上连续形成的栅极绝缘膜; 包括形成在所述栅极绝缘膜上的碳化硅的第一电极; 形成在第一电极上的第二电极; 覆盖所述第一和第二电极的层间绝缘膜; 电连接到第二碳化硅区域和第三碳化硅区域的第三电极; 以及形成在碳化硅衬底的第二主表面上的第四电极。 版权所有(C)2013,JPO&INPIT