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1. 发明专利

JP2009182323A Semiconductor wafer exposure apparatus and method 审中-公开
标题翻译：半导体波形曝光装置和方法
公开(公告)号：JP2009182323A
公开(公告)日：2009-08-13
申请号：JP2008328710
申请日：2008-12-24
申请人： Toshiba Corp , 株式会社東芝
发明人： EMA TATSUHIKO , MOTOI TAKASHI
IPC分类号： H01L21/027
CPC分类号： G03B27/42 , G03B27/68 , G03F7/70258 , G03F7/70641 , G03F7/70783
摘要： PROBLEM TO BE SOLVED: To provide semiconductor wafer exposure apparatus and method for improving lithography performance. SOLUTION: Semiconductor wafer exposure apparatus includes a plurality of lenses 110 for illuminating light on a semiconductor wafer, a leveling sensor 122 for measuring a topography of the semiconductor wafer to generate data according to the topography, an analyzer 112 for defining an aberration induced on a focal plane by receiving data from the leveling sensor, a controller 114 for inducing the aberration by regulating at least a lens in a plurality of lenses. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供用于提高光刻性能的半导体晶片曝光装置和方法。解决方案：半导体晶片曝光装置包括用于照射半导体晶片上的光的多个透镜110，用于测量半导体晶片的形貌以根据地形产生数据的调平传感器122，用于限定像差的分析器112 通过从调平传感器接收数据在焦平面上感应的控制器114，用于通过调节多个透镜中的至少一个透镜来引起像差。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2010103389A Method of manufacturing semiconductor memory 审中-公开
标题翻译：制造半导体存储器的方法
公开(公告)号：JP2010103389A
公开(公告)日：2010-05-06
申请号：JP2008275130
申请日：2008-10-27
申请人： Toshiba Corp , 株式会社東芝
发明人： IGUCHI SUNAO , BABA MASANOBU , TAKAHATA KAZUHIRO , NAKAJIMA FUMIHARU , MUKAI HIDEFUMI , EMA TATSUHIKO , KAWAI BURANDO , KADOTA KENICHI , KIKUTANI KEISUKE
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor memory high in accuracy of widths of line and space.
SOLUTION: The method of manufacturing the semiconductor memory includes steps of: forming a first pattern constituted of a silicon material film on a film to be worked; oxidizing both side surfaces and an upper surface of the first pattern to form a silicon oxide film and removing a part of the silicon oxide film formed on the upper surface to form a second pattern constituted of the silicon oxide films formed on both side surfaces; removing the first pattern to form a mask pattern constituted of the second pattern; and working the film to be worked, exposed from the mask pattern.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种高线性和空间宽度精度的半导体存储器的制造方法。解决方案：制造半导体存储器的方法包括以下步骤：在待加工的膜上形成由硅材料膜构成的第一图案; 氧化第一图案的两个侧表面和上表面以形成氧化硅膜并去除形成在上表面上的氧化硅膜的一部分，以形成由形成在两个侧表面上的氧化硅膜构成的第二图案; 去除第一图案以形成由第二图案构成的掩模图案; 并将电影工作，从面具图案中露出。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2004363444A Method of manufacturing semiconductor, and substrate treating apparatus 有权
公开(公告)号：JP2004363444A
公开(公告)日：2004-12-24
申请号：JP2003162020
申请日：2003-06-06
申请人： Toshiba Corp , 株式会社東芝
发明人： TAKEISHI TOMOYUKI , HAYAZAKI KEI , KAWANO KENJI , ITO SHINICHI , EMA TATSUHIKO
IPC分类号： H01L21/3065
摘要： PROBLEM TO BE SOLVED: To suppress the flow of a reaction product when making radical molecules/atoms such as OH radicals, O radicals and a resin film react by photoexcitation. SOLUTION: This method includes a process for forming the resin film on the main surface of a substrate to be treated, a process for making an atmosphere containing the molecules which generate OH radicals and/or O radicals when they are irradiated with ultraviolet rays contact the main surface of the substrate to be treated, a process for irradiating the main surface of the substrate to be treated with the ultraviolet rays, a process for generating the OH radical and/or O radical from the molecules with the ultraviolet rays, a process for making the generated OH radical and/or O radical with the resin film to generate the reaction product, and a process for cooling the substrate to be treated to a temperature where the generated reaction product never flows when irradiating the main surface with ultraviolet rays. COPYRIGHT: (C)2005,JPO&NCIPI

4. 发明专利

JP2012049454A Semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：JP2012049454A
公开(公告)日：2012-03-08
申请号：JP2010192415
申请日：2010-08-30
申请人： Toshiba Corp , 株式会社東芝
发明人： MURANISHI KIYOSHI , EMA TATSUHIKO
IPC分类号： H01L23/12 , G03F7/11 , H01L21/027 , H01L21/3205 , H01L23/52
CPC分类号： H01L2224/16225
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing method which can inhibit deterioration in characteristics of bonding pads.SOLUTION: The semiconductor device manufacturing method comprising: forming an interlayer film 10 so as to coat re-wiring layers 8a and 8b formed on an LSI substrate 1 and each containing a first metal, and pad electrodes 22 formed on the LSI substrate 1 to serve as bonding pads each containing a second metal; exposing portions of the interlayer film 10 corresponding to a region on which micro bumps connected to the re-wiring layers 8a and 8b are to be formed and a region on which bonding wires are to be connected; developing the portions with a first alkali developer containing alkaline aqueous solution to form a first opening 10a in the interlayer film 10 so as to expose the re-wiring layers 8a and 8b and also to form a second opening 10b in the interlayer film 10 so as to expose the pad electrodes 22; and developing remaining exposed portion on the interlayer film 10 with a second alkali developer containing tetramethyl ammonium hydroxide and polyalcohol.
摘要翻译：要解决的问题：提供一种能够抑制接合焊盘的特性劣化的半导体制造方法。解决方案：半导体器件制造方法包括：形成层间膜10，以便涂覆形成在LSI衬底1上的每个包含第一金属的再布线层8a和8b，以及形成在LSI衬底上的焊盘电极22 1，用作每个含有第二金属的接合焊盘; 露出对应于要形成与再布线层8a和8b连接的微凸块的区域的区域的中间膜10的部分和要连接接合线的区域; 用含有碱性水溶液的第一碱性显影剂显影部分，以在层间膜10中形成第一开口10a，以使再布线层8a和8b露出，并在层间膜10中形成第二开口10b，以便露出焊盘电极22; 并用含有四甲基氢氧化铵和多元醇的第二碱性显影剂在中间膜10上显影剩余的暴露部分。版权所有（C）2012，JPO＆INPIT

5. 发明专利

JP2005150763A Solid film forming method 审中-公开
标题翻译：固体膜形成方法
公开(公告)号：JP2005150763A
公开(公告)日：2005-06-09
申请号：JP2004367913
申请日：2004-12-20
申请人： Toshiba Corp , 株式会社東芝
发明人： ITO SHINICHI , EMA TATSUHIKO , YAMADA NOBUHIDE , NAKADA RENPEI , OKUMURA KATSUYA
IPC分类号： G03F7/16 , B05D1/26 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To provide a solid film forming method in which a solid film of an approximately even thickness along the surface of a substrate is obtained, when forming a liquid film on the substrate having a step, removing a solvent in the liquid film, and forming the solid film. SOLUTION: The solid film forming method has a process of discharging a solution in which a solid content is dissolved in the solvent, for a substrate 401 which has concaves and convexes of step heights d, in which the ratio of the area of the convex to the whole area is a (1> a> 0), and the ratio of the area of the concave to the whole area is 1-a, moving relatively a discharging nozzle and the substrate 401, and forming the liquid film 402 on the substrate 401, and a process of removing the solvent in the liquid film 402, and forming the solid film 403 which is composed of the solid content. At the time of forming the liquid film 402, the thickness h of the liquid film 402 satisfies a relation of h>(11-a) d. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种固体成膜方法，其中获得沿着基板表面的大致均匀厚度的固体膜，当在具有台阶的基板上形成液膜时，除去溶剂液膜，并形成固体膜。解决方案：固体成膜方法具有将固体成分溶解在溶剂中的溶液排出的工序，对于具有阶梯高度d的凹凸的基板401，其中，对于整个区域的凸起为（1> a> 0），并且凹面与整个面积的面积比为1-a，相对于排出喷嘴和基板401移动，并且形成液膜402 在基板401上，以及除去液膜402中的溶剂的工序，形成由固体成分构成的固体膜403。在形成液膜402时，液膜402的厚度h满足h>（11-a）d的关系。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2013197444A Manufacturing apparatus and manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造设备和制造方法
公开(公告)号：JP2013197444A
公开(公告)日：2013-09-30
申请号：JP2012064950
申请日：2012-03-22
申请人： Toshiba Corp , 株式会社東芝
发明人： EMA TATSUHIKO
IPC分类号： H01L21/316 , B05C11/10 , G03F7/16 , H01L21/027 , H01L21/31
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing apparatus and a manufacturing method of a semiconductor device, which can prevent swinging of a material to be coated on a substrate at the time of a discharge start and a discharge end of the material.SOLUTION: A semiconductor device manufacturing apparatus according to an embodiment comprises a discharge part and a control part. The discharge part discharges a material to be coated on a substrate. The control part raises a supply pressure of the material to be supplied to the discharge part to a first pressure to cause the discharge part to start discharge of the material; lowers the supply pressure to a second pressure at which the material discharged from the discharge part does not swing and maintains the supply pressure; and subsequently raises the supply pressure to a third pressure to cause the discharge part to terminate discharge of the material.
摘要翻译：要解决的问题：提供一种半导体装置的制造装置和制造方法，其可以防止在材料的放电开始和放电结束时待涂覆的材料在基板上的摆动。解决方案：A 根据实施例的半导体器件制造装置包括放电部分和控制部分。放电部件将要涂覆的材料放电在基板上。控制部将提供给排出部的材料的供给压力提高到第一压力，使排出部开始排出材料; 将供给压力降低到从排出部排出的材料不摆动并保持供给压力的第二压力; 随后将供给压力提高到第三压力，使排出部终止材料的排出。

7. 发明专利

JP2012204759A Substrate holding device, substrate cleaning device, and substrate processing device 有权
标题翻译：基板保持装置，基板清洁装置和基板处理装置
公开(公告)号：JP2012204759A
公开(公告)日：2012-10-22
申请号：JP2011070120
申请日：2011-03-28
申请人： Toshiba Corp , Sokudo Co Ltd , 株式会社Sokudo , 株式会社東芝
发明人： EMA TATSUHIKO , EBARA KEISUKE , SAWAI HIDEFUMI , NISHIYAMA KOJI
IPC分类号： H01L21/683 , G02F1/1333 , G11B5/84 , H01L21/027 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a substrate holding device, a substrate cleaning device, and a substrate processing device capable of elongating a life of a holding member.SOLUTION: A spin plate 520 is provided on a spin chuck holding a substrate rotatably around a rotation axis parallel to a vertical direction. A supporting part 720 of a substrate holding mechanism 700 is mounted to the spin plate 520. A shaft part 730 is supported rotatably around a center axis of the shaft part 730 by the supporting part 720. A holding pin 710 having an approximate columnar shape is held rotatably in a circumferential direction by the shaft part 730. The shaft part 730 is rotated and shifted to a condition in which an outer peripheral face of the holding pin 710 contacts an outer peripheral end of the substrate and a condition in which the outer peripheral face of the holding pin 710 is separated from the outer peripheral end of the substrate. At the shaft part 730, fastening of a screw N1 blocks rotation of the holding pin 710 in the circumferential direction, and loosening of the screw N1 allows rotation of the holding pin 710 in the circumferential direction.
摘要翻译：要解决的问题：提供一种能够延长保持构件的寿命的基板保持装置，基板清洗装置和基板处理装置。解决方案：旋转板520设置在旋转卡盘上，该旋转卡盘围绕平行于垂直方向的旋转轴可旋转地保持基板。基板保持机构700的支撑部分720安装到旋转板520.轴部分730通过支撑部分720围绕轴部分730的中心轴线可旋转地支撑。具有近似圆柱形状的保持销710 通过轴部730在圆周方向上可旋转地保持。轴部730旋转并移动到保持销710的外周面与基板的外周端接触的状态，其中外周保持销710的表面与基板的外周端分离。在轴部730处，螺钉N1的紧固件阻止保持销710沿圆周方向的旋转，并且螺钉N1的松动允许保持销710沿圆周方向旋转。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2010156819A Semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：JP2010156819A
公开(公告)日：2010-07-15
申请号：JP2008334778
申请日：2008-12-26
申请人： Toshiba Corp , 株式会社東芝
发明人： KIYONO YURIKO , EMA TATSUHIKO
IPC分类号： G03F7/095 , G03F7/11 , G03F7/26 , G03F7/40
CPC分类号： G03F7/091 , G03F7/095 , H01L21/0276
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method excellent in pattering property in a resist patterning step using an anti-reflective coating.
SOLUTION: The semiconductor device manufacturing method includes: forming a first anti-reflective coating 11 on a semiconductor wafer 10; forming a second anti-reflective coating 12 on the first anti-reflective coating 11; forming a resist film 13 on the second anti-reflective coating 12; selectively exposing the resist film 13 to light; developing the resist film 13 and the anti-reflective coatings 11, 12 after the light exposure; and processing the semiconductor wafer 10 using as a mask a pattern of the resist film 13 obtained by the development. The photosensitizer concentration of the first anti-reflective coating 11 is higher than the photosensitizer concentration of the second anti-reflective coating 12.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种使用抗反射涂层的抗蚀剂图案化步骤中具有优异的图案特性的半导体器件制造方法。解决方案：半导体器件制造方法包括：在半导体晶片10上形成第一抗反射涂层11; 在第一抗反射涂层11上形成第二抗反射涂层12; 在第二抗反射涂层12上形成抗蚀膜13; 选择性地使抗蚀剂膜13曝光; 在曝光后显影抗蚀膜13和抗反射涂层11,12; 并使用通过显影获得的抗蚀剂膜13的图案作为掩模来处理半导体晶片10。第一抗反射涂层11的光敏剂浓度高于第二抗反射涂层12的光敏剂浓度。（C）2010，JPO和INPIT

9. 发明专利

JP2009088204A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009088204A
公开(公告)日：2009-04-23
申请号：JP2007255449
申请日：2007-09-28
申请人： Toshiba Corp , 株式会社東芝
发明人： EMA TATSUHIKO , ITO SHINICHI , SHO KOTARO
IPC分类号： H01L21/76 , H01L21/266 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To contribute to improvement in device characteristics by making it possible to set a resist size difference between an element formation region and an element isolation region during ion injection to be a desired value or below.
SOLUTION: A method of manufacturing a semiconductor device includes the steps of: forming an element isolation groove to enclose the element formation region 102 of a semiconductor substrate 10; forming the element isolation region 103 by planarizing an insulating film 104 after embedding the insulating film 104 in the groove; forming a transistor by forming a gate insulating film 111, a gate electrode 112, and source/drain regions 114 and 115 in the element formation region 112; and forming a pattern of resist 121 to be a mask for ion injection across the element formation region 102 and element isolation region 121, wherein the thickness of the insulating film 104 is set to equal to or larger than a film thickness satisfying a desired breakdown voltage, and also set almost to the film thickness with which the difference between a resist size on the insulating film 104 and a resist size on the element formation region 102 has a minimum value.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过使离子注入期间的元件形成区域和元件隔离区域之间的抗蚀剂尺寸差成为期望值或更低，有助于改善器件特性。解决方案：制造半导体器件的方法包括以下步骤：形成元件隔离槽以包围半导体衬底10的元件形成区域102; 通过在将绝缘膜104嵌入槽之后对绝缘膜104进行平面化而形成元件隔离区域103; 通过在元件形成区域112中形成栅极绝缘膜111，栅极电极112和源极/漏极区域114和115来形成晶体管; 并且形成抗蚀剂图案121作为用于离子注入的掩模，跨越元件形成区域102和元件隔离区域121，其中绝缘膜104的厚度被设定为等于或大于满足期望击穿电压的膜厚度，并且几乎与绝缘膜104上的抗蚀剂尺寸和元件形成区域102上的抗蚀剂尺寸之间的差异具有最小值的膜厚度几乎相同。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JP2010135609A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2010135609A
公开(公告)日：2010-06-17
申请号：JP2008310948
申请日：2008-12-05
申请人： Toshiba Corp , 株式会社東芝
发明人： EMA TATSUHIKO , KATO HIROKAZU , ITO SHINICHI , KIYONO YURIKO
IPC分类号： H01L21/027 , G03F7/11 , G03F7/20 , H01L21/3065
CPC分类号： G03F7/091 , G03F7/11
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device wherein adhesiveness between a semiconductor wafer and a film formed thereupon is improved. SOLUTION: The method of manufacturing the semiconductor device includes the steps of: forming a base film 13 on the semiconductor wafer 10; carrying out baking processing to form a reaction layer 14 of the semiconductor wafer 10 and base film 13 between the both; performing wet processing to leave only the reaction layer 14 on the semiconductor wafer 10 by removing the base film 13; forming a resist film 15 on the reaction layer 14; performing selective exposure and development on the resist film 15 and selectively removing the resist film 15 to pattern the resist film 15; and performing processing for the semiconductor wafer 10 using the patterned resist film 15 as a mask. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供一种制造半导体器件的方法，其中半导体晶片与其上形成的膜之间的粘附性得到改善。解决方案：制造半导体器件的方法包括以下步骤：在半导体晶片10上形成基膜13; 进行烘烤处理以形成半导体晶片10的反应层14和两者之间的基膜13; 通过去除基膜13进行湿处理，仅留下半导体晶片10上的反应层14; 在反应层14上形成抗蚀膜15; 在抗蚀剂膜15上进行选择性曝光和显影，并选择性地去除抗蚀剂膜15以对抗蚀剂膜15进行图案化; 并使用图案化的抗蚀剂膜15作为掩模对半导体晶片10进行处理。版权所有（C）2010，JPO＆INPIT

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