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1. 发明专利

JPH01196949A CORDLESS TELEPHONE SYSTEM 失效
公开(公告)号：JPH01196949A
公开(公告)日：1989-08-08
申请号：JP2173788
申请日：1988-02-01
申请人： NIPPON TELEGRAPH & TELEPHONE , TOSHIBA CORP
发明人： OTA YUJI , TANAKA MASAYUKI , FUSE SHOJI
IPC分类号： H04M1/00 , H04B7/26
摘要： PURPOSE:To prevent a call when a hook-off switch is depressed in mistake during carrying by adding a call inhibiting means to a radio telephone set. CONSTITUTION:A call inhibition switch 27 is provided between a control section 22 and a hook-off switch 23. Then the call inhibition switch 27 is turned off to interrupt a signal line from the switch 23 to the control section 22. As a result, even when the hook-off switch 23 is operated, the operation is not detected by the control section 22. Thus, even when the hook-off switch 23 is operated, no radio line 2 is established between a maser set 1 and a radio telephone set 2. Thus, mis-calling is prevented in a state possible for incoming reply.

2. 发明专利

JPH01177244A DIAL REGISTERING SYSTEM FOR CODELESS TELEPHONE SYSTEM 失效
公开(公告)号：JPH01177244A
公开(公告)日：1989-07-13
申请号：JP82588
申请日：1988-01-06
申请人： TOSHIBA CORP , NIPPON TELEGRAPH & TELEPHONE
发明人： TANAKA MASAYUKI , KOIKE FUMIO , ITO KOICHI , TOKI AKIO , TOBA MASANORI
IPC分类号： H04M1/00 , H04M1/27
摘要： PURPOSE:To prevent the failure of a dial number registration by annunciating a registration end when the registration of a dial number is ended. CONSTITUTION:A master device 1 is connected with a wireless telephone set 2 through a wireless line and with a wire line 3. Then, on the registration of a dial number, the master device 1 annunciates that a registration number is transmitted from the wireless telephone set 2. Consequently, the registration end of the dial number can be perceived and an operation to transmit a ring-off signal can be executed after the registration number is transmitted. Thus, the failure of the dial number registration can be prevented.

3. 发明专利

JPH01198151A RADIO CONNECTING SYSTEM FOR CORDLESS TELEPHONE SYSTEM 失效
公开(公告)号：JPH01198151A
公开(公告)日：1989-08-09
申请号：JP2218888
申请日：1988-02-02
申请人： NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , TOKYO SHIBAURA ELECTRIC CO
发明人： TOYAMA HIDEKI , OTA YUJI , SAEGUSA SHIN , SHIMURA YUKIHIRO , TANAKA MASAYUKI , FUSE SHOJI
IPC分类号： H04M1/00 , H04B7/26 , H04W76/02 , H04W84/10
摘要： PURPOSE:To facilitate the release of a call by allowing a master system to cut the radio connection with a radio telephone set while holding the connection of a wire circuit when the deterioration of S/N under a radio connected state is detected and to execute a recall with the aid of the radio telephone set after that. CONSTITUTION:When an electric field detection circuit 31 detects the deterioration of the S/N, a control part 37 sends a hold signal. The master system 1 connects a change-over switch 21 to a hold sound generation circuit 23 side and makes the wire circuit to be a held state. When a hook switch 47 is hooked on in the radio telephone set 3, the master system 1 cuts radio circuits 5 and 7. After that, when the operator of the telephone set 3 hooks off the switch 47, the recall is executed and the S/N detected by the circuit 31 is good, the radio circuits 5 and 7 are constituted again.

4. 发明专利

JPH0943462A OPTICAL FIBER CABLE 失效
公开(公告)号：JPH0943462A
公开(公告)日：1997-02-14
申请号：JP19000595
申请日：1995-07-26
申请人： FURUKAWA ELECTRIC CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： IWAKURA DAISUKE , OTAKE AKIHIRO , TANAKA MASAYUKI , HAYAMIZU SHIGEKAZU , IWATA HIDEYUKI , NOZAWA MASARU
IPC分类号： G02B6/44
摘要： PROBLEM TO BE SOLVED: To provide an optical fiber cable capable of diminishing the strain acting on a coated optical fiber ribbon and sufficiently suppressing the transmission loss of this coated optical fiber ribbon. SOLUTION: The coated optical fiber ribbon 15 is housed into a groove 13 of a grooved spacer having the S-Z spiral groove 13. The coated optical fiber ribbon 15 is housed into the groove 13 in such a manner that the ribbon surface faces the groove bottom in the central part (f) between the inverting parts of the groove 13 and that the side edge of the ribbon in the side existing on the outer side of the bend of the groove 13 in the inverting parts faces the groove bottom when the coated optical fiber ribbon is assumed to be housed in the groove 13 in the state of directing the ribbon face toward the groove bottom in the inverting parts (a) (k) of the groove 13.

5. 发明专利

JP2013214552A Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013214552A
公开(公告)日：2013-10-17
申请号：JP2012082863
申请日：2012-03-30
申请人： Toshiba Corp , 株式会社東芝
发明人： KAI TETSUYA , TANAKA MASAYUKI
IPC分类号： H01L21/336 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L21/28282
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of improving charge retention characteristics, and a method for manufacturing the same.SOLUTION: A semiconductor device comprises a semiconductor substrate and a charge storage film having an interface of a concavo-convex shape and provided on a tunnel insulating film. A method for manufacturing a semiconductor device of an embodiment comprises the steps of: forming a tunnel insulating film on the semiconductor substrate; forming a precursor layer on the tunnel insulating film; and forming a charge storage film by oxidizing the precursor layer by heat treatment, forming a first charge storage layer having a concavo-convex shape on a surface of the precursor layer, and forming a second charge storage layer on the first charge storage layer.
摘要翻译：要解决的问题：提供能够提高电荷保持特性的半导体器件及其制造方法。解决方案：半导体器件包括半导体衬底和具有凹凸形状的界面的电荷存储膜，并提供在隧道绝缘膜上。一种实施例的半导体器件的制造方法包括以下步骤：在半导体衬底上形成隧道绝缘膜; 在隧道绝缘膜上形成前体层; 以及通过热处理氧化前体层形成电荷存储膜，在前体层的表面上形成具有凹凸形状的第一电荷存储层，并在第一电荷存储层上形成第二电荷存储层。

6. 发明专利

JP2013197187A Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013197187A
公开(公告)日：2013-09-30
申请号：JP2012060835
申请日：2012-03-16
申请人： Toshiba Corp , 株式会社東芝
发明人： TANAKA MASAYUKI , TORATANI KENICHIRO , MATSUO KAZUNORI
IPC分类号： H01L21/316 , C23C16/02 , C23C16/42 , H01L21/336 , H01L21/768 , H01L21/8247 , H01L23/522 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L21/02697 , H01L21/76801 , H01L21/7682 , H01L21/76829 , H01L23/49866 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of depositing a silicon oxide film of good quality at high speed, and a method for manufacturing the semiconductor device.SOLUTION: In a method for manufacturing a semiconductor device according to an embodiment, a first substrate film including one of atoms selected from among germanium, aluminum, tungsten, hafnium, titanium, tantalum, nickel, cobalt and alkaline earth metals is formed, a second substrate film including one of atoms which are selected from among germanium, aluminum, tungsten, hafnium, titanium, tantalum, nickel, cobalt and alkaline earth metals and are not included in the first substrate film is formed, and a silicon oxide film is formed using a silicon source or a siloxane-based silicon source by means of a CVD method or an ALD method, the silicon source including at least one selected from among an ethoxy group, a halogen group, an alkyl group and an amino group.
摘要翻译：要解决的问题：提供能够以高速度沉积高质量的氧化硅膜的半导体器件，以及制造半导体器件的方法。解决方案：在根据实施例的半导体器件的制造方法中，第一形成包括选自锗，铝，钨，铪，钛，钽，镍，钴和碱土金属中的一种原子的底物膜，包括选自锗，铝，钨，铪，钛，钽，镍，钴和碱土金属，并且不包括在第一衬底膜中，并且通过CVD法使用硅源或硅氧烷基硅源形成氧化硅膜，或 ALD方法，所述硅源包括选自乙氧基，卤素基团，烷基和氨基中的至少一种。

7. 发明专利

JP2013065777A Semiconductor device and manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的半导体器件和制造方法
公开(公告)号：JP2013065777A
公开(公告)日：2013-04-11
申请号：JP2011204561
申请日：2011-09-20
申请人： Toshiba Corp , 株式会社東芝
发明人： NAKAHARA KOJI , MATSUO KAZUNORI , TANAKA MASAYUKI , IIKAWA HIROFUMI
IPC分类号： H01L21/336 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L29/42324 , H01L29/7881
摘要： PROBLEM TO BE SOLVED: To improve writing characteristics by reducing high electric-field leakage.SOLUTION: A semiconductor device of an embodiment comprises: a semiconductor substrate; a charge accumulation layer formed on an active region partitioned by an element isolation insulating film in the semiconductor substrate via a gate insulating film; an inter-electrode insulating film formed on an upper surface of the element isolation insulating film and on a side surface and an upper surface of the charge accumulation layer; and a control electrode layer formed on the inter-electrode insulating film. The inter-electrode insulating film has a lamination structure in which a silicon nitride film or a high dielectric constant film is sandwiched by a two-layered silicon oxide film or a lamination structure of the high dielectric constant film and the silicon oxide film and a second silicon nitride film formed between the lamination structure and the control electrode layer. A portion on the upper surface of the charge accumulation layer in the second silicon nitride film is lost.
摘要翻译：要解决的问题：通过减少高电场泄漏来提高写入特性。解决方案：实施例的半导体器件包括：半导体衬底; 电荷累积层，其经由栅极绝缘膜形成在由半导体衬底中的元件隔离绝缘膜分隔的有源区上; 形成在所述元件隔离绝缘膜的上表面上的电极间绝缘膜和所述电荷蓄积层的侧表面和上表面; 以及形成在电极间绝缘膜上的控制电极层。电极间绝缘膜具有层叠结构，其中氮化硅膜或高介电常数膜被两层氧化硅膜或高介电常数膜和氧化硅膜的层压结构夹在中间，第二层形成在层叠结构和控制电极层之间的氮化硅膜。第二氮化硅膜中的电荷累积层的上表面的一部分损失。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2012119566A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012119566A
公开(公告)日：2012-06-21
申请号：JP2010269315
申请日：2010-12-02
申请人： Toshiba Corp , 株式会社東芝
发明人： NAKAO TAKASHI , TORAYA KENICHIRO , TANAKA MASAYUKI
IPC分类号： H01L27/105 , H01L45/00 , H01L49/00 , H01L49/02
摘要： PROBLEM TO BE SOLVED: To provide a high-quality semiconductor device and to provide a method of manufacturing the same.SOLUTION: A semiconductor device comprises: first wiring L2(i); second wiring L3(j) intersecting the first wiring; and memory cell structures CUs that are each provided in each region where the first wiring and the second wiring intersect, in which a first end is connected to the first wiring and a second end is connected to the second wiring, and to which a variable resistance element 25 and a non-ohmic element D-mim are serially connected. The non-ohmic element includes, as an insulating layer 22, a first layer 22a; a second layer 22b that has a different band gap from the first layer and is provided on the first layer; and a third layer 22c that has a different band gap from the second layer and is provided on the second layer.
摘要翻译：要解决的问题：提供一种高质量的半导体器件，并提供其制造方法。解决方案：半导体器件包括：第一布线L2（i）; 与第一布线相交的第二布线L3（j）; 以及存储单元结构C CU，其各自设置在第一布线和第二布线相交的每个区域中，其中第一端连接到第一布线，第二端连接到第二布线，并且可变电阻元件25和非欧姆元件D-mim串联连接。非欧姆元件包括作为绝缘层22的第一层22a; 第二层22b，其具有与第一层不同的带隙并设置在第一层上; 以及与第二层具有不同带隙并设置在第二层上的第三层22c。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2012114199A Semiconductor device and manufacturing method for the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012114199A
公开(公告)日：2012-06-14
申请号：JP2010261128
申请日：2010-11-24
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUO KAZUNORI , TANAKA MASAYUKI
IPC分类号： H01L29/792 , H01L21/336 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788
CPC分类号： H01L27/11521 , H01L21/28273 , H01L29/513 , H01L29/7883
摘要： PROBLEM TO BE SOLVED: To further improve the insulation characteristic of an inter-electrode insulation film which is provided between a floating gate electrode film and a control gate electrode film.SOLUTION: A semiconductor device according to this embodiment includes: a semiconductor substrate; a charge accumulation layer provided for the semiconductor substrate via a gate insulation film; an inter-electrode insulation film formed on the charge accumulation layer and having a multilayer structure including a laminate structure in which a silicon nitride film is sandwiched between two silicon oxide films; and a control electrode layer formed on the inter-electrode insulation film. In the silicon nitride film of the inter-electrode insulation film, the thickness of the silicon nitride film on an upper surface part of the charge accumulation layer is smaller than that of the silicon nitride film on a side face part of the charge accumulation layer. In the silicon oxide film formed on the silicon nitride film, the thickness of the silicon oxide film on an upper surface part of the charge accumulation layer is larger than that of the silicon oxide film on a side face part of the charge accumulation layer.
摘要翻译：要解决的问题：为了进一步提高设置在浮栅电极膜和控制栅极电极膜之间的电极间绝缘膜的绝缘特性。解决方案：根据本实施例的半导体器件包括：半导体衬底; 经由栅极绝缘膜为半导体衬底提供的电荷累积层; 在所述电荷蓄积层上形成的电极间绝缘膜，具有包含氮化硅膜夹在两个氧化硅膜之间的叠层结构的多层结构; 以及形成在所述电极间绝缘膜上的控制电极层。在电极间绝缘膜的氮化硅膜中，电荷蓄积层的上表面部分的氮化硅膜的厚度比电荷累积层的侧面部分的氮化硅膜的厚度小。在形成在氮化硅膜上的氧化硅膜中，电荷蓄积层的上表面部分上的氧化硅膜的厚度大于电荷累积层的侧面部分上的氧化硅膜的厚度。版权所有（C）2012，JPO＆INPIT

10. 发明专利

JP2012089817A Semiconductor memory device and method for manufacturing the same 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：JP2012089817A
公开(公告)日：2012-05-10
申请号：JP2011073248
申请日：2011-03-29
申请人： Toshiba Corp , 株式会社東芝
发明人： TANAKA MASAYUKI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7881 , H01L21/76224 , H01L27/11521 , H01L29/42336 , H01L29/518
摘要： PROBLEM TO BE SOLVED: To improve a write characteristics.SOLUTION: The method for manufacturing the semiconductor memory device comprises a step for forming a tunnel insulation film 11 on a substrate 10; a step for forming a charge storage layer 12 consisting of a conductor on the tunnel insulation film; a step for forming an element isolation trench 22 isolating the charge storage layer and the tunnel insulation film in the substrate by processing the charge storage layer, the tunnel insulation film and the substrate; a step for embedding an element isolation insulation film 13 in the element isolation trench so that its upper surface is higher than a lower surface of the charge storage layer and is lower than an upper surface of the charge storage layer; a step for removing a natural oxide film 30 formed on the surface of the charge storage layer; and a step for forming an insulation film 14 on surfaces of the element isolation insulation film and the charge storage layer. Steps from the step for removing the natural oxide film to the step for forming the insulation film are performed in a manufacturing apparatus in which an internal oxygen concentration is controlled.
摘要翻译：要解决的问题：提高写入特性。解决方案：半导体存储器件的制造方法包括在衬底10上形成隧道绝缘膜11的步骤; 在隧道绝缘膜上形成由导体构成的电荷存储层12的步骤; 通过处理电荷存储层，隧道绝缘膜和衬底来形成隔离衬底中的电荷存储层和隧道绝缘膜的元件隔离沟槽22的步骤; 用于将元件隔离绝缘膜13嵌入元件隔离沟槽中以使其上表面高于电荷存储层的下表面并且低于电荷存储层的上表面的步骤; 去除形成在电荷存储层的表面上的自然氧化膜30的步骤; 以及在元件隔离绝缘膜和电荷存储层的表面上形成绝缘膜14的步骤。在将自然氧化膜除去步骤到形成绝缘膜的步骤的步骤在其中控制内部氧浓度的制造装置中进行。版权所有（C）2012，JPO＆INPIT

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