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1. 发明专利

JP2004056108A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2004056108A
公开(公告)日：2004-02-19
申请号：JP2003147889
申请日：2003-05-26
申请人： Infineon Technologies Ag , Toshiba Corp , インフィネオンテクノロジースアクチエンゲゼルシャフト , 株式会社東芝
发明人： ARISUMI OSAMU , IMAI KEITAROU , YAMAKAWA KOJI , BUN NORIKI
IPC分类号： H01L21/316 , H01L21/8246 , H01L27/105
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a capacitor of superior characteristics and reliability, and to provide a method for manufacturing it.
SOLUTION: This semiconductor device comprises lower electrodes 11 and 12; upper electrodes 14 and 15; and a dielectric film 13 formed of a perovskite type ferroelectric containing Pb, Zr, Ti and O, which is interposed between the upper electrode and the lower electrode. The dielectric film contains a first part 13a formed of a plurality of crystal grains blocked out by grain boundaries in a plurality of directions.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种具有优异特性和可靠性的电容器的半导体器件，并提供其制造方法。解决方案：该半导体器件包括下电极11和12; 上电极14和15; 以及由含有Pb，Zr，Ti和O的钙钛矿型铁电体形成的电介质膜13，其插入在上电极和下电极之间。电介质膜包含由在多个方向上被晶界阻挡的多个晶粒形成的第一部分13a。版权所有（C）2004，JPO

2. 发明专利

JP2002134707A FERRODIELECTRIC MEMORY AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JP2002134707A
公开(公告)日：2002-05-10
申请号：JP2000330619
申请日：2000-10-30
申请人： TOSHIBA CORP
发明人： IMAI KEITAROU , YAMAKAWA KOJI
IPC分类号： H01L27/105 , H01L21/02 , H01L21/8246 , H01L27/115 , H01L29/76 , H01L29/94
摘要： PROBLEM TO BE SOLVED: To reduce the variety or difference in conversion of patterns, accompanying lithography or minute processing, furthermore to minimize its influence on the polarization quantity of a capacitor, and to attain minuteness, high integration and improve the reliability. SOLUTION: This ferrodielectric memory, comprising a ladder structure, is provided with a first plug which is connected to one of source and drain regions 106 of a transistor formed on an Si substrate 100, a second plug connected to another of the source and drain regions 106, a first capacitor electrode 115 connected to the first plug and formed into a block form, having two capacitor planes which are vertical to the channel direction, a ferrodielectric substance film 116 formed on the capacitor plane of the first capacitor electrode 115, and a second capacitor electrode 117 connected to the second plug and formed on the capacitor plane of the first capacitor electrode 115, while interlaying the ferrodielectric substance film 116 between them.

3. 发明专利

JP2000012791A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JP2000012791A
公开(公告)日：2000-01-14
申请号：JP17298798
申请日：1998-06-19
申请人： TOSHIBA CORP
发明人： IMAI KEITAROU , YAMAZAKI SOICHI , DEWA MITSUAKI
IPC分类号： H01L21/8247 , H01L21/31 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To obtain an MFS-type field effect transistor which is superior in characteristics. SOLUTION: A method of manufacturing an MFS-type field effect transistor comprises a first process, in which a buffer insulating film 102 is formed on a semiconductor board 101, a second process where insulating films 103 and 104 provided with an opening 105 are provided on the buffer insulating film 102, a third process where a conductor film is epitaxially grown in the opening 105 for the formation of a gate electrode 106 inside the opening 105. a fourth process where a ferroelectric film is epitaxially grown as a gate insulating film 107 on the gate electrode 106, and a fifth process where a semiconductor film 108 is formed on the gate insulating film 107.

4. 发明专利

JPH0982907A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH0982907A
公开(公告)日：1997-03-28
申请号：JP23162795
申请日：1995-09-08
申请人： TOSHIBA CORP
发明人： IMAI KEITAROU , NAKAMURA KENRO , EGUCHI KAZUHIRO , KIYOTOSHI MASAHIRO
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To prevent decrease of dielectric constant and generation of leak current, by adding metal ions whose valence is 3-4 and which can be replaced by B site metal ions whose valence is 4, in a perovskite metal oxide film. SOLUTION: An element isolation insulating film 102, a gate insulating film 103, a gate electrode 104, and N-type diffusion layers 105, 106 are formed on a P-type single crystal silicon substrate 101, and a silicon oxide film 107 is deposited. A contact hole 108 is formed and a Ti silicide film 109 is formed. A bit line 110, a CVD oxide film 111 and a contact hole 112 are formed, and an extraction electrode 113 is formed. A Ti film 114, a TiN film 115 and a lower capacitor electrode 116 are formed on the whole surface. A thin insulating film is formed on the whole surface, as a capacitor insulating film 117 which contains Fe of about 1wt.% and is 20nm thick. The thin insulating film has ABO3 type perovskite crystal structure wherein Ba and Sr ions are positioned in the A site and Ti ions are positioned in the B site. Thereby a semiconductor device of high reliability can be realized when the film is thinned.

5. 发明专利

JPH0786527A SEMICONDUCTOR MEMORY DEVICE 失效
公开(公告)号：JPH0786527A
公开(公告)日：1995-03-31
申请号：JP23128093
申请日：1993-09-17
申请人： TOSHIBA CORP
发明人： IMAI KEITAROU
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/788 , H01L29/792
摘要： PURPOSE:To increase a memory capacity by a method wherein the capacitor dielectric film is made of dielectric material having a plurality of spontaneous polarizations of different coercive electric field values. CONSTITUTION:First, when an electric field phi3 is applied to a lower capacitor electrode, if the initial state is a spontaneous polarization state A, the polarization is changed from P1 to P3 and, if the initial state is a spontaneous polarization state B, the polarization is changed from P2 to P3. As the value P3-P2 is smaller than the value P3-P1, if the change of the stored charge due to the change of the polarization is detected, the discrimination between the spontaneous polarization states A and B can be achieved. Then, if an electric field phi4 is applied to the lower electrode, the discrimination between spontaneous polarization states C and D can be achieved. Therefore, a non-volatile memory cell which can store 2-bit information can be obtained, so that the memory capacity can be doubled while the construction and integration degree of the memory cell are maintained as they are.

6. 发明专利

JPH06177347A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH06177347A
公开(公告)日：1994-06-24
申请号：JP22746793
申请日：1993-09-13
申请人： TOSHIBA CORP
发明人： IMAI KEITAROU , OKUMURA KATSUYA
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/108
摘要： PURPOSE:To obtain a capacitor wherein sufficient capacitance can be secured, irregularity of characteristics is not present, and reliability is high. CONSTITUTION:As a lower electrode 117, single crystal or quasi-single crystal of high orientation is formed. On the upper layer, a perovskite type high dielectric film 118 which is epitaxially grown on the storage node electrode is formed as a capacitor insulating film. On the upper layer, an upper electrode 119 is formed.

7. 发明专利

JPH01315141A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01315141A
公开(公告)日：1989-12-20
申请号：JP14587788
申请日：1988-06-15
申请人： TOSHIBA CORP
发明人： IMAI KEITAROU
IPC分类号： H01L21/318
摘要： PURPOSE:To obtain an insulating film whose capacitance and insulating breakdown strength are sufficient by a method wherein, when the insulating film is formed on the surface of a semiconductor such as silicon or the like, a CVD oxide film is formed and, after that, a thin nitride film is formed on the surface of the oxide film by thermal nitrification. CONSTITUTION:A CVD oxide film 3 is formed on the whole surface of a field insulating film 2 formed on a P-type silicon substrate 1; this CVD oxide film 3 is patterned; after that, a groove 4 having vertical side-walls is formed in the surface of the silicon substrate by making use of the oxide film as a mask. After that, the CVD oxide film 3 is removed; an n-type impurity layer 5 is formed on the side walls of the groove 4 and on the silicon surface in other capacitor regions; in succession, a CVD oxide film 6 is formed by, e.g., a low- pressure CVD method by thermal decomposition of TEOS (tetraethoxysilane) under a vacuum. Then, a thermal nitride film 7 of 20Angstrom is formed by thermal nitrification in NH3. By this setup, an insulating film whose insulating characteristic is excellent can be formed without lowering a capacitance of a capacitor.

8. 发明专利

JPH01206620A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01206620A
公开(公告)日：1989-08-18
申请号：JP3080088
申请日：1988-02-15
申请人： TOSHIBA CORP
发明人： IMAI KEITAROU , TSUNASHIMA YOSHITAKA
IPC分类号： H01L21/225 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108
摘要： PURPOSE:To make it possible to form a uniform diffusion layer and to contrive improvement in characteristics of the element to be formed by a method wherein, after the silicon surface processing has been finished using an anisotropic dry-etching, a silicon oxide containing N-type impurities is coated, and N-type impurities are diffused from the above-mentioned silicon oxide. CONSTITUTION:After a field insulating film 2 has been formed on a silicon substrate 1, a CVD oxide film 3 is patterned on the whole surface, a groove 4 having a vertical side wall is formed on the surface of the silicon substrate 1 by conducting a reactive ion-etching method using the above-mentioned pattern as a mask, and a contamination layer 5 and a damaged layer 6 are formed. Then, most part of the contamination layer 5 is removed by conducting a cleaning treatment, then a silicon oxide film 7 containing arsenic, for example, is formed on the whole surface, arsenic is diffused on the surface of the silicon substrate 1 in the N2 atmosphere of 1000 deg.C, and an N-type impurity layer 8 is formed. Then, the silicon oxide film 7 containing arsenic is removed, a gate oxide film 9 and a gate electrode 10 are formed, and a groove cutting capacitor is obtained. As a result, N-type impurities are uniformly diffused on the above- mentioned region in an excellent controllable manner, and junction characteristics and gate insulating characteristics can be improved.

9. 发明专利

JPS63237456A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63237456A
公开(公告)日：1988-10-03
申请号：JP7035787
申请日：1987-03-26
申请人： TOSHIBA CORP
发明人： YAMABE KIKUO , IMAI KEITAROU
IPC分类号： H01L27/04 , H01L21/316 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108
摘要： PURPOSE:To restrain a dielectric constant by making a silicon oxide film which constitutes a semiconductor device contain fluorine. CONSTITUTION:For example, a thermal oxide film 2 is selectively formed on a P-type silicon substrate 1. Then, after a CVD oxide film 3 is deposited on all the surface, the film is patterned and the mask of the oxide film 3 is provided. A groove 4 is formed by reactive ion etching on the mask. Then, the oxide film 3 is removed by etching with diluted hydrofluoric acid. Further, all the surface is oxidized in dried oxygen diluted with an 800 deg.C and 50 % argon gas, then oxidation is continued by adding 50 ppm nitrogen fluoride in an oxidized atmosphere and then, after the addition of the nitrogen fluoride is stopped, an oxide film 5 for an MOS capacitor is formed by adding the oxidation. Then, a normal phosphorus added polycrystalline silicon gate electrode 6 is formed. Especially, an insulating film which has excellent characteristics such as a dielectric constant can be obtained when the ratio of the number of fluorine atoms to the number of SiO2 molecules is 0.1-20 % and if the ratio is 1-5 %, greater effect can be obtained.

10. 发明专利

JPS62169356A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS62169356A
公开(公告)日：1987-07-25
申请号：JP895986
申请日：1986-01-21
申请人： TOSHIBA CORP
发明人： YAMABE KIKUO , IMAI KEITAROU
IPC分类号： H01L27/04 , H01L21/28 , H01L21/822 , H01L21/8242
摘要： PURPOSE:To improve the reliability of an MOS capacitor and the like, by forming a thermal oxide film on a substrate, thereafter removing the thermal oxide film by etching, rounding the protruded or recessed part at the surface of silicon, and thereafter newly forming an oxide film on the surface of the silicon. CONSTITUTION:A field oxide film 2 is formed on a P-type Si substrate 1. A groove 3 is formed in the substrate 1. An oxide film 4 (rounded oxide film) is once formed in oxygen including NF3 gas of 50 ppm at 800 deg.C for 30 minutes. Thereafter, the oxide film 4 is etched away. Then, a gate oxide film 5 having a thickness of 15 nm is formed in dry oxygen at 900 deg.C. Then, phosphorus added polycrystalline silicon 6 for a gate electrode is further formed thereon.

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