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1. 发明专利

JPH0448727A PLASMA PROCESSOR 失效
公开(公告)号：JPH0448727A
公开(公告)日：1992-02-18
申请号：JP15675690
申请日：1990-06-15
申请人： TOKYO ELECTRON LTD , TEL YAMANASHI KK
发明人： NISHIMURA EIICHI , TODA AKIHITO , SUGIYAMA KAZUHIKO , NAITO YUKIO
IPC分类号： C23F4/00 , H01J37/32 , H01L21/302 , H01L21/3065
摘要： PURPOSE:To get a plasma processor which can produce plasma stably, according to the atmospheric gas pressure condition inside a chamber by providing a power splitter, which varies the distribution ratio of the RF power supplied to opposed electrodes by changing over the tap of the coil on the secondary side of a transformer. CONSTITUTION:In a power distributing means 30 is provided a power splitter 50 for varying the distribution ratio of the RF power supplied to an upper electrode 12 and a lower electrode 14. That is, the coil 38 on the secondary side has middle terminals 40b-40j which devide the number of total turns equally between both ends 40a and 40k, and a movable terminal, whose one end is grounded, is constituted so that it can contact with some one of the tap terminals 40a and 40k at both ends and those 40b-40j at the middle of the coil 38 on the secondary side. In case that the pressure of the atmospheric gas inside a vacuum vessel 10 is relatively high, plasma stabilized condition is formed by connecting the movable terminal 52 to one end 40k of the coil 38 on the secondary side, and applying 100% RF power to the upper electrode 12. In case that the pressure is lower than it, the plasma stabilized condition is formed by varying the distribution ratio such as 90/10 or 80/20.

2. 发明专利

JP2014170894A Method of etching metal layer 有权
标题翻译：蚀刻金属层的方法
公开(公告)号：JP2014170894A
公开(公告)日：2014-09-18
申请号：JP2013043100
申请日：2013-03-05
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： NISHIMURA EIICHI , YAMASHITA FUMIKO , SASA KOYUMI
IPC分类号： H01L21/3065 , C23F4/00 , H01L21/3205 , H01L21/3213 , H01L21/768 , H01L23/532
CPC分类号： C23F4/00 , H01L21/02071 , H01L21/32136 , H05K3/027 , H05K2203/087 , H05K2203/092 , H05K2203/095 , H05K2203/1388 , H05K2203/1484 , H05K2203/1492 , H05K2203/1509
摘要： PROBLEM TO BE SOLVED: To provide a method of etching a copper layer while forming a protection layer containing carbon on a mask, with which it is possible to remove the protection layer formed at the time of the etching.SOLUTION: In an embodiment, a method of etching a metal layer is provided which includes the steps of: (a) etching a metal layer of a workpiece through etching based on ion sputtering while forming a protection layer containing carbon on a surface of a mask for the workpiece (step (a)); (b) exposing the workpiece to oxygen plasma after the step of etching the metal layer (step (b)); and (c) exposing the workpiece to hexafluoroacetylacetone after the step of exposing the workpiece to the oxygen plasma (step (c)).
摘要翻译：要解决的问题：提供一种在掩模上形成含有碳的保护层的同时蚀刻铜层的方法，通过该方法可以去除蚀刻时形成的保护层。解决方案：在一个实施方案中，提供蚀刻金属层的方法，其包括以下步骤：（a）通过基于离子溅射的蚀刻来蚀刻工件的金属层，同时在用于工件的掩模的表面上形成含有碳的保护层（步骤（a ））; （b）在蚀刻金属层的步骤之后将工件暴露于氧等离子体（步骤（b））; 和（c）在将工件暴露于氧等离子体的步骤（步骤（c））之后将工件暴露于六氟乙酰丙酮。

3. 发明专利

JP2013110139A Manufacturing method for semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2013110139A
公开(公告)日：2013-06-06
申请号：JP2011251397
申请日：2011-11-17
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： NISHIMURA EIICHI , SHOSHI TADASHI , YAMASHITA FUMIKO , ADACHI KENJI
IPC分类号： H01L21/3065 , H01L21/027
CPC分类号： H01L21/3088 , H01J37/32091 , H01L21/0337 , H01L21/3065 , H01L21/3081 , H01L21/3083 , H01L21/32137
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device capable of removing a silicon-containing layer in which a silicon oxide layer or a silicon nitride layer is formed in a side wall part without causing a residue and a loss in a lower layer film, and manufacturing a good-quality semiconductor device.SOLUTION: A manufacturing method for a semiconductor device comprises the steps of: forming a silicon oxide layer or a silicon nitride layer so as to cover the side wall part of the patterned silicon-containing layer formed on a substrate by the silicon nitride layer or the silicon oxide layer; and leaving the silicon nitride layer or the silicon oxide layer formed in the side wall part by selectively removing the silicon-containing layer (plasma etching step). The plasma etching step uses an etching gas including a SFgas.
摘要翻译：解决的问题：为了提供能够去除在侧壁部分中形成氧化硅层或氮化硅层的含硅层的半导体器件的制造方法，而不引起残留物和损耗在下层膜中，制造出优质的半导体器件。解决方案：半导体器件的制造方法包括以下步骤：形成氧化硅层或氮化硅层，以便通过氮化硅覆盖形成在衬底上的图案化含硅层的侧壁部分层或氧化硅层; 并且通过选择性地除去含硅层（等离子体蚀刻步骤）而留下形成在侧壁部分中的氮化硅层或氧化硅层。等离子体蚀刻步骤使用包括SF

4. 发明专利

JP2012199377A Substrate processing method and storage medium 有权
标题翻译：基板加工方法和储存介质
公开(公告)号：JP2012199377A
公开(公告)日：2012-10-18
申请号：JP2011062301
申请日：2011-03-22
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SONE TAKASHI , NISHIMURA EIICHI
IPC分类号： H01L21/3065 , C23F4/00
CPC分类号： H01L21/32136 , C23F4/00 , H01J37/32091 , H01L43/12
摘要： PROBLEM TO BE SOLVED: To provide a substrate processing method in which a layer containing at least platinum can be etched without using a halogen gas.SOLUTION: When a platinum-manganese layer 37 formed in a wafer W is etched using a tantalum layer 38 having a predetermined pattern shape, a processing gas containing a carbon monoxide gas, a hydrogen gas, and an argon gas is used. A ratio of a flow rate of the hydrogen gas to the total flow rate of the carbon monoxide gas and the hydrogen gas in the processing gas is 50 to 75%.
摘要翻译：要解决的问题：提供一种基板处理方法，其中可以在不使用卤素气体的情况下蚀刻至少含有铂的层。解决方案：使用具有预定图案形状的钽层38蚀刻在晶片W中形成的铂 - 锰层37时，使用含有一氧化碳气体，氢气和氩气的处理气体。氢气的流量与处理气体中的一氧化碳气体和氢气的总流量的比例为50〜75％。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2011216617A Pattern forming method 有权
标题翻译：图案形成方法
公开(公告)号：JP2011216617A
公开(公告)日：2011-10-27
申请号：JP2010082388
申请日：2010-03-31
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： FUJIWARA KAORU , TAMURA AKITAKE , DOBASHI KAZUYA , NISHIMURA EIICHI
IPC分类号： H01L21/027 , G03F7/20
摘要： PROBLEM TO BE SOLVED: To form a line and space structure where pattern collapse does not occur in a drying process after liquid cleaning.SOLUTION: In the pattern forming method, a plurality of projected stripe bodies which are almost parallel are formed on a substrate, films are formed on the projected stripe bodies formed on the substrate and the projected stripe bodies are removed after the films are formed. The plurality of first projected stripe bodies which are almost parallel and a plurality of second projected stripe bodies which are connected to ends of the plurality of first projected stripe bodies or cross the plurality of first projected stripe bodies are formed on the substrate. Connection parts or cross parts with the first projected stripe bodies in the plurality of second projected stripe bodies formed on the substrate are cut. The films are respectively formed on the surfaces of the first and second projected stripe bodies, and the first and second projected stripe bodies are removed after the films are formed.
摘要翻译：要解决的问题：形成在液体清洗之后的干燥过程中不发生图案塌陷的线和空间结构。解决方案：在图案形成方法中，在基板上形成大致平行的多个突出的条状体，在形成在基板上的突出的条状体上形成膜，并且在形成膜之后移除投影的条状体。多个第一投影条纹体几乎平行，并且多个第二投影条纹体连接到多个第一投影条纹体的端部或与多个第一投影条纹体交叉，形成在基板上。与形成在基板上的多个第二投影条纹体中的第一投影条纹体的连接部分或十字部分被切断。膜分别形成在第一和第二突出条纹体的表面上，并且在形成膜之后去除第一和第二突出条纹体。

6. 发明专利

JP2010219105A Substrate processing method 有权
标题翻译：基板处理方法
公开(公告)号：JP2010219105A
公开(公告)日：2010-09-30
申请号：JP2009061138
申请日：2009-03-13
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： KUSHIBIKI MASATO , NISHIMURA EIICHI
IPC分类号： H01L21/3065 , G03F7/40 , H01L21/027 , H01L21/31 , H01L21/316
CPC分类号： H01L21/0273 , H01L21/31116 , H01L21/31122 , H01L21/31138 , H01L21/31144
摘要： PROBLEM TO BE SOLVED: To provide a substrate processing method reinforcing etching resistance of a mask layer and improving a flexibility in working of a layer to be processed when forming an opening pattern of a dimension satisfying a request for downsizing a semiconductor device. SOLUTION: A mineralization step for mineralizing an organic film made of, for example, a photoresist film 53 as a mask layer of a wafer W, namely a substrate to be processed, has: an adsorption step for adsorbing a monovalent aminosilane on the surface of the photoresist film 53; and an oxidation step for oxidizing the adsorbed aminosilane by oxygen radical where oxygen is subjected to plasma excitation and hence modifying the photoresist film 53 to an Si oxide film. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种在形成满足半导体器件的尺寸要求的尺寸的开口图案时提供掩模层的耐蚀刻性的基板处理方法，提高待加工层的加工柔性。解决方案：用于使由例如作为晶片W的掩模层的光致抗蚀剂膜53即被处理基板制成的有机膜成矿的矿化步骤具有：将一价氨基硅烷吸附在光致抗蚀剂膜53的表面; 以及氧化步骤，用氧氧进行吸附的氨基硅烷氧化，氧气进行等离子体激发，从而将光致抗蚀剂膜53修饰成Si氧化膜。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2010212104A Plasma processing device 有权
标题翻译：等离子体加工装置
公开(公告)号：JP2010212104A
公开(公告)日：2010-09-24
申请号：JP2009057327
申请日：2009-03-11
申请人： Emd:Kk , Tokyo Electron Ltd , 東京エレクトロン株式会社 , 株式会社イー・エム・ディー
发明人： SETSUHARA YUICHI , NISHIMURA EIICHI , EBE AKINORI
IPC分类号： H05H1/46 , C23C16/505
CPC分类号： H01J37/3211 , H01J37/321
摘要： PROBLEM TO BE SOLVED: To provide a plasma processing device capable of forming a strong induction electromagnetic field in a vacuum container and homogenizing more density distribution of plasma and preventing contamination of a base body caused by generation of particles and sputtering of conductor of a high-frequency antenna. SOLUTION: The plasma processing device 10 with an inductive coupling system using high-frequency discharge has a vacuum container 11, an antenna arrangement section 12 arranged between an internal face 111B and an external face 111A of a wall of the vacuum container 11, one high-frequency antenna arranged at the antenna arrangement section 12 and terminated without turning, and a partition material 15 partitioning between the antenna arrangement section 12 and the inside 112 of the vacuum container and made from a dielectric. The length of the high-frequency antenna 13 is shorter than the length of one quarter wavelength of the high frequency. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在真空容器中形成强感应电磁场的等离子体处理装置，并且使等离子体的更多的密度分布均匀化并防止由于颗粒的产生和导体的溅射引起的基体的污染高频天线。解决方案：具有使用高频放电的电感耦合系统的等离子体处理装置10具有真空容器11，布置在真空容器11的壁的内表面111B和外表面111A之间的天线布置部分12 设置在天线配置部12并且不转动而终止的一个高频天线以及在天线配置部12与真空容器的内部112之间分隔并由电介质构成的分隔材料15。高频天线13的长度比高频四分之一波长的长度短。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2010161162A Fine pattern forming method 审中-公开
标题翻译：精细图案形成方法
公开(公告)号：JP2010161162A
公开(公告)日：2010-07-22
申请号：JP2009001745
申请日：2009-01-07
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SONE TAKASHI , NISHIMURA EIICHI
IPC分类号： H01L21/027 , H01L21/3065
CPC分类号： H01L21/0273 , G03F7/0035 , G03F7/40 , G03F7/427 , H01L21/0338 , H01L21/31138 , H01L21/31144 , H01L21/32139
摘要： PROBLEM TO BE SOLVED: To provide a fine pattern forming method that can reduce the number of processes and reduce a difference between CD (critical dimension) values of a first pattern and a second pattern when forming a fine pattern by LLE (lithography lithography etching). SOLUTION: The fine pattern forming method has a first shape processing process, a second shape processing process, and an etching process. The first shape processing process has a first pattern forming step S13 for forming patterns made of a first resist film, a first trimming step S14 for trimming the patterns, and a protective film depositing step S15 for depositing a protective film formed of a reaction product of etching gas, on the patterns to process the patterns into first patterns. The second shape processing process has a second pattern forming step S17 for forming patterns made of a second resist film and arranged alternately to the first patterns, and a second trimming step S18 for trimming the patterns to process the patterns into second patterns. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种精细图案形成方法，其可以通过LLE（平版印刷）形成精细图案时减少处理次数并减小第一图案和第二图案的CD（临界尺寸）值之间的差异光刻蚀刻）。解决方案：精细图案形成方法具有第一形状处理工艺，第二形状处理工艺和蚀刻工艺。第一形状处理工艺具有用于形成由第一抗蚀剂膜制成的图案的第一图案形成步骤S13，用于修整图案的第一修整步骤S14，以及用于沉积由反应产物形成的保护膜的保护膜沉积步骤S15 蚀刻气体，将图案处理成第一图案。第二形状处理工艺具有第二图案形成步骤S17，用于形成由第二抗蚀剂膜制成的图案并且交替地布置到第一图案;以及第二修整步骤S18，用于修整图案以将图案处理成第二图案。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2010067895A Substrate treatment method 有权
标题翻译：基板处理方法
公开(公告)号：JP2010067895A
公开(公告)日：2010-03-25
申请号：JP2008234809
申请日：2008-09-12
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： KUSHIBIKI MASATO , NISHIMURA EIICHI
IPC分类号： H01L21/3065 , H01L21/28 , H01L21/304 , H01L21/768
CPC分类号： H01L21/31116 , H01L21/31138 , H01L21/31144
摘要： PROBLEM TO BE SOLVED: To provide a substrate treatment method capable of increasing the thickness of a mask layer, in a substrate treatment method for forming an opening of a size satisfying a request for miniaturizing a semiconductor device.
SOLUTION: The substrate treatment method is used for treating a wafer W in which an SiN film 51, a BARC film 52 and a photoresist film 53 are sequentially laminated, wherein the photoresist film 53 includes an opening 54 for exposing a portion of the BARC film 52. The method includes a mask layer thickness increasing step of increasing thickness by depositing a depot on the upper surface of the photoresist film 53 having the opening 54 by plasma generated from a mixture gas of CH
3 F gas and SF
6 gas each being deposition gas.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了提供能够增加掩模层的厚度的基板处理方法，在用于形成满足半导体器件的小型化要求的尺寸的开口的基板处理方法中。解决方案：基板处理方法用于处理依次层叠SiN膜51，BARC膜52和光致抗蚀剂膜53的晶片W，其中光致抗蚀剂膜53包括用于暴露部分 BARC膜52.该方法包括掩模层厚度增加步骤，通过从CH SB 3的混合气体产生的等离子体沉积具有开口54的光致抗蚀剂膜53的上表面上，从而提高厚度 > F气体和SF 6 气体各自为沉积气体。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2009267111A Manufacturing method for semiconductor device, manufacturing apparatus, computer program, and computer-readable memory medium 审中-公开
标题翻译：半导体器件的制造方法，制造设备，计算机程序和计算机可读存储器介质
公开(公告)号：JP2009267111A
公开(公告)日：2009-11-12
申请号：JP2008115497
申请日：2008-04-25
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： NISHIMURA EIICHI , HATTA KOICHI
IPC分类号： H01L21/3065 , H01L21/28
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device that enables adjustment of the size of a portion to be adjusted in size, and to provide a semiconductor device manufacturing apparatus which is suitable for the method. SOLUTION: The manufacturing method for the semiconductor device includes a size measuring step S8 of measuring the size of a portion to be adjusted in size, determining steps S9 and S11 of determining whether a measurement obtained at the size measuring step S8 is larger than a reference value, and a size-adjusting step of carrying out either a first step of reducing the portion, when the measurement is determined to be larger than the reference value at the determining steps S9 and S11 or a second step of enlarging the portion, when the measurement is determined as being smaller than the reference value in the determining steps. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供能够调整尺寸调整部分的尺寸的半导体器件的制造方法，并提供适合该方法的半导体器件制造装置。解决方案：半导体器件的制造方法包括：尺寸测量步骤S8，用于测量要调节的部分的尺寸，尺寸测定步骤S8，确定在尺寸测量步骤S8中获得的测量值是否较大的步骤S9和S11 以及尺寸调整步骤，当在确定步骤S9和S11确定测量被确定为大于参考值时，执行减少该部分的第一步骤，或者扩大该部分的第二步骤当在确定步骤中确定测量值小于参考值时。版权所有（C）2010，JPO＆INPIT

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