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1. 发明专利

JP2003031853A Image display unit and its manufacturing method 有权
标题翻译：图像显示单元及其制造方法
公开(公告)号：JP2003031853A
公开(公告)日：2003-01-31
申请号：JP2001211275
申请日：2001-07-11
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： G09F9/33 , G09F9/00 , H01L33/32 , H01L33/62 , H01L33/00
CPC分类号： H01L24/95 , H01L2924/12041 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To solve a problem caused by the formation of an interlayer insulating film and to reduce a noise current generated in a circuit (semiconductor element) by the light emission of a light emitting diode.
SOLUTION: A second board with a wiring layer equipped with bumps located at the prescribed positions is superposed on a first board where a light emitting element and a drive circuit are arranged, and the bumps are connected to the electrodes of the light emitting element and furthermore the electrodes of the drive circuit. By this setup, the light emitting element and the drive circuit are connected to external electric signals without covering them with an insulating film. The light emitting element and the drive circuit are arranged so as to enable the light emitting plane of the light emitting element and the circuit- formed surface of the drive circuit to face in opposite directions respectively.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：解决由层间绝缘膜的形成引起的问题并且通过发光二极管的发光来减少在电路（半导体元件）中产生的噪声电流。解决方案：配置有位于规定位置的凸点的布线层的第二板重叠在布置发光元件和驱动电路的第一板上，并且凸块连接到发光元件的电极，此外驱动电路的电极。通过这种设置，发光元件和驱动电路连接到外部电信号，而不用绝缘膜覆盖它们。发光元件和驱动电路被配置成能够使发光元件的发光面和驱动电路的电路形成面分别朝向相反的方向。

2. 发明专利

JP2008016553A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2008016553A
公开(公告)日：2008-01-24
申请号：JP2006184584
申请日：2006-07-04
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： H01L21/768 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device having an air gap structure for suppressing inconveniences, such as the occurrence of the residue of a sacrificial layer and the thinning of wiring.
SOLUTION: The manufacturing method of a semiconductor device having a plurality of wires on a substrate 1 has: a process for forming the plurality of wires, and the sacrifice layer that is made of metal selectively etched to the plurality of wires and is embedded to the gap of the plurality of wires on the substrate 1; and a process for removing the sacrificial layer by etching having a selection ratio to the plurality of wires and forming an air gap structure at the gap of the plurality of wires.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供一种具有气隙结构的半导体器件的制造方法，用于抑制牺牲层的残留物的发生和布线的变薄等不便。解决方案：在基板1上具有多条导线的半导体器件的制造方法具有：形成多根导线的工序，以及由选择性蚀刻到多根导线上的由金属制成的牺牲层，为嵌入到基板1上的多根导线的间隙; 以及通过蚀刻去除所述牺牲层的方法，所述蚀刻具有对所述多根导线的选择比，并且在所述多根导线的间隙处形成气隙结构。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2007214363A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007214363A
公开(公告)日：2007-08-23
申请号：JP2006032677
申请日：2006-02-09
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： H01L21/60
CPC分类号： H01L24/05 , H01L24/03 , H01L2224/02166 , H01L2224/04042 , H01L2224/05073 , H01L2224/05557 , H01L2224/05567 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/45 , H01L2224/45144 , H01L2224/48 , H01L2224/4807 , H01L2224/48091 , H01L2224/4845 , H01L2224/48463 , H01L2224/48624 , H01L2224/78 , H01L2224/85 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01093 , H01L2924/04953 , H01L2924/05042 , H01L2924/14 , H01L2924/00014 , H01L2924/00 , H01L2224/05552 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can solve a problem by an insufficient adhesive force with a bonding wire or with cracking generation even if a probe needle of a measuring device is erected on a pad electrode to measure an electronic circuit or the like, and also to provide a method of manufacturing the semiconductor device. SOLUTION: In the semiconductor device externally connected to a pad electrode by wire bonding, the pad electrode is formed on a substrate having an electronic circuit formed thereon, a protective film covering the substrate and having an opening to expose the pad electrode is formed on the substrate, and a metallic layer is formed on the upper layer of the pad electrode in the opening of the protective film. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种半导体器件，其可以通过使用接合线的粘合力不足或产生裂纹来解决问题，即使测量装置的探针被竖立在焊盘电极上以测量电子电路等，并且还提供制造半导体器件的方法。解决方案：在通过引线接合在外部连接到焊盘电极的半导体器件中，焊盘电极形成在其上形成有电子电路的基板上，覆盖基板并具有露出焊盘电极的开口的保护膜是形成在衬底上，并且在保护膜的开口中的焊盘电极的上层上形成金属层。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2007027223A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2007027223A
公开(公告)日：2007-02-01
申请号：JP2005203842
申请日：2005-07-13
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： H01L21/768 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To hold a low dielectric constant state with large influence of RC delay, and to improve mechanical intensity of a region except for the region in a low dielectric constant film used for an interlayer insulating film.
SOLUTION: A manufacturing method of a semiconductor device which has a plurality of wiring layers and the interlayer insulating film formed between the wiring layers, and in which a part of the interlayer insulating film or the whole film can be formed by the low dielectric constant film 1, is provided with a process for irradiating the low dielectric constant film 1 with an electron beam E while regions (RC delay suppression regions 2) are shielded with a mask 3 where RC delay time of the low dielectric constant film 1 is to be reduced.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了保持RC延迟影响大的低介电常数状态，并且提高除了用于层间绝缘膜的低介电常数膜中的区域以外的区域的机械强度。解决方案：一种半导体器件的制造方法，其具有多个布线层和形成在布线层之间的层间绝缘膜，并且其中部分层间绝缘膜或整个膜可以由低介电常数膜1具有用低电介质膜E照射低介电常数膜1的方法，同时用低介电常数膜1的RC延迟时间为掩模的掩模3屏蔽区域（RC延迟抑制区域2）要减少版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2004226602A Method for manufacturing display device, and display device 审中-公开
标题翻译：用于制造显示装置的方法和显示装置
公开(公告)号：JP2004226602A
公开(公告)日：2004-08-12
申请号：JP2003013230
申请日：2003-01-22
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： G09F9/40 , G09F9/00
摘要： PROBLEM TO BE SOLVED: To provide a display device manufacturing method which easily and electrically connects subpanels to each other, shortens manufacturing time, and reduces cost, and also to provide a display device.
SOLUTION: A connection wire part 4 is formed projecting from a unit panel 1a and overlaid on an electric wire 3b formed on a unit panel 1b which is contiguously arranged, and the electric wire 3b and connection wire part 4 are crimped together to electrically connect the unit panels together with ease. A plurality of unit panels 1 are arrayed in plane and adjacent unit panels 1 are electrically connected to constitute a display device with a large-sized display screen.
COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够使子面板彼此容易地电连接的显示装置的制造方法，缩短制造时间，降低成本，并且还提供显示装置。
解决方案：连接线部分4从单元面板1a突出并重叠在形成在连续布置的单元面板1b上的电线3b上，并且电线3b和连接线部分4被压接在一起将单元面板电连接起来，方便。多个单元面板1排列在平面中，并且相邻的单元面板1电连接以构成具有大尺寸显示屏的显示装置。版权所有（C）2004，JPO＆NCIPI

6. 发明专利

JP2004184754A Method for manufacturing flat panel display 有权
公开(公告)号：JP2004184754A
公开(公告)日：2004-07-02
申请号：JP2002352594
申请日：2002-12-04
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： G02B5/02 , G09F9/00 , G09F9/33
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a flat panel display that can exhibit superior light diffusion through simple manufacturing processes and miniaturize a light emitting element by excellently dispersing light emitted by a spot light source.
SOLUTION: This method includes the processes of: arraying LED elements 12 in matrix on a substrate 11; forming an interlayer dielectric 14 on the substrate and LED elements; forming a wiring layer 16 which is electrically connected to the LED elements on the interlayer dielectric; forming a film of a light diffusion layer 17 by coating the interlayer dielectric and wiring layer with a cardo type polymer; and holding the substrate including the light diffusion layer before setting in environment of pressure lower than the atmospheric pressure in the deposition process.
COPYRIGHT: (C)2004,JPO&NCIPI

7. 发明专利

JP2008016638A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2008016638A
公开(公告)日：2008-01-24
申请号：JP2006186339
申请日：2006-07-06
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： H01L21/768 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of improving wiring reliability by suppressing the oxidation and corrosion of wiring even at a region where an actual pattern is formed.
SOLUTION: First wiring 30 is formed on a substrate; a first contact layer 31 is formed on the upper layer of the first wiring 30 while being connected to the first wiring 30; a second contact layer 32 is formed in a ring shape while being separated from the first contact layer 31 at the outer periphery of the first contact layer 31; second wiring 33 is formed on the upper layer of the first and second contact layers 31, 32 while being connected to the first contact layer 31; and an insulation layer containing an insulation material having lower permittivity than silicon oxide is formed at the gap among the first wiring 30, the first contact layer 31, the second contact layer 32, and the second wiring 33.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决问题：提供即使在形成实际图案的区域也能抑制配线的氧化和腐蚀，能够提高布线可靠性的半导体装置。解决方案：第一布线30形成在基板上; 在与第一布线30连接的同时，在第一布线30的上层形成第一接触层31; 第二接触层32形成为环形，同时在第一接触层31的外周与第一接触层31分离; 第二布线33形成在第一和第二接触层31,32的上层上，同时连接到第一接触层31; 并且在第一布线30，第一接触层31，第二接触层32和第二布线33之间的间隙处形成包含具有比氧化硅低的介电常数的绝缘材料的绝缘层。版权所有（C））2008，JPO＆INPIT

8. 发明专利

JP2007019128A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2007019128A
公开(公告)日：2007-01-25
申请号：JP2005197043
申请日：2005-07-06
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： H01L21/3205 , H01L21/60 , H01L23/52
CPC分类号： H01L24/05 , H01L23/5226 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L2224/02166 , H01L2224/05006 , H01L2224/05073 , H01L2224/05093 , H01L2224/05095 , H01L2224/05096 , H01L2224/05166 , H01L2224/05181 , H01L2224/05553 , H01L2224/05567 , H01L2224/05571 , H01L2224/05624 , H01L2924/0002 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/05042 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3025 , H01L2924/00014 , H01L2224/05552
摘要： PROBLEM TO BE SOLVED: To reduce the effect of moisture that penetrates through the damage to an irreducible minimum so as to prevent moisture from penetrating into an interlayer insulating film where a circuit unit is formed even if damage, such as tissue etc, occurs in a pad. SOLUTION: A semiconductor device is equipped with: a pad 61 which is formed on multilayered wiring composed of the laminated wiring layers and interlayer insulating films and electrically connected to the outside. A second contact layer interlayer insulating film 43, a second wiring interlayer insulating film 33, and a first contact interlayer insulating film 23 provided under the pad 61, are surrounded with a moisture-resistant protective member 71 which is formed as continuously connected to the peripheral underside of the pad 61. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了将渗透损伤的水分的影响减小到不可约的最小值，以防止水分渗入形成电路单元的层间绝缘膜，即使是诸如组织等的损伤，发生在垫中。解决方案：半导体器件配备有：焊盘61，其形成在由层叠布线层和层间绝缘膜构成并与外部电连接的多层布线上。设置在焊盘61下方的第二接触层层间绝缘膜43，第二布线层间绝缘膜33和第一接触层间绝缘膜23被防潮保护构件71围绕，防潮保护构件71连续地连接到外围（P）版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2004191487A Tiling display 审中-公开
公开(公告)号：JP2004191487A
公开(公告)日：2004-07-08
申请号：JP2002356861
申请日：2002-12-09
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI , OHATA TOYOJI
IPC分类号： G02F1/1333 , G02F1/1347 , G09F9/33 , G09F9/40
CPC分类号： G09F9/3026
摘要： PROBLEM TO BE SOLVED: To provide a tiling display which constitutes a continuous screen because a light non-emitting part such as a connection part and a hinge part does not exist.
SOLUTION: In the tiling display 1 constituted by arraying a plurality of unit panels 11 and 12 in which sealed light emitting sources are arranged in a matrix state in a tiled state, light emitting diodes 21R, 21G and 21B are disposed at a pitch equal to the pitch P1 of the light emitting source in space S between the display areas of the unit panels being the connection part 17 between the adjacent unit panels 11 and 12.
COPYRIGHT: (C)2004,JPO&NCIPI

10. 发明专利

JP2004226603A Positioning method and display device manufacturing method 审中-公开
标题翻译：定位方法和显示装置制造方法
公开(公告)号：JP2004226603A
公开(公告)日：2004-08-12
申请号：JP2003013238
申请日：2003-01-22
申请人： Sony Corp , ソニー株式会社
发明人： MIYAMORI YUUICHI
IPC分类号： G09F9/00
摘要： PROBLEM TO BE SOLVED: To provide a positioning method by which two bodies are precisely positioned relatively at low cost with ease, and also to provide a display device manufacturing method.
SOLUTION: A light blocking film is formed by aluminum on a base substrate, a slit is formed in the light blocking film, and a film of an adhesive is formed on the slit. When a display element held by a mounter is mounted on the substrate, the display element is irradiated with ultraviolet rays to emit light by photoluminescence. In this state, the luminescence intensity of light passing through the slit from the reverse surface side of the substrate is measured while the mounter is moved slightly in the horizontal direction. The position where the intensity of the light emitted by the display element becomes maximum is found and the display element is mounted there on the base substrate.
COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够容易地将两个体相对低成本地精确地定位的定位方法，并且还提供一种显示装置的制造方法。解决方案：在基底基板上由铝形成遮光膜，在遮光膜上形成狭缝，在狭缝上形成粘合剂膜。当将由安装器保持的显示元件安装在基板上时，用紫外线照射显示元件以通过光致发光发光。在该状态下，在安装机在水平方向稍微移动的同时测量从基板的反面侧通过狭缝的光的发光强度。发现由显示元件发出的光的强度变得最大的位置，并且显示元件安装在基底上。版权所有（C）2004，JPO＆NCIPI

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