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1. 发明专利

JP2005303323A Etching method of ferroelectric film 审中-公开
标题翻译：电磁膜蚀刻方法
公开(公告)号：JP2005303323A
公开(公告)日：2005-10-27
申请号：JP2005143279
申请日：2005-05-16
申请人： Sharp Corp , シャープ株式会社
发明人： ONISHI SHIGEO , KUDO ATSUSHI , SAKIYAMA KEIZO , URASHIMA HITOSHI
IPC分类号： H01L21/3065 , H01L21/8246 , H01L27/105
摘要： PROBLEM TO BE SOLVED: To perform microfabrication of a ferroelectric film at a high etching rate which is free from a dimensional shift and higher in accuracy.
SOLUTION: A PZT film 6 is formed on a Pt film 5 by a sol-gel method, and an SOG film 8 used as a mask is patterned on the PZT film 6. Its sample wafer is placed in an ECR plasma etching system. Mixed gas of Ar gas and chlorine gas as an etching gas is introduced so that a flow rate ratio of halogen gas to the total flow rate of the mixed gas may become ≤50%. The PZT film 6 is etched in the range of a substrate temperature of ≥100°C but ≤400°C.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：以高刻蚀速率进行铁电薄膜的微细加工，其没有尺寸偏移并且精度更高。解决方案：通过溶胶 - 凝胶法在Pt膜5上形成PZT膜6，在PZT膜6上图案化用作掩模的SOG膜8.将样品晶片置于ECR等离子体蚀刻系统。引入作为蚀刻气体的Ar气体和氯气的混合气体，使得卤素气体与混合气体的总流量的流量比可以变为≤50％。 PZT膜6在衬底温度≥100℃但≤400℃的范围内被蚀刻。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2007324384A Semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：JP2007324384A
公开(公告)日：2007-12-13
申请号：JP2006153270
申请日：2006-06-01
申请人： Sharp Corp , シャープ株式会社
发明人： URASHIMA HITOSHI , HIROHAMA KAZUHIRO , TAKEUCHI TSUTOMU
IPC分类号： H01L21/3065 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method that allows a desired pattern to be formed on a substrate by reducing LWR. SOLUTION: After a first etched film 22 and a patterned photoresist film 23 are formed on a semiconductor substrate 21, a fluorocarbon-based deposit 24 is adhered to a side wall of the photoresist film 23. At this time, a thicker deposit 24 is adhered to a resist film projection 23a than to a resist film projection 23b, and subsequently the adhered deposit 24 is slightly etched. At this time, stronger etching is carried out to a deposit 24b that is adhered to a projection than to a deposit 24a that is adhered to a recess. This allows the recess of the photoresist film to be filled up by the deposit, and allows the deposit adhered to the projection to be minimized, thus making it possible to reduce LWR more significantly than by conventional methods. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种通过减少LWR来在衬底上形成所需图案的半导体器件制造方法。解决方案：在第一蚀刻膜22和图案化的光致抗蚀剂膜23形成在半导体衬底21上之后，氟碳基沉积物24粘附到光致抗蚀剂膜23的侧壁上。此时，较厚的沉积物 24相对于抗蚀剂膜突起23b粘附到抗蚀剂膜突起23a，并且随后粘附的沉积物24被轻微蚀刻。此时，与附着于凹部的沉积物24a相比，对与突起粘附的沉积物24b进行更强的蚀刻。这允许光致抗蚀剂膜的凹部由沉积物填充，并且允许使附着在突起上的沉积被最小化，从而可以比常规方法更显着地降低LWR。版权所有（C）2008，JPO＆INPIT

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