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1. 发明专利

JP2009277774A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009277774A
公开(公告)日：2009-11-26
申请号：JP2008125906
申请日：2008-05-13
申请人： Sharp Corp , シャープ株式会社
发明人： HIROHAMA KAZUHIRO
IPC分类号： H01L21/76 , H01L21/3065 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To reduce angle fluctuations of a gently inclined part of a trench opening.
SOLUTION: In a method of manufacturing a semiconductor device, a trench comprising a first inclined part and a second inclined part is formed through the steps of: forming a trench etch mask on an element region on a semiconductor substrate; forming a first groove having the first inclined part by etching the semiconductor substrate using the trench etch mask; forming a sidewall spacer covering a sidewall of the trench etch mask and at least a portion of the first inclined part; and forming a second groove which has a second inclined part steeper than the first inclined part by etching the semiconductor substrate using the trench etch mask and sidewall spacer.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：减少沟槽开口的轻微倾斜部分的角度波动。解决方案：在制造半导体器件的方法中，通过以下步骤形成包括第一倾斜部分和第二倾斜部分的沟槽：在半导体衬底上的元件区域上形成沟槽蚀刻掩模; 通过使用沟槽蚀刻掩模蚀刻半导体衬底来形成具有第一倾斜部分的第一凹槽; 形成覆盖所述沟槽蚀刻掩模的侧壁和所述第一倾斜部分的至少一部分的侧壁间隔物; 并且通过使用沟槽蚀刻掩模和侧壁间隔物蚀刻半导体衬底，形成具有比第一倾斜部分更陡的第二倾斜部分的第二凹槽。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2012186347A Manufacturing method of thin film solar cell module, manufacturing system of the thin film solar cell module, and the thin film solar cell module 审中-公开
标题翻译：薄膜太阳能电池模块的制造方法，薄膜太阳能电池模块的制造系统和薄膜太阳能电池模块
公开(公告)号：JP2012186347A
公开(公告)日：2012-09-27
申请号：JP2011049006
申请日：2011-03-07
申请人： Sharp Corp , シャープ株式会社
发明人： HIROHAMA KAZUHIRO
IPC分类号： H01L31/042 , H01L31/04
CPC分类号： Y02E10/50
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a thin film solar cell module which uses a no cure sealing material and obtains high output power.SOLUTION: The output power of a thin film solar cell module using a no cure sealing material is increased by conducting heat treatment of a thin film solar cell after a rear surface electrode is formed.
摘要翻译：要解决的问题：提供一种使用无固化密封材料并获得高输出功率的薄膜太阳能电池模块的制造方法。解决方案：使用无固化密封材料的薄膜太阳能电池模块的输出功率通过在形成后表面电极之后进行薄膜太阳能电池的热处理而增加。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2006295053A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2006295053A
公开(公告)日：2006-10-26
申请号：JP2005117077
申请日：2005-04-14
申请人： Sharp Corp , シャープ株式会社
发明人： WADA MASAHISA , HASHIMOTO HISAYOSHI , TAKEUCHI TSUTOMU , HIROHAMA KAZUHIRO
IPC分类号： H01L21/3065 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device capable of efficiently removing a reaction product occurring in plasma processing and preventing it from attaching to the surface of a substrate to be processed.
SOLUTION: The manufacturing method of the semiconductor device includes steps of (1) making an inert gas and a reactant gas into plasma in a processing container in which a substrate to be processed is put in for plasma-etching the substrate; and (2) substantially stopping the supply of the reactant gas after plasma-etching, keeping the inert gas in a plasma state for a predetermined time, and discharging the reaction product occurring by the reaction of the reactant gas and the substrate out of the processing container.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供能够有效地除去等离子体处理中发生的反应产物并防止其附着到待处理基板的表面的半导体器件的制造方法。解决方案：半导体器件的制造方法包括以下步骤：（1）将惰性气体和反应气体在加工容器中制成等离子体，其中加入待加工的基板用于对基板进行等离子体蚀刻; 和（2）等离子体蚀刻后基本停止反应气体的供给，将惰性气体保持在等离子体状态达预定时间，并且通过反应气体和基板的反应而发生的反应产物脱离处理容器。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2005244167A Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：JP2005244167A
公开(公告)日：2005-09-08
申请号：JP2004298865
申请日：2004-10-13
申请人： Sharp Corp , シャープ株式会社
发明人： HIROHAMA KAZUHIRO , TANAKA MASARU , HASHIMOTO HISAYOSHI , SATO SHINICHI , KANZAWA HIDEYUKI
IPC分类号： H01L21/3065 , H01L21/76 , H01L21/762 , H01L21/8234
CPC分类号： H01L21/76232 , H01L21/823481
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device which can process silicone nitride film vertically at a pattern interval narrower than the limit resolution width of a photolithography technology in patterning the silicone nitride film used as a mask of trench etching at the time of shallow isolation formation. SOLUTION: The manufacturing method of the semiconductor device comprises steps of: forming a silicone oxide film, the silicone nitride film, and a silicon nitride oxide film in order on a silicone substrate; forming a resist pattern having an opening at a location corresponding to an element isolation region of the silicone substrate; forming a trench having a pair of taper side surfaces which incline in a direction where they approach mutually toward substrate side at a counter side surface using the resist pattern as the mask; and patterning the silicone nitride film and the silicone oxide film by dry etching using the resist pattern and the silicon nitride oxide film as masks. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种半导体器件的制造方法，该半导体器件可以以比用于作为沟槽掩模的硅氮化物膜图案化的光刻技术的极限分辨率宽度更窄的图案间隔垂直处理硅氮化物膜在浅隔离形成时进行蚀刻。解决方案：半导体器件的制造方法包括以下步骤：在有机硅衬底上依次形成氧化硅膜，氮化硅膜和氮氧化硅膜; 在对应于所述硅树脂基板的元件隔离区域的位置处形成具有开口的抗蚀剂图案; 形成沟槽，其具有一对锥形侧表面，所述一对锥形侧表面使用所述抗蚀剂图案作为所述掩模，在相对侧面朝向基板侧相互接近的方向上倾斜; 并通过使用抗蚀剂图案和氮氧化硅膜作为掩模的干蚀刻图案化氮化硅膜和氧化硅膜。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2007324384A Semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：JP2007324384A
公开(公告)日：2007-12-13
申请号：JP2006153270
申请日：2006-06-01
申请人： Sharp Corp , シャープ株式会社
发明人： URASHIMA HITOSHI , HIROHAMA KAZUHIRO , TAKEUCHI TSUTOMU
IPC分类号： H01L21/3065 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method that allows a desired pattern to be formed on a substrate by reducing LWR. SOLUTION: After a first etched film 22 and a patterned photoresist film 23 are formed on a semiconductor substrate 21, a fluorocarbon-based deposit 24 is adhered to a side wall of the photoresist film 23. At this time, a thicker deposit 24 is adhered to a resist film projection 23a than to a resist film projection 23b, and subsequently the adhered deposit 24 is slightly etched. At this time, stronger etching is carried out to a deposit 24b that is adhered to a projection than to a deposit 24a that is adhered to a recess. This allows the recess of the photoresist film to be filled up by the deposit, and allows the deposit adhered to the projection to be minimized, thus making it possible to reduce LWR more significantly than by conventional methods. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种通过减少LWR来在衬底上形成所需图案的半导体器件制造方法。解决方案：在第一蚀刻膜22和图案化的光致抗蚀剂膜23形成在半导体衬底21上之后，氟碳基沉积物24粘附到光致抗蚀剂膜23的侧壁上。此时，较厚的沉积物 24相对于抗蚀剂膜突起23b粘附到抗蚀剂膜突起23a，并且随后粘附的沉积物24被轻微蚀刻。此时，与附着于凹部的沉积物24a相比，对与突起粘附的沉积物24b进行更强的蚀刻。这允许光致抗蚀剂膜的凹部由沉积物填充，并且允许使附着在突起上的沉积被最小化，从而可以比常规方法更显着地降低LWR。版权所有（C）2008，JPO＆INPIT

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