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1. 发明专利

JP2010161135A Chip resistor, and method of making the same 审中-公开
标题翻译：芯片电阻及其制造方法
公开(公告)号：JP2010161135A
公开(公告)日：2010-07-22
申请号：JP2009001437
申请日：2009-01-07
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI
IPC分类号： H01C7/00
CPC分类号： H01C1/148 , H01C1/028 , H01C1/032 , H01C7/003
摘要： PROBLEM TO BE SOLVED: To provide a chip resistor and a method of making the same, wherein failures such as breakage of a substrate made of an insulating material can be avoided even when the chip resistor is made compact and thin. SOLUTION: The chip resistor A includes the substrate 1, a pair of electrodes 2, a resistive layer 3, and a protective layer 4. The substrate 1 is made of the insulating material. The electrodes 2 are formed on a one surface 1a of the substrate 1 and spaced apart from each other. The resistive layer 3 is formed on the one surface 1a of the substrate 1 and electrically connected to the pair of electrodes 2. The protective layer 4 is provided to cover the resistive layer 3. The one surface 1a is a mount side surface. Each of the electrodes 2 includes electrode layers (first electrode layer 21 and second electrode layer 22) electrically connected to the resistive layer 3, and a plating layer 23 formed on the electrode layers. The boundary between the electrode layer and the plating layer 23 is positioned closer to the substrate 1 than the end surface of the protective layer 4 in the thickness direction of the substrate 1. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种片式电阻器及其制造方法，即使当芯片电阻器紧凑而薄时，也可以避免诸如由绝缘材料制成的衬底断裂的故障。解决方案：芯片电阻器A包括基板1，一对电极2，电阻层3和保护层4.基板1由绝缘材料制成。电极2形成在基板1的一个表面1a上并彼此间隔开。电阻层3形成在基板1的一个表面1a上并电连接到该对电极2.保护层4设置成覆盖电阻层3.单个表面1a是安装侧表面。每个电极2包括电连接到电阻层3的电极层（第一电极层21和第二电极层22）和形成在电极层上的镀层23。在基板1的厚度方向上，电极层和镀层23之间的边界比保护层4的端面更靠近基板1。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2005244060A Chip resistor and its production process 审中-公开
标题翻译：芯片电阻及其生产工艺
公开(公告)号：JP2005244060A
公开(公告)日：2005-09-08
申请号：JP2004054145
申请日：2004-02-27
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI
IPC分类号： H01C17/06 , H01C7/00 , H01C17/22
CPC分类号： H01C3/12
摘要： PROBLEM TO BE SOLVED: To reduce shift error in the width direction when a second entering groove is provided in a chip resistor comprising a resistor film 5 formed on the upper surface of a chip substrate 2 such that the opposite ends conduct electrically with a pair of right and left terminal electrodes 3 and 4 wherein first entering grooves 7 and 8 from one of the right and left side faces are provided in the resistor film when it is formed, and second entering grooves 9 and 10 from the other side face are etched through irradiation with a laser beam after the resistor film is formed. SOLUTION: In the other side face of a resistor film, recesses 16 and 17 are provided at reference positions for providing a second entering groove when the resistor film 5 is formed. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了减少在芯片电阻器中设置第二进入槽的宽度方向上的偏移误差，该芯片电阻器包括形成在芯片基板2的上表面上的电阻膜5，使得相对端与一对右端子电极和左端子电极3和4，其中，在形成电阻器膜时，从左右侧面中的一个侧面开始进入槽7和8的第一进入槽7和8，并且从另一侧面在形成电阻膜之后通过激光束的照射进行蚀刻。解决方案：在电阻膜的另一侧面，当形成电阻膜5时，凹槽16和17设置在用于提供第二进入槽的基准位置处。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2014165194A Chip resistor and method of manufacturing chip resistor 审中-公开
标题翻译：芯片电阻和制造芯片电阻的方法
公开(公告)号：JP2014165194A
公开(公告)日：2014-09-08
申请号：JP2013032158
申请日：2013-02-21
申请人： Rohm Co Ltd , ローム株式会社
发明人： HARADA KENICHI , YONEDA MASAKI
IPC分类号： H01C1/142 , H01C17/06
CPC分类号： H01C1/14 , H01C17/006 , H01C17/06 , H01C17/283 , Y10T29/49082
摘要： PROBLEM TO BE SOLVED: To provide a chip resistor whose resistance value can be increased while maintaining strength.SOLUTION: The chip resistor includes: a first electrode 11; a second electrode 12 separated from the first electrode 11 in a second direction X2 opposite to a first direction X1; a resistor 2 disposed on the first electrode 11 and the second electrode 12; a bonding layer 3 interposed between the first electrode 11 and the resistor 2 and between the second electrode 12 and the resistor 2; and a first plating layer 4 electrically connected to the resistor 2. The first electrode 11 has a first electrode outer surface 113 which is flat. The resistor 2 has a first resistor side surface 223 facing the first direction X1 side. The first electrode outer surface 113 is flush with the first resistor side surface 223. The first plating layer 4 directly covers the whole of the first electrode outer surface 113 in a third direction perpendicular to both the first direction X1 and a thickness direction of the first electrode 11.
摘要翻译：要解决的问题：提供一种能够在保持强度的同时提高电阻值的片式电阻器。解决方案：片式电阻器包括：第一电极11; 在与第一方向X1相反的第二方向X2上与第一电极11分离的第二电极12; 设置在第一电极11和第二电极12上的电阻器2; 插入在第一电极11和电阻器2之间以及第二电极12和电阻器2之间的结合层3; 以及与电阻器2电连接的第一镀层4.第一电极11具有平坦的第一电极外表面113。电阻器2具有面向第一方向X1侧的第一电阻器侧表面223。第一电极外表面113与第一电阻器侧表面223齐平。第一镀层4在与第一电极外表面113的第一方向X1和第一电极外表面223的厚度方向垂直的第三方向上直接覆盖第一电极外表面113的整体。电极11。

4. 发明专利

JP2007109846A Chip resistor and method of manufacturing same 有权
标题翻译：芯片电阻及其制造方法
公开(公告)号：JP2007109846A
公开(公告)日：2007-04-26
申请号：JP2005298502
申请日：2005-10-13
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI
IPC分类号： H01C1/142 , H01C17/06
摘要： PROBLEM TO BE SOLVED: To improve the surge resistance of the resistance film in the state of securing the strength of the soldering part by the terminal electrode; in a chip resistor which comprises a rectangular insulating substrate 2, a resistance film 5 formed so as to extend in a longitudinal direction on the upper surface of this insulating substrate, a pair of upper surface electrodes 3 and 4 formed in the upper surface of the insulating substrate, and a pair of terminal electrodes 6 and 7 formed in two sides of the insulating substrate. SOLUTION: Each upper surface electrode is formed in an L-shape in plan view so as to be composed of first portions 3a and 4a prolonged along two long sides 2a and 2b of an insulating substrate, and a second portions 3b and 4b prolonged along two short sides 2c and 2d. Both ends of the resistance film are connected to the second portions in the respective upper surface electrodes, and furthermore, the respective terminal electrodes may be connected to the two long sides in the insulating substrate, and to the first portions in the respective upper surface electrodes. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：在通过端子电极确保焊接部件的强度的状态下，提高电阻膜的浪涌电阻; 在包括矩形绝缘基板2的片状电阻器中，形成为在该绝缘基板的上表面上沿纵向延伸的电阻膜5，形成在该绝缘基板的上表面中的一对上表面电极3和4 绝缘基板和形成在绝缘基板的两侧的一对端子电极6和7。解决方案：每个上表面电极在平面图中形成为L形，以便由绝缘基板的两个长边2a和2b延伸的第一部分3a和4a以及第二部分3b和4b 沿着两个短边2c和2d延伸。电阻膜的两端与各个上表面电极中的第二部分连接，此外，各个端子电极可以连接到绝缘基板中的两个长边，并且连接到各个上表面电极中的第一部分。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2007036012A Chip resistor for large electric power 审中-公开
标题翻译：大电力芯片电阻
公开(公告)号：JP2007036012A
公开(公告)日：2007-02-08
申请号：JP2005218697
申请日：2005-07-28
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI
IPC分类号： H01C7/00 , H01C1/16
摘要： PROBLEM TO BE SOLVED: To plan a large electrification of a chip resistor and an improvement of an anti-surge property in the chip resistor constituted by forming a resistive film and terminal electrodes corresponding to both ends of the resistive film on an insulating substrate. SOLUTION: While forming terminal electrodes 3 for a solder connection at both right and left sides 2' in an insulating substrate 2 made into a rectangular form, at a portion between the both terminal electrodes out of a top face in the insulating substrate, there are arranged in parallel plural resistive films 4 whose both ends conduct to the both terminal electrodes. Each of these resistive films 4 is constituted to be a zigzag form from a terminal electrode at one end toward a terminal electrode at the other end. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了规划片状电阻器的大电气化以及通过在绝缘体上形成对应于电阻膜的两端的电阻膜和端子电极而构成的芯片电阻器中的抗浪涌特性的提高基质。解决方案：在形成为矩形形状的绝缘基板2中形成用于焊接连接的端子电极3的同时，在绝缘基板的顶面之间的两个端子电极之间的部分，并列配置有多个电阻膜4，两个电阻膜的两端导向两个端子电极。这些电阻膜4中的每一个被构造成从另一端的一端的端子电极到端子电极的Z字形。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2012004538A Surface mounting type resistor and surface mounting substrate mounted with the same 有权
标题翻译：表面安装型电阻和表面安装基板
公开(公告)号：JP2012004538A
公开(公告)日：2012-01-05
申请号：JP2011065383
申请日：2011-03-24
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI , TOYONAGA MAKOTO
IPC分类号： H01C7/00 , H01C1/01 , H05K1/18
CPC分类号： H01C1/014 , H01C1/144 , H01C7/003
摘要： PROBLEM TO BE SOLVED: To ease stress due to thermal expansion or thermal shrinkage from a circuit substrate.SOLUTION: A surface mounting type resistor 100 comprises a platy base material 102 having a first main surface and a second main surface having long sides and short sides, a resistor element 106 formed on the first main surface of the platy base material 102, and a pair of internal electrodes 104 integrally provided with the resistor element 106 on an end portion side in the long side of the resistor element 106. The surface mounting type resistor 100 also comprises a pair of external electrodes 110 having a first bending portion 110a of an L-shape formed by an internal electrode adhering portion 112 and a side piece 114, and a second bending portion 110b of an L-shape formed by the side piece 114 and a substrate adhering portion 116. The internal electrode 104 and the internal electrode adhering portion 112 are adhered by a conductive adhering material 108, and a position in the thickness direction of the platy base material 102 leans to the first bending portion 110a side.
摘要翻译：解决的问题：为了缓解由于电路基板的热膨胀或热收缩引起的应力。解决方案：表面安装型电阻器100包括具有第一主表面和具有长边和短边的第二主表面的板状基材102，形成在板状基材102的第一主表面上的电阻元件106 以及一对在电阻元件106的长边的端部侧设置有电阻元件106的内部电极104.表面安装型电阻器100还包括一对具有第一弯曲部分110a的外部电极110 由内部电极接合部分112和侧部件114形成的L形的第二弯曲部分110b和由侧部件114形成的L形的第二弯曲部分110b和基底粘附部分116.内部电极104和内部电极电极粘附部分112通过导电粘附材料108粘附，并且板状基材102的厚度方向上的位置倾斜到第一弯曲部分110a侧。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2011029414A Chip resistor and method of manufacturing the same 有权
标题翻译：芯片电阻及其制造方法
公开(公告)号：JP2011029414A
公开(公告)日：2011-02-10
申请号：JP2009173782
申请日：2009-07-27
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI
IPC分类号： H01C17/06 , H01C7/00
CPC分类号： H01C17/006 , H01C1/148 , H01C7/003 , H01C17/28 , H01C17/281 , H01C17/288 , Y10T29/49082 , Y10T29/49101
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a chip resistor, whereby the chip resistor can be manufactured more accurately. SOLUTION: The method of manufacturing a chip resistor includes the steps of forming a resistor layer 2 on a surface 7a of a substrate material 7; forming a plurality of grooves 71 in the substrate material 7, wherein the grooves extend along the direction x and are recessed from the surface 7a; forming a conductor layer 3 on a side surface 711 of each groove 71; and separating a plurality of base materials 73 along the direction y from each other, wherein the base materials are included in the substrate material 7 and divided by the grooves 71. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造芯片电阻器的方法，由此可以更精确地制造芯片电阻器。解决方案：制造片式电阻器的方法包括以下步骤：在衬底材料7的表面7a上形成电阻层2; 在基板材料7中形成多个凹槽71，其中凹槽沿着x方向延伸并且从表面7a凹进; 在每个槽71的侧表面711上形成导体层3; 并且沿着y方向彼此分离多个基材73，其中所述基材包含在所述基材7中并被所述凹槽71分隔。（C）2011年，JPO和INPIT

8. 发明专利

JP2007142165A Chip resistor and its manufacturing method 有权
标题翻译：芯片电阻及其制造方法
公开(公告)号：JP2007142165A
公开(公告)日：2007-06-07
申请号：JP2005334140
申请日：2005-11-18
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI
IPC分类号： H01C1/142 , H01C17/06
摘要： PROBLEM TO BE SOLVED: To provide a chip resistor which comprises a rectangular insulating substrate, a resistance film and a pair of upper-surface electrodes formed on the upper surface of the insulating substrate, and a pair of terminal electrodes formed at both of right and left long sides of the insulating substrate in its rectangle longitudinal direction to be connected with the upper-surface electrodes; and which can improve a surge resistance characteristic of the resistance film while securing the strength of a soldered part by the both terminal electrodes. SOLUTION: In the chip resistor, a resistance film 5 is integrally provided at its one end with a connection 5a for connection with one 3 of the both upper-surface electrodes, and is integrally provided at the other end with a connection 5b for connection with the other 4 of the both upper-surface electrodes. The both connections 5a and 5b are connected with the respective upper-surface electrodes 3 and 4 at sites spaced by a suitable distance S along the longitudinal direction of the rectangle of the insulating substrate. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种芯片电阻器，其包括形成在绝缘基板的上表面上的矩形绝缘基板，电阻膜和一对上表面电极以及形成在两者上的一对端子电极绝缘基板的长边和左侧长边方向与上表面电极连接; 并且通过两个端子电极确保焊接部件的强度，可以提高电阻膜的浪涌电阻特性。解决方案：在片式电阻器中，电阻膜5的一端一体地设置有用于与两个上表面电极中的一个连接的连接部5a，并且在另一端一体地设置有连接部5b 用于与两个上表面电极中的另外4个连接。两个连接部分5a和5b在相应的上表面电极3和4处沿着绝缘基板的矩形的纵向间隔适当距离S的位置连接。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2005093717A Chip resistor and its manufacturing method 审中-公开
标题翻译：芯片电阻及其制造方法
公开(公告)号：JP2005093717A
公开(公告)日：2005-04-07
申请号：JP2003324980
申请日：2003-09-17
申请人： Rohm Co Ltd , ローム株式会社
发明人： YONEDA MASAKI
IPC分类号： H01C17/06 , H01C7/00 , H01C17/24
摘要： PROBLEM TO BE SOLVED: To shorten the time required for performing a trimming adjustment for setting the resistance value of a chip resistor 1, which is constituted by forming a resistance film 5 between a pair of terminal electrodes 3 and 4 on the top surface of an insulating substrate 2 and alternately providing two interdigital grooves 7 and 8 and two trimming grooves 9 and 10 into the resistance film 5 for forming an electricity flowing route in a zigzag state, to a prescrived value by forming the trimming grooves 9 and 10; and, at the same time, to reduce the manufacturing cost of the chip resistor 1 by lowering the yield rate. SOLUTION: One end 5a of the resistance film 5 is connected to one 3 of the terminal electrodes 3 and 4 without changing the width dimension of the end 5a, and the other end 5b of the film 5 is connected to the other terminal electrode 4 through a narrow width section 6. The first and second interdigital grooves 7 and 8 are provided adjacently to each other at the central part of the resistance film 5 in the lengthwise direction. In addition, the first trimming groove 9 is provided in the portion of the resistance film 5 between one end 5a of the film 5 and the second interdigital groove 8, and the second trimming groove 10 is provided in the portion of the film 5 between the other end 5b of the film 5 and the first interdigital groove 7. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了缩短进行修整调整所需的时间，以设定通过在顶部的一对端子电极3和4之间形成电阻膜5而构成的片状电阻器1的电阻值绝缘基板2的表面，并且通过形成修整槽9和10，将用于形成之字形状态的电流路径的电流膜5交替地设置成两个交错指数槽7,8和两个修整槽9和10到调制值 ; 同时通过降低成品率来降低芯片电阻器1的制造成本。解决方案：电阻膜5的一端5a连接到端子电极3,4的一个，而不改变端部5a的宽度尺寸，并且膜5的另一端5b连接到另一个端子电极4通过窄宽度部分6.第一和第二叉指沟槽7和8在电阻膜5的中心部分沿长度方向彼此相邻地设置。此外，第一修整槽9设置在电阻膜5的膜5的一端5a和第二叉指槽8之间的部分中，并且第二修整槽10设置在膜5的位于薄膜5的另一端5b和第一叉指槽7。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2015023088A チップ抵抗器、チップ抵抗器の実装構造有权
标题翻译：芯片电阻及其安装结构
公开(公告)号：JP2015023088A
公开(公告)日：2015-02-02
申请号：JP2013148585
申请日：2013-07-17
申请人：ローム株式会社 , Rohm Co Ltd
发明人： YONEDA MASAKI
IPC分类号： H01C1/142 , H01C17/06
CPC分类号： H01C1/012
摘要：【課題】放熱性の向上を図ることのできるチップ抵抗器を提供すること。【解決手段】抵抗板表面21を有する抵抗板2と、第1電極4と、第2電極5と、絶縁層6と、を備え、第2電極5は、第1電極4に対して、第2方向X2に位置し、抵抗板表面21は、第1電極4が接する第1領域211と、第2電極5が接する第2領域212と、絶縁層6が接する中間領域213と、を含み、中間領域213は、第1方向X1において、第1領域211および第2領域212の間に位置しており、第1電極4は、第1下地層41と、第1メッキ層43と、を含み、第1下地層41は、厚さ方向Z1において、第1メッキ層43および絶縁層6との間に介在している。【選択図】図1
摘要翻译：要解决的问题：提供一种提高散热性能的片式电阻器。解决方案：片式电阻器包括：具有电阻卡表面21的电阻卡2; 第一电极4; 第二电极5; 和绝缘体层6.第二电极5相对于第一电极4位于第二方向X2上。电阻卡表面21包括：第一电极4与其接触的第一区域211; 与第二电极5接触的第二区域212; 以及绝缘体层6与其接触的中间区域213。中间区域213沿第一方向X1位于第一区域211和第二区域212之间。第一电极4包括第一接地层41和第一镀层43.第一接地层41在厚度方向Z1上设置在第一镀层43和绝缘体层6之间。

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