专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2005190195A Microcontroller 有权
标题翻译：微控制器
公开(公告)号：JP2005190195A
公开(公告)日：2005-07-14
申请号：JP2003431114
申请日：2003-12-25
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： SAKURAI KOHEI , MORITA YUICHIRO , KANEKAWA NOBUYASU , HOSHINO MASATOSHI , SHIMAMURA KOTARO , YAMADA HIROMICHI , TANAKA SATOSHI , YADA NAOKI
IPC分类号： G06F15/78 , H03M1/12
摘要： PROBLEM TO BE SOLVED: To reduce a load of peripheral module control on a CPU even if A/D conversion is required to be executed in various patterns, such as short period sampling and over-sampling of analog signals, with increasing control precision in a control system. SOLUTION: In a microcontroller 1, a timer unit 4 can generate and output a plurality of types of A/D conversion request signals ADREQt0 to ADREQtk corresponding to a plurality of A/D conversion processing patterns of different A/D conversion processing attributes to an A/D converter 5 to start and execute A/D conversion. The attributes of the A/D conversion request signals ADREQt that are trigger signals to A/D conversion, such as an output period, an output count, a mode, counter selection and enabling, can be set in a control register built in the timer unit 4. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：即使需要以各种模式执行A / D转换，例如模拟信号的短周期采样和过采样，减少CPU上的外围模块控制的负载，随着控制的增加控制系统的精度。解决方案：在微控制器1中，定时器单元4可以生成并输出对应于不同A / D转换处理的多个A / D转换处理模式的多种类型的A / D转换请求信号ADREQt0至ADREQtk 属性到A / D转换器5以启动和执行A / D转换。可以在内置在定时器中的控制寄存器中设置作为A / D转换的触发信号的A / D转换请求信号ADREQt的属性，例如输出周期，输出计数，模式，计数器选择和使能单位4.版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2005191810A Digital/analog converter and microcomputer 审中-公开
标题翻译：数字/模拟转换器和微型计算机
公开(公告)号：JP2005191810A
公开(公告)日：2005-07-14
申请号：JP2003429291
申请日：2003-12-25
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： KANEKAWA NOBUYASU , HOSHINO MASATOSHI , SAKURAI KOHEI , YAMADA HIROMICHI , SHIMAMURA KOTARO , MORITA YUICHIRO , TANAKA SATOSHI , YADA NAOKI
IPC分类号： H03M1/12 , H03M3/02
摘要： PROBLEM TO BE SOLVED: To provide an A/D converter capable of A/D conversion processing while necessary resolutions are flexibly set by analog inputs, and a microcomputer.
SOLUTION: Disclosed is the A/D converter which has an A/D control register 60 where control information on A/D conversion is set and has a function of performing oversampling while selecting one of a plurality of analog input channels AN0 to ANn. The A/D converter has a plurality of entries of conversion control information of the A/D control register 60 and also has a field where an oversampling ratio is set in each entry. According to settings of entries, an A/D conversion part 30 performs A/D conversion at a specified oversampling ratio, and a filter arithmetic circuit 10 performs filter processing with a specified filter coefficient and outputs an A/D conversion result data. Thus, the A/D conversion processing is carried out at oversampling ratios by analog inputs.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够进行A / D转换处理的A / D转换器，同时通过模拟输入灵活设置必要的分辨率和微型计算机。解决方案：公开了具有A / D控制寄存器60的A / D转换器，其中设置有关A / D转换的控制信息，并且具有执行过采样的功能，同时选择多个模拟输入通道AN0至安。 A / D转换器具有多个A / D控制寄存器60的转换控制信息条目，并且还具有在每个条目中设置过采样比的字段。根据条目的设定，A / D转换部30以规定的过采样比进行A / D转换，滤波运算电路10进行具有规定的滤波系数的滤波处理，并输出A / D转换结果数据。因此，通过模拟输入以过采样比进行A / D转换处理。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2005057374A Analog/digital converter and micro controller 审中-公开
标题翻译：模拟/数字转换器和微控制器
公开(公告)号：JP2005057374A
公开(公告)日：2005-03-03
申请号：JP2003206631
申请日：2003-08-08
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： MORITA YUICHIRO , SAKURAI KOHEI , KANEKAWA NOBUYASU , HOSHINO MASATOSHI , YAMADA HIROMICHI , SHIMAMURA KOTARO , TANAKA SATOSHI , YADA NAOKI
IPC分类号： H03M1/00 , H03M1/12
CPC分类号： H03M1/1225
摘要： PROBLEM TO BE SOLVED: To provide an analog/digital converter having only a basic function for executing analog/digital conversion without imposing a load on a CPU by increasing the number of selection patterns of analog input channels in each analog/digital conversion with a storage capacity nearly equal to that of a prior art, and to provide a micro controller.
SOLUTION: The analog/digital converter or a DMA transfer apparatus is provided with an analog/digital conversion table having one entry or more each comprising an enable bit used to set to apply analog/digital conversion to each analog input channel and a plurality of times of bits to set the number of times of analog/digital conversion. Thus, selection patterns for analog input channels being approximately a multiple of n of those of a conventional analog/digital conversion table can be set irrespective of the storage capacity nearly equal to that of the prior art. Further, the DMA transfer apparatus is provided with the analog/digital conversion table, and even when the analog/digital converter having only the basic function is in use, optional analog/digital conversion can be executed without imposing a load on the CPU.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种仅具有执行模/数转换的基本功能的模拟/数字转换器，而不会通过增加每个模/数转换中的模拟输入通道的选择模式数来对CPU施加负载具有几乎等于现有技术的存储容量，并提供微控制器。模拟/数字转换器或DMA传送装置具有模拟/数字转换表，该模拟/数字转换表具有一个或更多个条目，每个条目包括用于设置为对每个模拟输入通道进行模拟/数字转换的使能位，以及多次位设置模拟/数字转换的次数。因此，与现有技术几乎相同的存储容量，可以设定模拟输入通道的选择模式大约是常规模拟/数字转换表的n的倍数。此外，DMA传送装置设置有模拟/数字转换表，并且即使当仅使用具有基本功能的模拟/数字转换器时，可以执行可选的模拟/数字转换，而不对CPU施加负载。版权所有（C）2005，JPO＆NCIPI

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式