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1. 发明专利

JP2007110125A Micro electronic device and its manufacturing method 审中-公开
标题翻译：微电子器件及其制造方法
公开(公告)号：JP2007110125A
公开(公告)日：2007-04-26
申请号：JP2006277713
申请日：2006-10-11
申请人： Qimonda Ag , キモンダアクチエンゲゼルシャフト
发明人： STOEMMER RALPH , STRASSER MARC
IPC分类号： H01L29/78 , H01L21/8242 , H01L27/108
CPC分类号： H01L21/823462 , H01L21/823437 , H01L21/823487 , H01L28/40 , H01L29/512 , H01L29/517 , H01L29/518 , H01L29/66621
摘要： PROBLEM TO BE SOLVED: To provide a micro electronic device which removes or reduces the influence of the shape of a concave portion to an electric property and the electronic property of the electronic element of a micro electronic device having the electronic element formed in the concave portion. SOLUTION: A micro electronic device comprises a substrate and a transistor. The transistor comprises a channel region in the substrate, a concave portion in the channel region, a first dielectric layer 40, and a second dielectric layer. The first dielectric layer 40 comprises a first dielectric material. The first dielectric layer is deposited on the bottom of the concave portion 14. The second dielectric layer comprises a second dielectric material. The second dielectric layer is deposited on the side wall of the concave portion. The dielectric constant of the first dielectric material is larger than the dielectric constant of the second dielectric material. A gate electrode is formed in the concave portion. The gate electrode is insulated from the channel region by the first dielectric layer and the second dielectric layer. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供一种能够去除或减少凹部形状对电性能的影响的微型电子器件以及具有形成于电子元件的微型电子器件的电子元件的电子特性凹部。微电子器件包括衬底和晶体管。晶体管包括衬底中的沟道区，沟道区中的凹部，第一介电层40和第二介质层。第一电介质层40包括第一电介质材料。第一介电层沉积在凹部14的底部上。第二介电层包括第二电介质材料。第二电介质层沉积在凹部的侧壁上。第一介电材料的介电常数大于第二介电材料的介电常数。在该凹部形成有栅电极。栅极通过第一介电层和第二介电层与沟道区绝缘。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2007088458A Transistor manufacturing method and memory device manufacturing method 审中-公开
标题翻译：晶体管制造方法和存储器件制造方法
公开(公告)号：JP2007088458A
公开(公告)日：2007-04-05
申请号：JP2006245522
申请日：2006-09-11
申请人： Qimonda Ag , キモンダアクチエンゲゼルシャフト
发明人： WANG PENG-FEI , NUETZEL JOACHIM , WEIS ROLF , SCHLOSSER TILL , STRASSER MARC , LUYKEN RICHARD JOHANNES
IPC分类号： H01L21/8242 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L27/108 , H01L29/78
CPC分类号： H01L27/10823 , G11C11/404 , H01L21/76897 , H01L27/0207 , H01L27/10826 , H01L27/10829 , H01L27/10867 , H01L27/10873 , H01L27/10876 , H01L27/10879 , H01L29/66795 , H01L29/66818 , H01L29/785 , H01L29/7851 , H01L29/7854
摘要： PROBLEM TO BE SOLVED: To provide a memory device manufacturing method for reducing a surface region of a DRAM access transistor. SOLUTION: The transistor manufacturing method includes a step for forming a gate electrode by defining a gate groove part in a substrate. Plate-like parts are respectively defined for each element isolation trench in a position adjacent to the gate groove part. Two respective plate-like parts sandwiching the gate groove part are connected with each other. The two respective plate-like parts are defined by an etching process for selectively etching an insulating material for the element isolation trench to a semiconductor substrate material. A gate insulator is provided at an interface part between an active region and the gate groove part, and also, at an interface part between the active region and each plate-like part. A gate electrode material is deposited and formed so as to fill the gate groove part and each plate-like part. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于减小DRAM存取晶体管的表面区域的存储器件制造方法。解决方案：晶体管制造方法包括通过在衬底中限定栅极沟槽部分来形成栅电极的步骤。在与栅极槽部分相邻的位置中，分别对每个元件隔离沟槽限定板状部分。夹着栅槽部的两个板状部件彼此连接。两个相应的板状部分通过蚀刻工艺限定，用于将用于元件隔离沟槽的绝缘材料选择性地蚀刻到半导体衬底材料。栅极绝缘体设置在有源区域和栅极沟槽部分之间的界面部分处，并且还在有源区域和每个板状部分之间的界面部分处。沉积并形成栅极电极材料以便填充栅极槽部分和每个板状部分。版权所有（C）2007，JPO＆INPIT

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