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1. 发明专利

JPS603214A SUBSTRATE BIAS CIRCUIT 失效
公开(公告)号：JPS603214A
公开(公告)日：1985-01-09
申请号：JP11022683
申请日：1983-06-21
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： YAMAMOTO KAZUNARI , OKAMOTO SEIJI , KATAOKA MUTSUO , UCHIMURA KUNIHARU
IPC分类号： H03F1/26 , H01L21/822 , H01L27/04 , H03H19/00
摘要： PURPOSE:To eliminate a power supply noise signal by adding a level shift circuit and changing the circuit constitution of a high impedance so as to active stably a detecting amplifier and a high impedance circuit thereby decreasing the fluctuation of a substrate voltage. CONSTITUTION:Level shift circuits 51, 52 are connected in cascade to an output of a detecting amplifier 2. Then a DC feedback from an intermediate connecting point 14 to a high impedance circuit 3 is applied. A substrate bias potential VOUT is extracted via the level shift circuit 52 connected further in cascade connection to an output terminal of the level shift circuit 51. A level shift circuit 53 is inserted in order to prevent an unbalancing operation of a differential amplifier stage in connecting the high impedance circuit and a dummy switch 1. The level shift circuit 51 conducts equivalent operation to that of the level shift circuit 51.

2. 发明专利

JPS58109912A REFERENCE VOLTAGE GENERATING CIRCUIT 失效
公开(公告)号：JPS58109912A
公开(公告)日：1983-06-30
申请号：JP20703081
申请日：1981-12-23
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MORI SHIGEKAZU , KATAOKA MUTSUO , IWATA ATSUSHI
IPC分类号： H03F1/30 , G05F3/30
摘要： PURPOSE:To obtain a reference voltage with high accuracy, by detecting a base-to-emitter voltage and voltage difference of transistors (TRs) having different current density and setting the gain with the ratio of capacitance. CONSTITUTION:An emitter current of TRs 2, 3 consisting of a plurality of unit TRs is equal to the current of N-MOS TRs 5, 6 consisting of a plurality of the unit TRs, and this current depends on the current flowing to a TR7 via a resistor R5. The current ratio and the current density ratio of the TRs 3, 4 depend on the number of unit TRs of the TRs 3-6. In this case, a base-to-emitter voltage VBB2 if the TR4 shows a positive temperature characteristic and a DELTAVBE being the difference between a VBE1 and a VBE2 of the TR3 shows a negative temperature characteristic. An amplifier A2 where the amplification factor is determined in the ratio of the capacitances C1, C2, applies the DELTAVBE to the VBE2 with a prescribed multiple, and a reference voltage having zero temperature characteristic equal to the band gap voltage of silicon and the VBE2 are alternately outputted through the control of switches S1, S2.

3. 发明专利

JPS58101511A DC OFFSET ELIMINATING CIRCUIT 失效
公开(公告)号：JPS58101511A
公开(公告)日：1983-06-16
申请号：JP19950281
申请日：1981-12-12
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： TAWARA TOSHIYUKI , KATAOKA MUTSUO , HAYASHI TOSHIO , UEKI ISAMU , KITANO JIYUNJIROU , TAKADA KENZOU
IPC分类号： H03F3/34 , H03F3/347
摘要： PURPOSE:To make the electronic circuitry and circuit integration easy, without using a choke coil and with decreased capacitance value, by converting an output of a current voltage conversion circuit into a current via a low-pass filter and feeding it back to the current voltage converting circuit. CONSTITUTION:The absolute value of currents applied to an inverting and a non-inverting input of an operational amplifier OP of a current voltage conversion circuit 10 is the same and the polarity is inverted. Further, an unbalanced output voltage Vout passes through a low-pass filter consisting of a resistor R4 and a capacitor C0, is applied to the base of a transistor(TR) Q0 of a voltage current conversion circuit 30, where the voltage is converted into a current with the mutual conductance of TRsQ0, Q1. The current is fed back to points (a), (b) being inputs to the circuit 10 as a current signal and summed with a signal current of a balanced current source 1 and applied to the circuit 10. Thus, only a DC component negligible as small as several mV appears at the Vout, allowing to output an AC signal voltage as large as several V.

4. 发明专利

JPS58100453A SIGNAL TRANSMISSION CIRCUIT 失效
公开(公告)号：JPS58100453A
公开(公告)日：1983-06-15
申请号：JP19766881
申请日：1981-12-10
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： FUJII TERUJI , YAMAMOTO KAZUNARI , KATAOKA MUTSUO , KONNO MASAJI
IPC分类号： H01L21/822 , H01L27/04 , H04L27/12
摘要： PURPOSE:To obtain an FSK (Frequency shift Keying) signal transmission circuit suitable for the formation of an integrated circuit by a method wherein an integration circuit is composed of a switch and a capacitor, and the capacitor for integration is directly charged through the intermediary of an analogue switch when the signal output is started. CONSTITUTION:When low voltage is applied to a signal output control input terminal 10, the gate 11 of an MOS transistor is conducted, a capacitor 15 is charged immediately by a voltage source 12, and a reference voltage value appears in an output terminal 13. When high voltage is applied, the gate 11 is turned to a non-conductive state, the voltage source 12 is cut off, and when the voltage is low at a clock 18 and high at a clock 19, a Tr14 is conducted and a Tr16 is non-conducted, thereby allowing the terminal 13 to decrease in voltage and the capacitor 17 to accumulate load. Then, when the clock is inverted, the accumulated load is discharged to a capacitor 17. By repeating the above procedures, the voltage on the terminal 13 drops gradually, and approaches zero.

5. 发明专利

JPS5882166A SIGNAL DETECTION CIRCUIT 失效
公开(公告)号：JPS5882166A
公开(公告)日：1983-05-17
申请号：JP17965281
申请日：1981-11-11
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： FUJII TERUJI , KATAOKA MUTSUO , YAMAMOTO KAZUNARI , KISHIMOTO HIDEO
IPC分类号： G01R19/22 , G01R19/165 , G01R19/32 , H02H3/20
摘要： PURPOSE:To protect the detection level from effect of temperature variations of a rectifying element and a D.C. voltage component of an input signal by shifting the potential of the reference line according to a D.C. voltage to overlap the input signal and forward voltage of a rectifier. CONSTITUTION:Outputs of an operation amplifier 11 for signal amplification are inputted into a transistor Tr13 while inputted into RC circuits 27 and 28 and a D.C. voltage component of an output signal 12 is applied to a transistor Tr15. A half-wave rectified voltage drawn from the emitter of the Tr13 is converted into a D.C. voltage with smoothing circuits 20 and 21 and inputted into a comparator 23. On the other hand, the reference line 19 connected to the emitter of the Tr15 is inputted into a comparator 23 through a comparison voltage source 25 to detect whether the A.C. voltage signal level is above or below a specified value. This prevents a base/emitter voltage of the Tr13 from developing in a differential input voltage of the comparator 23 while enabling the shifting of the signal earth voltage by the D.C. voltage component thereby minimizing effect on the base/emitter voltage from temperature variations and the D.C. voltage component.

6. 发明专利

JPS5312207A MULTIIFREQUENCY SIGNAL RECEIVER 失效
公开(公告)号：JPS5312207A
公开(公告)日：1978-02-03
申请号：JP8593476
申请日：1976-07-21
申请人： NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , OKI ELECTRIC IND CO LTD , FUJITSU LTD
发明人： USUDA SHIYOUGO , IWATA ATSUSHI , HASEGAWA KOUICHI , TAKAOKA KAZUHIKO , KATAOKA MUTSUO , SASAHARA YUUJIROU
IPC分类号： H04Q1/45 , H04L27/26 , H04Q1/453
摘要： PURPOSE:To improve the SN ratio and to obtain an output of the same timing in order to prevent the malfunction, by controlling both the detector and the output control circuit using the timer circuit output for the common threshouls voltage.

7. 发明专利

JPS58134531A LOOP FILTER FOR PLL 失效
公开(公告)号：JPS58134531A
公开(公告)日：1983-08-10
申请号：JP1546982
申请日：1982-02-04
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： OKAMOTO SEIJI , YANAGAWA MASAHARU , KATAOKA MUTSUO , IWATA ATSUSHI
IPC分类号： H03H7/06 , H03L7/093
摘要： PURPOSE:To stabilize the output signal of a voltage-controlled oscillator by providing a pulse eliminating circuit to the output terminal of a voltage source for controlling the charging and discharging of a capacitor for integration in a loop filter. CONSTITUTION:To terminals 201 and 202 of the loop filter, difference signals from a phase comparator are supplied. If pulses are mixed with the difference signals, pulse eliminating circuits 507 and 508 detect those pulses to turn on a transistor (TR) M8 or M9. From the other terminal of the capacitor 205 for integration constituting the loop filter to the output terminal 206 of the loop filter, a voltage for eliminating appearing pulses is applied. At the output terminal of the loop filter, no influence of a pulse noise appears, so the PLL circuit oscillates stably and continuously.

8. 发明专利

JPS58114109A REFERENCE VOLTAGE GENERATING CIRCUIT 失效
公开(公告)号：JPS58114109A
公开(公告)日：1983-07-07
申请号：JP20971081
申请日：1981-12-28
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MORI SHIGEKAZU , KATAOKA MUTSUO , UCHIMURA KUNIHARU
IPC分类号： H03F1/26 , G05F3/30 , H03F1/30
摘要： PURPOSE:To make the MOS integration possible, by detecting voltages between respective bases and emitters of NPN transistors (TR) different in current density and the voltage difference between them to determine a reference voltage output and a temperature coefficient in a summing amplifier due to a capacity ratio. CONSTITUTION:NPN TRs 3 and 4 different in current density are connected between the first potential point VIN1 and an earth potential E, and emitters are connected to drains of MOSTRs 5 and 6. The emitter and the base of the TR4 are connected to the first capacity C1 through the first changeover switch S1, and emitters of TRs 3 and 4 are connected to the second capacity C2 through the second changeover switch S2, and capacities C1 and C2 are connected to the inverted terminal of a differential amplifier A2. The noninverted terminal of the amplifier A2 is grounded, and the thrid capacity C3 and a changeover switch S3 are connected between the output terminal and the inverted terminal of the amplifier A2, and the output of the amplifier A2 is applied to a differential amplifier A3 through the fourth changeover switch S4. These switches S1- S4 are operated by the control of a controlling circuit CC, and a reference voltage and a temperature coefficient are determined by the capacity ratio, thus making the MOS integration possible.

9. 发明专利

JPS58106938A CALL SIGNAL TRANSMITTING CIRCUIT 失效
公开(公告)号：JPS58106938A
公开(公告)日：1983-06-25
申请号：JP20507581
申请日：1981-12-21
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： UEHARA HIROYASU , KATAOKA MUTSUO , INABE YASUNOBU , MUKAI KANJI , MATSUYAMA MITSUO , HASEGAWA KENZOU
IPC分类号： H04M3/02 , H03K17/73 , H04M3/06
摘要： PURPOSE:To stabilize a call signal, by providing a circuit, which performs such control that signals to be transmitted do not collide with each other, in a circuit for transmission of the call signal to a subscriber's terminal of a telephone exchange. CONSTITUTION:Conduction or non-conduction of p-n-p-n transistors TRs 11a, 11b, 12a, and 12b constituting semiconductor switches 11 and 12 is detected by a detecting circuit 15, and the detection output is transmitted as one control information to a controlling circuit 14. Control signals T1 and T2 from the controlling circuit 14 are applied to semiconductor switches 11 and 12 through an exclusive operating circuit 13 consisting of delay circuits 21 and 38, which have delay times longer than the turn-off time of semiconductor switches 11 and 12, and gate driving circuits 13a and 13b. Consequently, the simultaneous operation of semiconductor switches 11 and 12 is prevented, and a call signal source 5 and the earth do not collide.

10. 发明专利

JPS5896317A REFERENCE VOLTAGE GENERATING CIRCUIT 失效
公开(公告)号：JPS5896317A
公开(公告)日：1983-06-08
申请号：JP19278881
申请日：1981-12-02
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MORI SHIGEKAZU , KATAOKA MUTSUO , YANAGAWA MASAHARU , UCHIMURA KUNIHARU
IPC分类号： G05F3/30
摘要： PURPOSE:To realize a reference voltage generating circuit which uses the band gap voltage of an Si semiconductor which is coupled with a power source at its collector terminal and suitable for integration, by detecting the emitter current of an NPN transistor (TR). CONSTITUTION:A power voltage is supplied between a power terminal 207 and an earth terminal 208. Through the negative feedback of a differential amplifier 206, terminals of resistances 204 and 205 are held at the same potential and the ratio of emitter currents of TRs 201 and 202 is equal to the ratio of the resistances 205 and 204. The emitter current of the TR201 is determined by a voltage applied to a resistance 203. i.e. the difference in base-emitter voltage between the TRs 201 and 202. The voltage between an output terminal 209 and the earth terminal 208 is the sum of the base-emitter voltage of the TR202 and the terminal voltage across the resistance 205. Then, the ratios of resistances R1 and R2, and R1 and R3, and the emitter area ratio of the TRs 201 and 202 are set properly to generate a reference voltage ( 1.2V) nearly equal to the band gap voltage of Si.

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