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1. 发明专利

JPH05323577A METHOD FOR CORRECTION OF PHASE DIFFERENCE MASK AND CORRECTED PHASE DIFFERENCE MASK AND METHOD FOR FORMATION OF PATTERN USING CORRECTED PHASE DIFFERENCE MASK 失效
公开(公告)号：JPH05323577A
公开(公告)日：1993-12-07
申请号：JP12652192
申请日：1992-05-19
申请人： OKI ELECTRIC IND CO LTD
发明人： OTSUKA HIROSHI , ONODERA TOSHIO , KUWABARA KAZUYUKI
IPC分类号： G03F1/28 , G03F1/29 , G03F1/36 , G03F1/72 , G03F1/74 , H01L21/027 , G03F1/08
摘要： PURPOSE:To obtain a corrected phase difference mask which is strong in mechanical strength, high in contrast and large in focal tolerance by correcting a phase difference mask having a defective phase shifter. CONSTITUTION:The defective part 122 of a defective phase shifter 120 is corrected to form a corrected pattern 142 and then changed to a phase correction shifter 140. The phase of transmitted light of the phase correction shifter may be optional. An compensation shifter 152 is provided for an indefective phase shifter 130 adjoining the phase correction shifter 140, and the indefective phase shifter 130 is changed to a phase compensation shifter 150. The shape of the compensation pattern 152 is determined so that the light intensity of transmitted light of a phase correction shifter comes to be substantially equal to the light intensity of transmitted light of a phase compensation shifter at the image formation position of a reduction exposure optical system. Therefore, the relative phase difference of both the transmitted lights is compensated to be a proper value within the range of 180+ or -90 deg..

2. 发明专利

JPS6427228A FORMING METHOD FOR FINE PATTERN OF SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPS6427228A
公开(公告)日：1989-01-30
申请号：JP6917087
申请日：1987-03-25
申请人： OKI ELECTRIC IND CO LTD
发明人： YAMAUCHI TAKAHIRO , OTSUKA HIROSHI
IPC分类号： G03F7/095 , G03C1/00 , G03F7/00 , H01L21/027 , H01L21/30
摘要： PURPOSE:To eliminate an increase in a contact or a slit larger than a pattern on a mask due to the spread of a light by simultaneously performing the steps of removing an upper layer resist and developing a lower layer resist. CONSTITUTION:A lower layer resist 12 is formed on a base substrate 11, heated to volatilize solvent, thereby obtaining a thin CMS film. Then the resist 12 is coated by a rotary coating method with a positive resist to form an upper layer resist 14, thereby obtaining a film thickness of 1-2mum. Then, the resist 14 is patterned by a mask 15 by means of a lithography method with a UV light 16. Then, with the pattern of the resist 14 as a mask the pattern of the resist 14 is transferred to the CMS of the resist 14 simultaneously by exposure of a DUV (far ultraviolet ray) light 17. Then, the resist 14 is removed, the resist 12 is developed and an interlayer 13 is removed. Thus, the oversize of a slit or a contact does not occur due to the spread of the light.

3. 发明专利

JPS63127535A RESIST PATTERN FORMATION 失效
公开(公告)号：JPS63127535A
公开(公告)日：1988-05-31
申请号：JP27189886
申请日：1986-11-17
申请人： OKI ELECTRIC IND CO LTD , MIYAZAKI OKI DENKI KK
发明人： ITO YOSHIO , OTSUKA HIROSHI , TSUJII YASUSHIGE , TANAKA YASUHIRO
IPC分类号： G03F7/095 , G03C1/00 , G03F7/00 , H01L21/027 , H01L21/30
摘要： PURPOSE:To reduce the number of processes and to improve an operation by oxidizing and removing a mixed layer with ozone generated by irradiating far ultraviolet light under the supply of oxygen gas. CONSTITUTION:When an upper layer resist 24 is formed, a mixed layer 23 is formed in the interface between a lower layer resist 22 and the upper layer resist 24 and is left as it is when a pattern is formed. Then, the lower layer resist 22 is exposed by irradiating far ultraviolet light 25 using the upper layer resist 24 as a mask while an oxygen gas 26 is supplied. In this case, ozone is generated by the far ultraviolet light 25 and is adsorbed on the surfaces of the mixed layer 23 and the upper layer resist 24. The adsorbed ozone is again decomposed to the oxygen gas and a radical state oxygen atom and the oxygen atom oxidizes and decomposes the surface of the upper layer resist and the mixed layer and removes.

4. 发明专利

JPS62136878A MANUFACTURE OF MOS SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS62136878A
公开(公告)日：1987-06-19
申请号：JP27695585
申请日：1985-12-11
申请人： OKI ELECTRIC IND CO LTD
发明人： KANAMORI JUN , OTSUKA HIROSHI
IPC分类号： H01L29/78 , H01L21/336
摘要： PURPOSE:To reduce the area of an element by a method wherein contact holes are drilled in such a manner that their lower side diameters are reduced by conductive side walls. CONSTITUTION:After field oxide films 22 are formed on a silicon substrate 21, an insulating film 23 and an electrode 24 are formed on a gate forming region and source and drain diffused layers 25 are formed on both sides of the gate forming region. After that, an insulating layer 26 is formed on the substrate 21 and etched to be left only on the side walls of the electrode 24 as insulating side walls 26a. Then oxide films 27a and 27b are made to grow on the surfaces of the diffused layers 25 and the surface of the electrode 24. After that, a conductive layer 28 is made to grow on the substrate 21 and etched to be left only on the insulating side walls 26a as conductive side walls 28a. After that, an insulating layer 29 is made to grow on the substrate 21 and contact holes 30 are formed on the diffused layers 25. At that time, the holes 30 are formed so as to overlap the conductive side walls 28a. Then wirings 31 are formed through the holes 30. With this constitution, even if the dimensions of the contacts are very fine, an increase in wiring resistance can be avoided and contact holes can be provided closer to a gate electrode.

5. 发明专利

JPS6222431A FORMING METHOD FOR RESIST PATTERN 失效
公开(公告)号：JPS6222431A
公开(公告)日：1987-01-30
申请号：JP16034185
申请日：1985-07-22
申请人： OKI ELECTRIC IND CO LTD
发明人： ITO YOSHIO , OTSUKA HIROSHI
IPC分类号： G03F7/20 , H01L21/027 , H01L21/30
摘要： PURPOSE:To promote the evaporation of a solvent in a resist, to equalize the solubility of the resist on development and to obtain a resist pattern having high precision by positioning the resist applied onto a film to be etched under a decompression atmosphere. CONSTITUTION:In a photolithographic process on the manufacture of a semiconductor device, a solvent made to be contained in a resist is removed before prebaking or at the same time as prebaking under a decompression atmosphere of 10Torr or less. Optimum conditions are determined by the molecular weight of a resin in the resist, the boiling point of the solvent and the film thickness of the resist regarding pressure and the treating time on decompression. A stepped-surface profile made better than a conventional method is acquired in a resist pattern, to which prebaking, exposure and development are executed, after decompression treatment.

6. 发明专利

JPS61207053A MANUFACTURE OF SEMICONDUCTOR MEMORY DEVICE 失效
公开(公告)号：JPS61207053A
公开(公告)日：1986-09-13
申请号：JP4745485
申请日：1985-03-12
申请人： OKI ELECTRIC IND CO LTD
发明人： OTSUKA HIROSHI , KANAMORI JUN , TAKAHASHI SATOSHI , TAGUCHI TAKASHI , USHIGOE TAKATOSHI
IPC分类号： H01L27/10 , H01L21/306 , H01L21/8242 , H01L27/108
摘要： PURPOSE:To avoid a short-circuit from occurring due to the sidewall-shaped residual film to be etched by a method wherein a CVD oxide film is formed on the lower polycrystalline Si film and a mask pattern for etching to the lower polycrystalline Si film having a tapered edge is formed. CONSTITUTION:An oxide film 12 is formed on a part of the surface of a silicon substrate 10, whereon a field insulating film 11 is not formed, a lower polycrystalline Si film 13 and a CVD oxide film 14 are laminated, and moreover, a resist 15 is formed and the mask pattern is formed. When an isotropic etching is performed on the oxide film 14 using the resist 15 as a mask, a part of the oxide film 14 remaining just under the resist 15, that is, an edge 14, is formed into a taper form. Then, an anisoptropic etching is performed, a patterning is performed on the lower polycrystalline Si film 13, and after the resist 15 and a part of the first gate oxide film 12, which is made to expose, are removed, a gate oxide film 16 consisting of a thermal film is formed on the whole surface. After that, an opening part 16a is formed on the oxide film 16, and after an upper polycrystalline Si film 17 is formed, a patterning is performed to obtain a transfer gate 17a and a data line 16b.

7. 发明专利

JPS61198720A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61198720A
公开(公告)日：1986-09-03
申请号：JP3769785
申请日：1985-02-28
申请人： OKI ELECTRIC IND CO LTD , MIYAZAKI OKI DENKI KK
发明人： MORIYAMA NORIO , OTSUKA HIROSHI , NISHIMURO SUNAO , MITSUTOMI HISAMITSU
IPC分类号： H01L21/68 , H01L21/027 , H01L21/30
摘要： PURPOSE:To facilitate positioning by removing one parts of each layer formed in a region superposing on a dark film section as an alignment mark for a mask through etching in succession from an upper section in an extent that the phase of the period of reflectivity by the interference of monochromatic light is displaced and shaping light and darkness. CONSTITUTION:An Si substrate is insulated and isolated 107, 108, poly Si masks 113, 115 are applied onto SiO2 thin-films 109, 111, and an opening is bored to the film 109. The masks 113, 115 are coated with SiO2 117, 119, an opening is bored to the film 117 through etching and one part 121 of the film 119 is removed, and poly Si 113 is etched excessively. Wafer alignment marks 125 with alignment marks 121, 123 are completed at the time. Since the mark 125 has the difference of film thickness in sections 201, 203, reflected light is brought to light at every odd times of lambda/2 and to darkness at every even times by the interference of monochromatic light having a wavelength lambda. When using lambda=4,358Angstrom , the selection of approximately 900Angstrom of the difference of film thickness is advantageous. The section 201 is brought to light and a section 202 to darkness in the alignment mark 121, and the masks can be aligned easily through scanning on the mark 121.

8. 发明专利

JPH08328239A METHOD FOR REMOVING PROJECTING DEFECT OF PHASE DIFFERENCE MASK 失效
公开(公告)号：JPH08328239A
公开(公告)日：1996-12-13
申请号：JP13083395
申请日：1995-05-29
申请人： OKI ELECTRIC IND CO LTD
发明人： OTSUKA HIROSHI , ONODERA TOSHIO , KUWABARA KAZUYUKI
IPC分类号： G03F1/48 , G03F1/72 , G03F1/74 , H01L21/027 , G03F1/08 , G03F1/14
摘要： PURPOSE: To provide a method for removing projecting defects without damaging the mask parts near the projecting defects, on the under side of the projecting defects and in the periphery of the projecting defects or to exactly remove only the projecting defects. CONSTITUTION: A protective film 22 covering the entire surface on the upper side of the phase difference mask 100 in which the projecting defect 14 arises in the recessed region of a mask substrate 10 having ruggedness is formed. The protective film having the removal speed at the time of irradiation with a convergent ion beam approximate to the removal speed of the projecting defect 14 is used as the protective film 22. The convergent ion beam is thereafter radiated toward the region to be irradiated from the protective film side to remove the part of the region 24 to be irradiated with the convergent ion beam. The irradiation with the convergent ion beam is ended at the point of time when the protective film part 22a on the periphery of the projecting defect is removed.

9. 发明专利

JPH08304999A PHASE SHIFT MASK AND FOCUS POSITION DETECTING METHOD USING THE SAME 失效
公开(公告)号：JPH08304999A
公开(公告)日：1996-11-22
申请号：JP11319995
申请日：1995-05-11
申请人： OKI ELECTRIC IND CO LTD
发明人： KUWABARA KAZUYUKI , ONODERA TOSHIO , OTSUKA HIROSHI
IPC分类号： G03F1/26 , G03F1/44 , G03F1/68 , G03F7/207 , H01L21/027 , G03F1/08
摘要： PURPOSE: To eliminate an individual difference caused by human judgement and to surely detect a focus position by providing a focus position detecting pattern capable of moving the focus position. CONSTITUTION: Phase shift patterns 102 and 103 are provided to come in contact with the long side of a light shielding pattern 101 as a mask. The size and the shape of the patterns 102 and 103 from the end of a light shielding part are made the same, and the phase angle thereof to the wavelength of exposing light to be used is made the same. Provided that the phase angle of a shifter is made a value other than the integer multiple of 180 deg.. In such a case, the movement of the best focus is performed on both sides, that is, a side near to the optical system or a side distant therefrom with respect to the best focus position in the case the shifter does not exist, and the moving direction of the best focus is different between the cases that the phase angle of the shifter is an odd number multiple and an even number multiple other than the integer multiple of 180 deg.. Furthermore, the moving amount of the best focus is decided according to the phase angle of the phase shifter and the size of the shifter.

10. 发明专利

JPS63178529A RESIST PATTERN FORMING METHOD 失效
公开(公告)号：JPS63178529A
公开(公告)日：1988-07-22
申请号：JP896287
申请日：1987-01-20
申请人： OKI ELECTRIC IND CO LTD , MIYAZAKI OKI DENKI KK
发明人： ITO YOSHIO , TSUJII YASUE , OTSUKA HIROSHI , TANAKA YASUHIRO
IPC分类号： H01L21/302 , G03C5/00 , G03F7/26 , H01L21/027 , H01L21/30 , H01L21/3065
摘要： PURPOSE:To obtain an excellent resist pattern by treating a lower layer resist by a developer, into which a liquid having solubility to an upper layer resist is mixed, when an upper-layer resist pattern is transferred to the lower layer resist. CONSTITUTION:When an ultraviolet beam positive type resist 23 is applied onto a foundation film to be etched 22 with a stepped section 21 and flattened and a resist 24 is superposed, a mixed layer 25 is formed on the interface. The upper layer resist 24 is patterned, the whole surface is irradiated with far ultraviolet rays 26 as the mixed layer 25 in an exposed section is left as it is, and a lower layer resist 23 in a section in which there is no upper layer resist 24 is exposed. When the layer 23 is treated with the developer of the lower layer resist 23 into which a liquid having solubility to the upper layer resist 24 is mixed, the mixed layer 25 is also removed, and the pattern of the upper layer resist 24 is transferred to the lower layer resist, thus completing an etching mask for the foundation film 22. According to the method, an excellent resist pattern can be shaped without O2 plasma treatment.

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