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1. 发明专利

JPS6227830A INTERRUPTION CONTROL SYSTEM 失效
公开(公告)号：JPS6227830A
公开(公告)日：1987-02-05
申请号：JP16807485
申请日：1985-07-29
申请人： OKI ELECTRIC IND CO LTD
发明人： OSAKI KOSUKE
IPC分类号： G06F9/48 , G06F9/46
摘要： PURPOSE:To increase the processing speed and to reduce the program capacity with an interruption control system by producing an address according to the contents of the processing state and the interruption factor and starting the processing through a fixed address for interruption decided when an interruption is produced by a branch instruction and in accordance with said processing state and interruption factor. CONSTITUTION:An address generator 14 produces addresses from the contents of a processing state register 12 and an interruption factor register 13. Then a selecting circuit 16 selects the addresses given from the generator 14 through a fixed address for interruption decided when an interruption is produced by a branch instruction. Then, the processing is carried out according to the processing state of a central processing unit 11 and the interruption factor. Thus, it is possible to decide the interruption processing with no judgement given by a program and therefore the processing speed of the unit 11 can be increased.

2. 发明专利

JPH01258143A MICROCOMPUTER MONITORING SYSTEM 失效
公开(公告)号：JPH01258143A
公开(公告)日：1989-10-16
申请号：JP8655888
申请日：1988-04-08
申请人： OKI ELECTRIC IND CO LTD
发明人： OSAKI KOSUKE , OKAMOTO TAKESHI
IPC分类号： G06F11/30
摘要： PURPOSE:To separate a processing started at the beginning whether it is the one due to time-up for the confirmation of the operation of a watchdog timer or the time-up due to a cause other than the confirmation of the operation by writing the operating state of a controller on a specific address in a RAM. CONSTITUTION:The content of the specific address in the RAM 2 is judged at the time of performing an initialization processing after resetting a central arithmetic processing unit 1, and a processing is shifted to an abnormality processing when data representing under execution exists, and the data is written on the specific address in the RAM 2 when no data representing under execution exists, and the content of the specific address in the RAM 2 is judged while performing a control processing after the initialization processing of the central arithmetic processing unit 1, and when it is the data representing under execution, a set signal is outputted to the watchdog timer, and when no data representing under execution exists, no watchdog timer set signal is outputted, then, a processing to perform the display of the abnormality of the watchdog timer is executed, and also, the data represented in the confirmation of the operation of the watchdog timer is written on the specific address in the RAM 2. In such a way, it is possible to perform diagnosis on the watchdog timer.

3. 发明专利

JPS6267643A SENSOR TROUBLE DETECTION SYSTEM 失效
公开(公告)号：JPS6267643A
公开(公告)日：1987-03-27
申请号：JP20799885
申请日：1985-09-20
申请人： OKI ELECTRIC IND CO LTD
发明人： OSAKI KOSUKE
IPC分类号： G06F13/00 , G06F11/00
摘要： PURPOSE:To detect the troubles of sensors while performing a normal operation in a processor by confirming a fixed value of the sum of outputs of sensors, which output mutually inverted signals, to detect the troubles of sensors. CONSTITUTION:When sensors 11 and 12 are operated normally, the output of a subtractor 13 is the two-fold output of the sensor 11 and is inputted to a processing part 17, and the output of an adder 14 is a fixed value and is neither larger than the upper limit value of an upper limit detector 15 nor smaller than the lower limit value of a lower limit detector 16, and the processing part 17 is operated normally. If sensors 11 and 12 are faulty, the subtractor 13 outputs the output difference between sensors 11 and 12 but the output of the adder 14 is not the fixed value and is larger than the upper limit value of the detector 15 or is smaller than the lower limit value of the detector 16, and the output signal is outputted from the detector 15 or 16 to the processing part 17 to execute the operation for trouble.

4. 发明专利

JPS62196020A LOAD CONTROL METHOD 失效
公开(公告)号：JPS62196020A
公开(公告)日：1987-08-29
申请号：JP3603186
申请日：1986-02-20
申请人： OKI ELECTRIC IND CO LTD
发明人： OSAKI KOSUKE
IPC分类号： H02H11/00

5. 发明专利

JPS62147538A RESET SYSTEM FOR WATCHDOG TIMER FOR DEVICE USING MICROCOMPUTER 失效
公开(公告)号：JPS62147538A
公开(公告)日：1987-07-01
申请号：JP28898685
申请日：1985-12-20
申请人： OKI ELECTRIC IND CO LTD
发明人： OSAKI KOSUKE
IPC分类号： G06F11/30 , G06F11/00
摘要： PURPOSE:To detect both faults with which the execution a main program and an interruption program are made impossible by separating an action to set the watchdog timer reset signal at a high level and an action to set said reset signal at a low level into the main and interruption programs respectively. CONSTITUTION:When an interruption program is used to perform an action to set the reset signal of a watchdog timer 3 at a high level, the watchdog timer reset signal is set at a low level by a main program. While the watchdog timer reset signal is set at a low level by an interruption program when the main program is used to set the watchdog timer reset signal at a high level. Thus it is possible to detect the fault of a circuit 2 which is controlled by a microcomputer 1 and a fault with which the execution of the interruption program or the main program is made impossible by a program runaway, etc.

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