专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2005011968A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005011968A
公开(公告)日：2005-01-13
申请号：JP2003173937
申请日：2003-06-18
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： TAKEWAKI TOSHIYUKI , NANBA HIROAKI , KUNISHIMA HIROYUKI
IPC分类号： H01L21/768
摘要： PROBLEM TO BE SOLVED: To suppress the producing of a level difference in the interlayer insulating film for a lower-layer wiring having a recess produced by dishing, thereby generating the deterioration of accuracy of photolithography upon forming via plugs or short-circuit between the via plugs, in the manufacture of a multi-layered wiring having big-width interconnect lines.
SOLUTION: A diffusion preventing film 106 and the interlayer insulating film 108 are formed on the lower-layer wirings 104, 105 and, thereafter, the interlayer insulating film is ground to flatten the same with a grinding amount in accordance with the amount of dishing of the lower-layer wiring 105 through CMP. Thereafter, via holes are formed by employing a photoresist 110 as a mask.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了抑制由具有由凹陷产生的凹部的下层布线的层间绝缘膜的电平差的产生，从而在通过插头或短路形成时产生光刻精度的劣化在通孔插头之间，制造具有大宽度互连线的多层布线。解决方案：在下层布线104,105上形成扩散防止膜106和层间绝缘膜108，然后将层间绝缘膜研磨成具有与研磨量相一致的层间绝缘膜，通过CMP对下层布线105进行凹陷。此后，通过使用光致抗蚀剂110作为掩模形成通孔。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2008166751A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2008166751A
公开(公告)日：2008-07-17
申请号：JP2007316076
申请日：2007-12-06
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： TAKEWAKI TOSHIYUKI , IGUCHI MANABU , OSHIDA DAISUKE , TOYOSHIMA HIRONORI , HIROI MASAYUKI , ONUMA TAKUJI , NANBA HIROAKI , HONMA ICHIRO , HASEGAWA MIEKO , TSUCHIYA YASUAKI , TAIJI TOSHIJI , KUNUGI TAKAHARU
IPC分类号： H01L21/304 , H01L21/3205 , H01L23/52
CPC分类号： H01L21/02074 , H01L21/76883
摘要： PROBLEM TO BE SOLVED: To improve the reliability of a semiconductor device in connection to a method for manufacturing the same. SOLUTION: A cleaning step after the chemical mechanical polishing (CMP) of a Cu film 103 is carried out following the procedure below. The main surface of a silicon substrate 121 provided with the Cu film 103 is brought into contact with an alkali aqueous solution, polycarboxylic acid, BTA, and an alkali aqueous solution in this order. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：为了提高与其制造方法相关的半导体器件的可靠性。解决方案：按照以下步骤进行Cu膜103的化学机械抛光（CMP）之后的清洁步骤。设置有Cu膜103的硅基板121的主表面依次与碱性水溶液，多元羧酸，BTA和碱性水溶液接触。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2004296620A Process for fabricating semiconductor device 审中-公开
公开(公告)号：JP2004296620A
公开(公告)日：2004-10-21
申请号：JP2003084879
申请日：2003-03-26
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： TAKEWAKI TOSHIYUKI , KUNISHIMA HIROYUKI , NANBA HIROAKI
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To enhance the yield of a semiconductor device employing a low permittivity film, to suppress incomplete formation of a photoresist film or a barrier metal film in the fabrication process of a semiconductor device employing a low permittivity film, and to utilize a semiconductor device employing a low permittivity film stably over a long term. SOLUTION: A lower layer interconnect line 255 and a copper plug 228 are formed and an L-Ox film 216 and an SiO 2 film 217 are formed in this order on an SiCN film 213. Using photoresist as a mask, the SiO 2 217 and the L-Ox film 216 are removed by etching. After etching residues are removed by resist stripper, heat treatment is performed and then a Ta/TaN film 220 and an upper layer interconnect line 270 are formed. COPYRIGHT: (C)2005,JPO&NCIPI

4. 发明专利

JP2004288870A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2004288870A
公开(公告)日：2004-10-14
申请号：JP2003078829
申请日：2003-03-20
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： TAKEWAKI TOSHIYUKI , NANBA HIROAKI , KUNISHIMA HIROYUKI
IPC分类号： G03F7/40 , G03F7/42 , H01L21/027 , H01L21/3205
摘要： PROBLEM TO BE SOLVED: To expose a rear surface of a semiconductor substrate as required while the rear surface thereof is protected.
SOLUTION: After an interlayer insulating film is formed over the principal surface of the semiconductor substrate (S12), a barrier film is formed by applying plasma to the rear surface of the semiconductor substrate (S14). Thereafter, a photoresist film patterned to the predetermined shape is formed over the interlayer insulating film (S16), and the dry etching is performed using the photoresist film as a mask (S18) to form a wiring groove to the interlayer insulating film. Subsequently, the photoresist film is removed using an amine system peeling liquid (S20). Thereafter, a metal film is formed to fill the wiring groove (S22) and a wire is formed by removing the metal film at the outside of the wiring groove with the CMP (S24). Next, the barrier film is removed through the cleaning of the rear surface of semiconductor substrate with a chemical solution (S26). Thereafter, a diffusion preventing film is formed over the interlayer insulating film and metal film (S28).
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了在其后表面被保护时根据需要露出半导体衬底的后表面。解决方案：在半导体衬底的主表面上形成层间绝缘膜（S12）之后，通过在半导体衬底的背面施加等离子体形成阻挡膜（S14）。此后，在层间绝缘膜上形成图案化为规定形状的光致抗蚀剂膜（S16），使用光致抗蚀剂膜作为掩模进行干法蚀刻（S18），以形成到层间绝缘膜的布线槽。接着，使用胺系剥离液除去光致抗蚀剂膜（S20）。此后，形成金属膜以填充布线槽（S22），并且通过用CMP除去布线槽外侧的金属膜形成布线（S24）。接下来，通过用化学溶液清洁半导体衬底的后表面去除阻挡膜（S26）。此后，在层间绝缘膜和金属膜上形成扩散防止膜（S28）。版权所有（C）2005，JPO＆NCIPI

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式