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1. 发明专利

JP2008311984A Bias circuit 有权
标题翻译：偏置电路
公开(公告)号：JP2008311984A
公开(公告)日：2008-12-25
申请号：JP2007158479
申请日：2007-06-15
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： NAKAGAWA KURAO
IPC分类号： H03F3/343 , G05F3/26
CPC分类号： G05F3/205
摘要： PROBLEM TO BE SOLVED: To perform stable bias operation, in a short time after being powered on by a bias circuit, and to prevent the bias circuit from becoming unstable over a long time due to the voltage variations in the power source.
SOLUTION: The bias circuit has a band gap reference and comprises a first current route 105 which supplies a drive current to the band gap reference, and a second current route 114, which supplies a current to the band gap reference over a predetermined period after the power, is turned on.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了进行稳定的偏置操作，在偏置电路通电之后的短时间内，并且由于电源的电压变化，防止偏置电路长时间变得不稳定。
解决方案：偏置电路具有带隙基准，并且包括向带隙基准提供驱动电流的第一电流路径105和第二电流路径114，其将电流提供给预定的带隙基准电源之后，打开。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2007104404A Photocurrent/voltage conversion circuit 有权
标题翻译：光电/电压转换电路
公开(公告)号：JP2007104404A
公开(公告)日：2007-04-19
申请号：JP2005292455
申请日：2005-10-05
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： NAKAGAWA KURAO
IPC分类号： H03F3/08
摘要： PROBLEM TO BE SOLVED: To provide a photocurrent/voltage conversion circuit capable of shortening a delay time for the output of a comparison determination result, with respect to start and end timings for the input of an optical signal due to the loss of a waveform in the output voltage of an amplifier, which is caused by a resistance portion and a capacity portion, etc., held in a light-sensitive element. SOLUTION: The photocurrent/voltage conversion circuit 101 includes a reference voltage control means to be obtained by serially connecting a resistor 102 and a capacitor 103 between the output end 4b of a reference voltage circuit 4 and an output end 12a to be synchronized by reverse-phase with the output voltage Va of an amplifier circuit 3 among the respective output ends 11a, 12a, 13a of three amplification stages. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种光电流/电压转换电路，其能够缩短用于输出比较确定结果的延迟时间，关于由于丢失的光信号的输入的开始和结束定时由保持在感光元件中的电阻部分和电容部分等引起的放大器的输出电压中的波形。解决方案：光电流/电压转换电路101包括通过在参考电压电路4的输出端4b和输出端12a之间串联连接电阻器102和电容器103而获得的参考电压控制装置以进行同步通过与三个放大级的各个输出端11a，12a，13a之间的放大器电路3的输出电压Va的反相。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2010004093A Output driving circuit 审中-公开
标题翻译：输出驱动电路
公开(公告)号：JP2010004093A
公开(公告)日：2010-01-07
申请号：JP2008158690
申请日：2008-06-18
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： NAKAGAWA KURAO
IPC分类号： H03K17/06 , H03F3/42 , H03K17/687
CPC分类号： H03K19/018571 , H03K17/063 , H03K2217/0081
摘要： PROBLEM TO BE SOLVED: To solve the following problem: an output voltage may become unstable in a conventional output driving circuit. SOLUTION: The output driving circuit has: a totem pole type output section equipped with a high-side transistor in which an output stage power supply voltage is applied to a drain and a source is connected to a first node, and a low-side transistor in which a ground voltage is applied to a source and a drain is connected to the first node; and a bootstrap section equipped with a capacitive element having one end connected to the first node and supplying charges charged when the high-side transistor is in an OFF state to a gate when the high-side transistor is in an ON state. The output driving circuit is further provided with: a first transistor connected between the driving circuit power supply voltage and the high-side transistor and becoming a conduction state when the high-side transistor is turned on; and a second transistor connected between the other end of the capacitive element and a gate of the high-side transistor and becoming a conduction state when the high-side transistor is turned on. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决以下问题：传统的输出驱动电路中的输出电压可能变得不稳定。解决方案：输出驱动电路具有：图腾柱型输出部，其配备有将侧输出级电源电压施加到漏极并且源极连接到第一节点的高侧晶体管，低其中将接地电压施加到源极，漏极连接到第一节点; 以及引导部，其具有电容元件，所述电容元件的一端连接到所述第一节点，并且当所述高侧晶体管处于导通状态时，向所述栅极提供当所述高侧晶体管处于截止状态时充电的电荷。输出驱动电路还具备连接在驱动电路电源电压和高侧晶体管之间的第一晶体管，并且在高侧晶体管导通时成为导通状态; 以及连接在电容元件的另一端和高侧晶体管的栅极之间并在高侧晶体管导通时变为导通状态的第二晶体管。版权所有（C）2010，JPO＆INPIT

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