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1. 发明专利

JP2013211485A Silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device manufactured by the same 有权
标题翻译：硅碳化硅半导体器件制造方法及其制造的碳化硅半导体器件
公开(公告)号：JP2013211485A
公开(公告)日：2013-10-10
申请号：JP2012082041
申请日：2012-03-30
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： KINOSHITA AKIMASA , TSUJI TAKASHI , FUKUDA KENJI
IPC分类号： H01L21/28
CPC分类号： H01L29/1608 , H01L21/02068 , H01L21/02529 , H01L21/02609 , H01L21/0485 , H01L21/0495 , H01L29/45 , H01L29/47 , H01L29/6606 , H01L29/66227 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a silicon carbide semiconductor device having a metal/silicon carbide semiconductor interface, which improves adhesion of a metal deposited film and inhibits peeling of the metal deposited film.SOLUTION: A silicon carbide semiconductor device manufacturing method comprises: a process (a) of preparing a silicon carbide substrate of a first conductivity type; a process (b) of forming an epitaxial layer of the first conductivity type on a principal surface of the silicon carbide substrate of the first conductivity; a process (c) of forming a first metal layer on another principal surface of the silicon carbide substrate of the first conductivity type; a process (d) of performing a heat treatment on the silicon carbide substrate after the process (c), and forming ohmic junction between the first metal layer and the other principal surface of the silicon carbide substrate and forming a layer composed of a material having good adhesion with other metals on the first semiconductor layer; and a process (e) of removing an impurity on a surface of the first metal layer on the other principal surface after the process (d) to clean the surface of the first metal layer. The heat treatment in the process (d) is performed at a temperature of 1100°C and over.
摘要翻译：要解决的问题：提供一种具有金属/碳化硅半导体界面的碳化硅半导体器件的制造方法，其改善金属沉积膜的粘附性并抑制金属沉积膜的剥离。解决方案：碳化硅半导体器件制造方法包括：制备第一导电类型的碳化硅衬底的工艺（a）; 在第一导电率的碳化硅衬底的主表面上形成第一导电类型的外延层的工艺（b）; 在第一导电类型的碳化硅衬底的另一个主表面上形成第一金属层的工艺（c）; （c）之后对所述碳化硅衬底进行热处理的工序（d），以及在所述碳化硅衬底的所述第一金属层与所述另一主面之间形成欧姆结，形成由具有与第一半导体层上的其它金属具有良好的附着力; 以及（d）之后，在第一金属层的表面上除去第一金属层的表面上的杂质以清洁第一金属层的表面的工序（e）。工艺（d）中的热处理在1100℃以上的温度下进行。

2. 发明专利

JP2013251406A Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device 有权
标题翻译：硅碳化硅半导体器件及制造碳化硅半导体器件的方法
公开(公告)号：JP2013251406A
公开(公告)日：2013-12-12
申请号：JP2012125254
申请日：2012-05-31
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： TSUJI TAKASHI , KINOSHITA AKIMASA , IWAMURO NORIYUKI , FUKUDA KENJI
IPC分类号： H01L29/47 , H01L29/41 , H01L29/872
CPC分类号： H01L29/872 , H01L21/02529 , H01L29/0615 , H01L29/0619 , H01L29/08 , H01L29/1608 , H01L29/36 , H01L29/47 , H01L29/66143
摘要： PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor device that allows sufficiently enlarging a forward current and improving the withstand voltage, and to provide a method of manufacturing the silicon carbide semiconductor device.SOLUTION: In a surface layer of a silicon carbide substrate base, a p-type region 3, a p-type region 4, and p-type regions 5 are selectively provided. The p-type region 3 and the p-type region 4 are provided in a withstand-voltage structure portion surrounding an active region. The p-type regions 5 are provided in the active region and constitute a JBS structure. The p-type region 4 surrounds the p-type region 3 and constitutes a junction termination (JTE) structure. A Schottky electrode 7 forms a Schottky junction with an n-type silicon carbide epitaxial layer 2. The Schottky electrode 7 is overhung on an interlayer insulating film 6 covering a part of the p-type region 3, and the overhung portion functions as a field plate. The p-type regions 5 have an acceptor concentration higher than or equal to a predetermined concentration, thereby enlarging a forward surge current.
摘要翻译：要解决的问题：提供一种允许充分扩大正向电流并提高耐电压的碳化硅半导体器件，并提供一种制造碳化硅半导体器件的方法。解决方案：在碳化硅衬底基底的表面层选择性地设置p型区域3，p型区域4和p型区域5。 p型区域3和p型区域4设置在围绕有源区域的耐压结构部分中。 p型区域5设置在有源区域中并构成JBS结构。 p型区域4围绕p型区域3并构成结终端（JTE）结构。肖特基电极7与n型碳化硅外延层2形成肖特基结。肖特基电极7悬空在覆盖p型区域3的一部分的层间绝缘膜6上，并且悬臂部分作为场盘子。 p型区域5具有高于或等于预定浓度的受主浓度，从而扩大正向浪涌电流。

3. 发明专利

JP2013232564A Semiconductor device and semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件和半导体器件制造方法
公开(公告)号：JP2013232564A
公开(公告)日：2013-11-14
申请号：JP2012104234
申请日：2012-04-27
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： KINOSHITA AKIMASA , TSUJI TAKASHI , FUKUDA KENJI
IPC分类号： H01L29/47 , H01L21/265 , H01L21/336 , H01L29/06 , H01L29/12 , H01L29/78 , H01L29/872
CPC分类号： H01L29/7839 , H01L21/02664 , H01L29/045 , H01L29/0615 , H01L29/0619 , H01L29/0661 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/402 , H01L29/41741 , H01L29/6606 , H01L29/66477 , H01L29/7802 , H01L29/7811 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can maintain high breakdown voltage, and which has high reliability, and which includes a wide band gap semiconductor; and provide a manufacturing method of the semiconductor device.SOLUTION: A semiconductor device comprises ptype regions 3, 4 and a p type region 5 which are selectively formed on a surface layer of a silicon carbide substrate. The ptype region 3 is provided in a breakdown voltage structure 102 which surrounds an active region 101. The ptype region 4 is provided in the active region 101 and has a JBS structure. The p type region 5 surrounds the ptype region 3 and has a junction termination extension (JTE). The semiconductor device further comprises a Schottky electrode 9 which forms Schottky junction with an n type silicon carbide epitaxial layer 2. The Schottky electrode 9 projects on an interlayer insulation film 6 which covers a part of the ptype region 3 and the p type region 5 and the projected part functions as a field plate.
摘要翻译：要解决的问题：提供可以保持高击穿电压并且具有高可靠性并且包括宽带隙半导体的半导体器件; 并提供半导体器件的制造方法。解决方案：半导体器件包括选择性地形成在碳化硅衬底的表面层上的p型区域4,4和p型区域5。 p型区域3设置在围绕有源区域101的击穿电压结构102中。p型区域4设置在有源区域101中并具有JBS结构。 p型区域5围绕p型区域3并具有连接终止延伸部（JTE）。半导体器件还包括与n型碳化硅外延层2形成肖特基结的肖特基电极9.肖特基电极9突出覆盖p型区域3和p型区域5的一部分的层间绝缘膜6和投影部分用作场板。

4. 发明专利

JP2013222731A Wideband gap semiconductor device and method of manufacturing the same 有权
标题翻译：宽带隙半导体器件及其制造方法
公开(公告)号：JP2013222731A
公开(公告)日：2013-10-28
申请号：JP2012091460
申请日：2012-04-12
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： KINOSHITA AKIMASA , TSUJI TAKASHI , FUKUDA KENJI
IPC分类号： H01L29/47 , H01L21/329 , H01L29/872
CPC分类号： H01L27/0766 , H01L21/02529 , H01L21/0254 , H01L21/0495 , H01L29/0619 , H01L29/1608 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/6606 , H01L29/7393 , H01L29/7801 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To suppress a leak current without lowering an on-resistance of a JBS structure diode device containing a Schottky interface on a wideband gap semiconductor.SOLUTION: On a surface of a silicon carbide substrate 1 formed on a wideband gap semiconductor of a first conductive type and high concentration, a silicon carbide epitaxial layer 2 is formed, being formed of a wideband gap semiconductor of a first conductive type and low concentration. A Schottky electrode 9 is formed on the silicon carbide epitaxial layer 2. An interface between the Schottky electrode 9 and the silicon carbide epitaxial layer 2 is a Schottky interface. In the silicon carbide epitaxial layer 2 at a lower position in depth direction of the Schottky electrode 9, a plurality of second conductive type impurity ranges 4 are arranged in width direction at a constant interval. Because of the shape of the impurity ranges 4, a width on the inner side in depth direction of the silicon carbide epitaxial layer 2 differs from the width at an upper position in depth direction, thereby suppressing a leak current without lowering on-resistance.
摘要翻译：要解决的问题：抑制泄漏电流而不降低宽带隙半导体上包含肖特基界面的JBS结构二极管器件的导通电阻。解决方案：在形成在宽带隙半导体的宽带隙半导体上的碳化硅衬底1的表面上第一导电类型和高浓度，形成由第一导电类型和低浓度的宽带隙半导体形成的碳化硅外延层2。肖特基电极9形成在碳化硅外延层2上。肖特基电极9和碳化硅外延层2之间的界面是Schottky界面。在肖特基电极9的深度方向的下位置处的碳化硅外延层2中，以宽度方向以一定的间隔布置多个第二导电型杂质范围4。由于杂质范围4的形状，碳化硅外延层2的深度方向内侧的宽度与深度方向的上部位置的宽度不同，能够抑制漏电流而不降低导通电阻。

5. 发明专利

JP2013211467A Silicon carbide semiconductor element and manufacturing method of the same 有权
标题翻译：硅碳化硅半导体元件及其制造方法
公开(公告)号：JP2013211467A
公开(公告)日：2013-10-10
申请号：JP2012081906
申请日：2012-03-30
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： TSUJI TAKASHI , KINOSHITA AKIMASA , FUKUDA KENJI
IPC分类号： H01L21/28 , H01L21/336 , H01L29/12 , H01L29/78
CPC分类号： H01L29/1608 , H01L21/0485 , H01L21/283 , H01L29/40 , H01L29/43 , H01L29/45 , H01L29/47 , H01L29/78 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor element which does not cause peeling even after wafer dicing and subsequent pickup from a dicing tape.SOLUTION: A silicon carbide semiconductor element comprises: a thin film composed of NiSi and TiC which is formed by sintering after deposition of a thin film composed of Ni and a thin film composed of Ti on a silicon carbide substrate, and which has a structure in which TiC precipitates on a surface; and a multilayer thin film which is formed on the TiC surface and which includes Ti as a first thin film and Ni as a second thin film. A TiC derived C composition ratio at an interface between the layer composed of TiC and the Ti layer is 15% and over.
摘要翻译：要解决的问题：提供一种碳化硅半导体元件，即使在晶片切割之后也不会导致剥离，并且随后从切割带拾取。解决方案：碳化硅半导体元件包括：由NiSi和TiC组成的薄膜，其由在碳化硅基板上沉积由Ni构成的薄膜和由Ti构成的薄膜后，烧结，其具有TiC在表面上析出的结构; 以及形成在TiC表面上并且包括Ti作为第一薄膜和Ni作为第二薄膜的多层薄膜。在TiC和Ti层之间的界面处的TiC衍生的C组成比为15％以上。

6. 发明专利

JP2013232559A Method of manufacturing silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：JP2013232559A
公开(公告)日：2013-11-14
申请号：JP2012104226
申请日：2012-04-27
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： KINOSHITA AKIMASA , FUKUDA KENJI , NAKAMATA SHINICHI
IPC分类号： H01L21/28 , H01L21/329 , H01L29/47 , H01L29/872
CPC分类号： H01L29/872
摘要： PROBLEM TO BE SOLVED: To fabricate a device with excellent characteristics at low cost by lowering the heat treatment temperature for forming an ohmic contact.SOLUTION: An epitaxial layer 2 is grown on a first primary surface of a silicon carbide substrate 1, and an ohmic electrode 6 is formed on a second primary surface of the silicon carbide substrate 1 on the opposite side of the epitaxial layer 2. Subsequently, before the step of forming the ohmic electrode 6 on the second primary surface, ions are injected into the second primary surface to activate the surface. The ion injection step is performed without heating the silicon carbide substrate 1. The crystal type of the silicon carbide substrate 1 is 4H-SiC or 6H-SiC, and a layer of 3C-SiC or in which 3C-SiC is mixed can be formed between the second primary surface and a metal film formed as the ohmic electrode 6 on the second primary surface by ion injection without heating, thereby reducing contact resistance without interference of the formation of a low-resistance region.
摘要翻译：要解决的问题：通过降低用于形成欧姆接触的热处理温度，以低成本制造具有优异特性的器件。解决方案：外延层2生长在碳化硅衬底1的第一主表面上，欧姆电极6形成在外延层2的相反侧的碳化硅衬底1的第二主表面上。随后，在第二主表面上形成欧姆电极6的步骤之前，将离子注入第二主表面激活表面。在不加热碳化硅衬底1的情况下进行离子注入步骤。碳化硅衬底1的晶体类型是4H-SiC或6H-SiC，并且可以形成3C-SiC层或其中混合3C-SiC的层在第二主表面和通过离子注入而不加热而形成为第二主表面上的欧姆电极6的金属膜之间，从而降低接触电阻而不会形成低电阻区域。

7. 发明专利

JP2013219150A Manufacturing method of ohmic electrode of silicon carbide semiconductor device 审中-公开
标题翻译：硅碳化硅半导体器件的OHMIC电极的制造方法
公开(公告)号：JP2013219150A
公开(公告)日：2013-10-24
申请号：JP2012087726
申请日：2012-04-06
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： RYO MINA , NAKAMATA SHINICHI , KINOSHITA AKIMASA , FUKUDA KENJI
IPC分类号： H01L21/28 , H01L21/285 , H01L21/336 , H01L29/12 , H01L29/78
CPC分类号： H01L21/0485 , H01L21/02529 , H01L21/02636 , H01L21/285 , H01L21/2855 , H01L29/0619 , H01L29/0638 , H01L29/1608 , H01L29/401 , H01L29/6606 , H01L29/66143 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of an ohmic electrode of a silicon carbide semiconductor device, which has a uniform film thickness and no peeling, and which can improve usability of a target.SOLUTION: A manufacturing method of an ohmic electrode of a silicon carbide semiconductor device comprises: a process of forming an ohmic metal film on a silicon carbide substrate by sputtering a target composed of a mixture or an alloy in which a composition ratio of nickel to a metal which reduces magnetic permeability of nickel and produces a carbide is adjusted to be a predetermined composition ratio; and a process of performing heat treatment on the metal film to burn the metal film.
摘要翻译：要解决的问题：提供具有均匀的膜厚度并且不剥离的碳化硅半导体器件的欧姆电极的制造方法，并且可以提高靶的可用性。解决方案：一种欧姆电极的制造方法碳化硅半导体器件包括：在碳化硅衬底上形成欧姆金属膜的工艺，通过溅射由混合物或合金构成的靶，其中镍与金属的组成比降低镍的导磁率，并产生碳化物调整为预定的组成比; 以及对金属膜进行热处理以烧结金属膜的工序。

8. 发明专利

JP2013211496A Silicon carbide semiconductor element manufacturing method 有权
标题翻译：硅碳化硅半导体元件制造方法
公开(公告)号：JP2013211496A
公开(公告)日：2013-10-10
申请号：JP2012082243
申请日：2012-03-30
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Fuji Electric Co Ltd , 富士電機株式会社
发明人： TSUJI TAKASHI , KINOSHITA AKIMASA , FUKUDA KENJI
IPC分类号： H01L21/329 , H01L21/28 , H01L29/12 , H01L29/47 , H01L29/78 , H01L29/868 , H01L29/872
CPC分类号： H01L29/1608 , H01L21/3043 , H01L21/3065 , H01L21/78 , H01L29/0619 , H01L29/0657 , H01L29/0886 , H01L29/1095 , H01L29/41766 , H01L29/6606 , H01L29/66712 , H01L29/7395 , H01L29/7802 , H01L29/868 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a silicon carbide semiconductor layer on a semiconductor substrate, which has a structure capable of decreasing on-resistance and which can maintain strength of the substrate to reduce cracks of a wafer in a wafer process even when the semiconductor substrate is thinned for decreasing on-resistance.SOLUTION: A manufacturing method of a silicon carbide semiconductor element which includes a drift layer on a principal surface on one side of a semiconductor substrate composed of a silicon carbide for playing a role of maintaining high breakdown voltage and an ohmic electrode on a rear face on another side additionally comprises a process of dicing the semiconductor substrate before forming the ohmic electrode on the rear face side so as to form at least one dicing line in an element activation region on a surface of the substrate opposite to the drift layer.
摘要翻译：要解决的问题：提供一种在半导体衬底上具有碳化硅半导体层的半导体器件，该半导体器件具有能够降低导通电阻的结构，并且能够保持衬底的强度，以减少晶片工艺中晶片的裂纹甚至当半导体衬底被薄化以降低导通电阻时。解决方案：一种碳化硅半导体元件的制造方法，其包括在由碳化硅组成的半导体衬底的一侧上的主表面上的漂移层，用于起保持作用在另一侧的背面上的高击穿电压和欧姆电极还包括在形成欧姆电极之后在背面侧上切割半导体衬底以在表面上的元件激活区域中形成至少一个切割线的工艺的衬底与漂移层相反。

9. 发明专利

JP2012094683A Wide band-gap semiconductor device 审中-公开
标题翻译：宽带带半导体器件
公开(公告)号：JP2012094683A
公开(公告)日：2012-05-17
申请号：JP2010240612
申请日：2010-10-27
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所
发明人： KINOSHITA AKIMASA , IWAMURO NORIYUKI
IPC分类号： H01L29/47 , H01L21/329 , H01L29/06 , H01L29/861 , H01L29/872
CPC分类号： H01L29/872 , H01L24/05 , H01L2224/02166 , H01L2224/04042 , H01L2224/05552 , H01L2224/05567 , H01L2224/48463 , H01L2924/00014 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To suppress an increase in leakage current when applying a reverse voltage and an increase in on-resistance of a device with a metal/wide band-gap semiconductor interface, in a wide band-gap semiconductor device.SOLUTION: A wide band-gap semiconductor device comprises: high concentration wide band-gap semiconductor substrate of a first conductive type; a low concentration wide band-gap semiconductor deposition film of the first conductive type formed on the semiconductor substrate; a metal film 8 that is formed on the semiconductor deposition film and constitute a Schottky interface region between the metal film and the semiconductor deposition film; and regions 4 and 5 of a second conductive type formed in regions corresponding to a peripheral portion of the metal film on the low concentration wide band-gap semiconductor deposition film of the first conductive type. The Schottky interface region in the low concentration wide band-gap semiconductor deposition film of the first conductive type constitutes a plurality of periodic island regions with surrounded by the second conductive-type regions.
摘要翻译：要解决的问题：在宽带隙半导体器件中，为了抑制施加反向电压时的漏电流的增加和具有金属/宽带隙半导体接口的器件的导通电阻的增加。解决方案：宽带隙半导体器件包括：第一导电类型的高浓度宽带隙半导体衬底; 形成在半导体衬底上的第一导电类型的低浓度宽带隙半导体淀积膜; 形成在半导体淀积膜上并构成金属膜与半导体沉积膜之间的肖特基界面区域的金属膜8; 以及形成在与第一导电类型的低浓度宽带隙半导体淀积膜上的金属膜的周边部分相对应的区域中的第二导电类型的区域4和5。第一导电类型的低浓度宽带隙半导体沉积膜中的肖特基界面区域构成被第二导电类型区域包围的多个周期性岛状区域。版权所有（C）2012，JPO＆INPIT

10. 发明专利

JP2012222074A Method for forming electrodes on silicon carbide semiconductor device 有权
标题翻译：在碳化硅半导体器件上形成电极的方法
公开(公告)号：JP2012222074A
公开(公告)日：2012-11-12
申请号：JP2011084493
申请日：2011-04-06
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所
发明人： KINOSHITA AKIMASA , TSUJI TAKASHI , IMAI BUNICHI
IPC分类号： H01L21/28
CPC分类号： H01L21/0485 , H01L29/1608 , H01L29/45 , H01L29/47 , H01L29/6606 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a method for forming electrodes on a silicon carbide semiconductor device capable of suppressing peeling by improving adhesion of a metal/silicon carbide device interface of a manufactured device in the silicon carbide semiconductor device.SOLUTION: A method for forming electrodes on a silicon carbide substrate includes a step of depositing a metal on which a carbide can be formed on a silicon carbide substrate on which a graphite is formed on its surface and a step of forming the carbide between a metal layer and the silicon carbide substrate by annealing the silicon carbide substrate.

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