专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPH02194519A COMPOSITE SEMICONDUCTOR SUBSTRATE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH02194519A
公开(公告)日：1990-08-01
申请号：JP1199589
申请日：1989-01-23
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YAMAGUCHI MASASHI , SUGO MITSURU
IPC分类号： H01L21/02 , H01L21/20
摘要： PURPOSE:To form a semiconductor single-crystal growth layer whose dislocation density is extremely small by a method wherein faces of a first substrate and a second substrate in which a single-crystal growth layer composed of at least one kind selected from group IV elements, III-V compound semiconductors and II-VI compound semiconductors or of these elements or compound semiconductors has been formed and whose constitutive elements or constitution ratios of the elements are different from each other are bonded directly at a temperature of a critical temperature or lower causing a dislocation. CONSTITUTION:For example, the following are prepared: a first single-crystal substrate 1 whose surface has been cleaned and which is composed of Si or Ge; a second single-crystal substrate composed of a single-crystal growth layer 2' constituted of a compound semiconductor composed of group III elements and group V elements the periodic table such as GaAs, InP and the like which are different from those of the substrate 1 and constituted of a compound semiconductor composed of group II elements and group VI elements such as ZnSe or a single-crystal substrate 4' composed of these III-V and II-VI compound semiconductors. Then, the surface of these substrates are cleaned; after that, these substrates are bonded directly in a clean atmosphere at a temperature of 450 deg.C or lower; alternatively, after these substrates have been bonded directly, they are heat-treated at the temperature of 450 deg.C and completed.

2. 发明专利

JPS6259908B2 失效
公开(公告)号：JPS6259908B2
公开(公告)日：1987-12-14
申请号：JP4466382
申请日：1982-03-23
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YAMAMOTO AKITAKE , SHIBUKAWA ATSUSHI , SUGIURA HIDEO , YAMAGUCHI MASASHI
IPC分类号： H01L31/04 , H01L31/0224 , H01L31/10 , H01L33/28 , H01L33/30 , H01L33/42 , H01L33/44

3. 发明专利

JPS61216366A SOLAR BATTERY 失效
公开(公告)号：JPS61216366A
公开(公告)日：1986-09-26
申请号：JP5565885
申请日：1985-03-22
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YAMAGUCHI MASASHI , YAMAMOTO AKITOSHI , ITO YOSHIO
IPC分类号： H01L31/04 , H01L31/0216 , H01L31/06 , H01L31/068 , H01L31/0693
摘要： PURPOSE:To obtain a high efficiency and realize a light-weight structure by a method wherein the first intermediate layer, which relieves a lattice mismatch, and the second intermediate layer, which prevents a recombination loss of photo-exciting carriers, are provided between an Si substrate and a GaAs solar battery layer. CONSTITUTION:The first intermediate layer 13 is formed by making an N-type GaAs film 12 grow at a low temperature on an N-type Si single crystal substrate 11 and the second intermediate layer 16 consisting of an N-type AlyGa1-yAs layer (wherein y=0-0.4) is formed on the first layer 13. An N-type GaAs layer 17, a P-type GaAs layer 18 and a P-type AlwGa1-wAs window layer 19 are formed on the second layer 16 in this order to constitute a solar battery of a hetero-phase structure consisting of a GaAs P-N junction 20. Wherein a reference numeral 21 denotes a reflection protection film provided on the window layer 19, 22 denotes a surface electrode and 23 denotes a back side electrode.

4. 发明专利

JPS6057713B2 失效
公开(公告)号：JPS6057713B2
公开(公告)日：1985-12-16
申请号：JP11018680
申请日：1980-08-13
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： ANDO TAKASHI , YAMAGUCHI MASASHI , KAMIMURA ZEIO
IPC分类号： H04B10/60 , H01L27/144 , H01L31/0264 , H01L31/10 , H01L51/42 , H04B10/00 , H04B10/40 , H04B10/50 , H04J14/00 , H04J14/02 , H04J14/04 , H04J14/06

5. 发明专利

JPS56112712A METHOD OF MANUFACTURING ELECTRET 失效
公开(公告)号：JPS56112712A
公开(公告)日：1981-09-05
申请号：JP1549080
申请日：1980-02-13
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： MIZUSHIMA YOSHIHIKO , TAKEDA AKITSU , YAMAGUCHI MASASHI
IPC分类号： H01G7/02

6. 发明专利

JPS53117390A ZINC SELENIDE LIGHT EMITTING DIODE AND PRODUCTION OF THE SAME 失效
公开(公告)号：JPS53117390A
公开(公告)日：1978-10-13
申请号：JP3154077
申请日：1977-03-24
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YAMAMOTO ISAMU , YAMAGUCHI MASASHI , KONDOU MAMORU
IPC分类号： H01L33/28 , H01L33/40
摘要： PURPOSE:To make an LED of high blue emission efficiency by doping impurity elements effective for the increase in blue emission intensity to SeZn.

7. 发明专利

JPH04367805A FIBER TYPE OPTICAL DEMULTIPLEXING CIRCUIT 失效
公开(公告)号：JPH04367805A
公开(公告)日：1992-12-21
申请号：JP14455591
申请日：1991-06-17
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： KITO TSUTOMU , SUDA HIROYUKI , YAMAGUCHI MASASHI , KAWACHI MASAO
IPC分类号： G02B6/28
摘要： PURPOSE:To obtain high reliability and low loss without curving a fiber by providing a return part to a loop-back fiber and providing an optical fiber coupler and a reflecting mirror there as a return circuit. CONSTITUTION:Monitor light which is made incident from the input port of a main fiber 1 is demultiplexed by an optical fiber coupler 4 for wavelength separation and outputted to a cross port and the light after being propagated in the loop-back fiber 3a reaches the optical fiber coupler 9 and reflecting mirror 10. The monitor light is returned and propagated to the loop-back fiber 3b through the cooperation of the return circuit. Namely, a mirror image of the optical fiber coupler 9 is formed by the reflecting mirror 10 on the mirror image principle. Consequently, two optical fiber couplers 9 are equivalently connected in series when viewed from the left side of a figure. The monitor light propagated in the loop-back fiber 3a is coupled by the substantially two optical fiber couplers 9 with the loop-back fiber 3b.

8. 发明专利

JPH0375608A PACKAGING METHOD FOR OPTICAL WAVEGUIDE PARTS 失效
公开(公告)号：JPH0375608A
公开(公告)日：1991-03-29
申请号：JP21167589
申请日：1989-08-17
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： HANAWA FUMIAKI , KOBAYASHI SOICHI , YAMAGUCHI MASASHI , KITO TSUTOMU , SUDA HIROYUKI
IPC分类号： G02B6/30
摘要： PURPOSE:To obtain the optical waveguide parts which are low in loss and have excellent long-term reliability by applying heat and voltage between a silicon substrate provided with an optical waveguide chip and a glass mount covering this substrate and between a silicon substrate formed with V-grooves and a glass mount covering this, respectively and fixing the contact surfaces by chemical bonding. CONSTITUTION:The heat and voltage are applied between the silicon substrate 3 provided with the optical waveguide chip made of a quartz system and the glass mount 8 covering this substrate and between the silicon substrate 5 formed with the V-grooves 6 and the glass mount 8 covering this, respectively, to generate the chemical bond. The contact surfaces of the respective silicon substrates 3, 5 and the glass mounts 4, 8 are thus fixed by the chemical bonding. The surfaces of the two material are first heated to about 300 deg.C and are tightly adhered and then, while these two materials are pressed to each other, 500 to 1,000V voltage is impressed thereto. The phenomenon that the connection loss is increased by the external environment, such as heat-cycle tests, is prevented in this way and the optical waveguide parts having the high reliability are obtd.

9. 发明专利

JPH02174220A MANUFACTURE OF SEMICONDUCTOR SUBSTRATE 失效
公开(公告)号：JPH02174220A
公开(公告)日：1990-07-05
申请号：JP32969488
申请日：1988-12-27
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YAMAGUCHI MASASHI , ITO YOSHIO , KONDO SUSUMU
IPC分类号： H01L21/205 , H01L21/20 , H01L21/324
摘要： PURPOSE:To decrease dislocation density and shorten manufacturing hours by causing a rear layer consisting of a thin film material which has thermal expansion coefficient that is larger than that of a substrate to be deposited at the rear of the single crystal substrate and treating its layer with heat at a high temperature of 700-900 deg.C. CONSTITUTION:After an Si3N4 film 4 amounting to about 5000Angstrom is formed on the rear of an Si single crystal substrate 1 with a plasma CVD process, an intermediate layer 3 consisting of a low temperature growth layer at a growth temperature of the order of 400 deg.C as well as of a high temperature growth layer at a growth temperature of the order of 700 deg.C and amounting to about 1.5mum is formed with an organic metal vapor phase epitaxy(OMVPE) process on the Si single crystal substrate 1. After that, its layer is treated with heat at a temperature 800 deg.C in an atmosphere of arsine (AsH3) for 1-10 hours. Further, a GaAs single crystal layer 2 amounting to 1mum is formed at a temperature 700 deg.C. Dislocation density in the GaAs single crystal at a semiconductor substrate which is treated with heat for 1-10 hours is about 10 cm and 10 cm respectively. In this way, heat treatment time is lessened by approximately 1/10 or less in comparison with its time required by conventional processes or dislocation density decreases with a high reduction of more than one digit.

10. 发明专利

JPH01220819A MANUFACTURE OF COMPOSITE SEMICONDUCTOR SUBSTRATE 失效
公开(公告)号：JPH01220819A
公开(公告)日：1989-09-04
申请号：JP4658588
申请日：1988-02-29
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： SUGO MITSURU , YAMAMOTO AKIISA , YAMAGUCHI MASASHI
IPC分类号： H01L21/28 , H01L21/20 , H01L21/36
摘要： PURPOSE:To enable integrated circuits or the like to be produced finely and precisely by forming a metallic layer on a second principal face of a semiconductor substrate opposite to the first one as a temperature higher than ordinary temperature is given to the substrate such that the metallic layer has a sufficiently large thickness that is determined in view of the temperature given to the substrate so that a composite semiconductor substrate obtains an inverse number of radius of curvature of warpage that is smaller than one tenth of that of the substrate. CONSTITUTION:On one principal face 2a of a semiconductor substrate body 1, a semiconductor layer 3 having a coefficient of thermal expansion higher than that of the substrate 1 is formed as a temperature higher than ordinary temperature is given to the semiconductor substrate 1, so that a semiconductor substrate 1 is produced. Then, a metallic layer 5 is formed on the other principal face 2b of the substrate 1 by vapor deposition, whereby a composite semiconductor substrate 6 is produced. The metallic layer 5 is formed, as a temperature higher than ordinary temperature is given to the semiconductor substrate 1, into a thickness which is large enough to enable the composite semiconductor substrate 6 to be produced to have only an inverse number of radius of curvature of warpage that is smaller than one tenth of that of the semiconductor substrate. Further, the temperature given to the semiconductor substrate 1 should be taken into consideration when such a thickness is determined.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式