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    • 4. 发明专利
    • INTERFERENCE COMPENSATING CIRCUIT
    • JPH02100424A
    • 1990-04-12
    • JP25303888
    • 1988-10-06
    • NIPPON TELEGRAPH & TELEPHONE
    • WATANABE KAZUJIITO MASAHIKOMATSUE HIDEAKI
    • H04B1/10
    • PURPOSE:To constitute the title circuit so that an interference signal can be eliminated enough even when a signal which becomes the cause of an interference cannot be obtained directly by receiving signals generated by mixing the interference signal into a main signal with regard to plural propagation paths, respectively, and synthesizing these signals by negative phases to each other and equal amplitude. CONSTITUTION:Relative amplitude and the phase difference of a receiving signal received from an auxiliary antenna 4 and a receiving signal distributed form a main antenna 1 are detected by a control circuit 105. Subsequently, a variable amplitude circuit 37 and a variable phase circuit 38 are controlled by its output so that a main signal included in one input of an adder 39 becomes an equal amplitude negative phase against a main signal contained in the other input, the main signals are offset by the output of the adder 39 and only an interference signal is obtained. In such a manner, the interference signal of high purity can be obtained, it is unnecessary to receive directly a signal which becomes the cause of the interference signal, and even if the directions of a main signal source and an interference signal source are the same, the interference signal mixed in the receiving signal can be eliminated with high accuracy.
    • 5. 发明专利
    • CROSS POLARIZATION RECEPTION CIRCUIT
    • JPH01300729A
    • 1989-12-05
    • JP13399188
    • 1988-05-30
    • NIPPON TELEGRAPH & TELEPHONE
    • SHIRATO TADASHIHATANO KIYOHIKOKOYAKATA SUSUMUMATSUE HIDEAKI
    • H04J11/00H03H15/00H04B3/04
    • PURPOSE:To output main polarized wave signals in a state where interference signals from different polarized waves are effectively eliminated by processing the output of a demodulator at clocks taster than the period of reproduced clocks and adjusting the tap weight factor of a transversal filter at a high speed. CONSTITUTION:Two A/D converters 7 and 9 and the transversal filter 19 are constituted so that they can be operated at clocks faster than (twice: in this execution example) the reproduced clocks 102 of the demodulator 5 and, therefore, a doubler 21 which outputs clocks 102D which is twice as fast as the reproduced clocks 102 is provided between the demodulator 5 and D/A converters 7 and 9. In addition, this reception circuit is provided with a signal reproducing circuit 22 which synchronizes the output signal of a subtractor 18 to the clocks 102 reproduced by the demodulator 5. The circuit 22 returns the data speed to the original speed since the output signal of the subtractor 18 has a repeat frequency which is twice as much as the data speed. The output of the signal reproducing circuit 22 is outputted as the main polarized wave receiving signals from which interference signals are eliminated.
    • 6. 发明专利
    • INTERFERENCE COMPENSATION CIRCUIT
    • JPH01221932A
    • 1989-09-05
    • JP4722288
    • 1988-02-29
    • NIPPON TELEGRAPH & TELEPHONE
    • WATANABE KAZUJIITO MASAHIKOMATSUE HIDEAKI
    • H04B1/10H04B7/005H04B7/08
    • PURPOSE:To perform interference compensation even when an interference signal which becomes a source by forming the interference signal by synthesizing the main signals received at plural antennas after setting the same amplitude, negative phase, and the same frequency characteristic with each other, and using it. CONSTITUTION:Reception signals received by the antennas 1 and 4 are converted to IF signals at frequency converters 3 and 6, and are inputted to a transversal filter 110. And after they are processed by a delay circuit x-1, a 90 deg. phase shifter, and a delay circuit y-1, respectively, they are synthesized at a synthesizer 25, and the amplitude and the phase are adjusted, and signals processed similarly from synthesizers 26 and 27 are supplied, and the main signal whose amplitude, phase, and frequency characteristic are adjusted is outputted from a synthesizer 28. The signal and the main signal having the same amplitude, the negative phase, and the same frequency characteristic by the reception of the antenna 4 via a delay circuit 11' are supplied, and the interference signal with high purity is formed at a synthesizer 29. By using the interference signal, it is possible to perform the interference compensation even when no interference signal which becomes the source is obtained differently from a case where the antenna which receives the interference signal is used.
    • 7. 发明专利
    • CORRELATION DETECTING CIRCUIT FOR ERROR SIGNAL
    • JPS60263534A
    • 1985-12-27
    • JP11808284
    • 1984-06-11
    • NIPPON TELEGRAPH & TELEPHONE
    • MATSUE HIDEAKIMURASE TAKEHIRO
    • H04B3/06H04B1/10H04B7/005H04L27/00H04L27/38
    • PURPOSE:To improve both the converging performance and the accuracy of error detection control by monitoring the levels of discrimination and error signals and changing the time constant of an integrator based on the information on said monitoring. CONSTITUTION:An input 16-QAM signal 40 is transmitted through orthogonal phase wave detectors 41 and 41'. Thus the base bands of in-phase and orthogonal components are obtained and discriminated by A/D converters 43 and 43' after they passed through higher harmonic suppressor filters 42 and 42'. These in-phase and orthogonal components are supplied to D/A converters 51 and 52 by paths 3 and 4 as well as 3 and 5 through exclusive OR circuits 46, 47, 49 and 50 respectively. The outputs of both converters are added and vary the time constant of an integrator 53. In this respect, the capacity of the integrator 53 is controlled. The error is maximum with the step-out and therefore the capacity of the integrator 53 is reduced to decrease the time constant. This improves the converging performance. When the error degree is small, the capacity of the integrator 53 is increased to increase the time constant. Thus the control accuracy is improved. The correlation is secured between the polarity of the discrimination signal of the in-phase component and that of the error signal of the orthogonal component by means of exclusive ORs 45 and 48.
    • 9. 发明专利
    • INTER-CROSS POLARIZED WAVE INTERFERENCE COMPENSATOR
    • JPH08116318A
    • 1996-05-07
    • JP25257894
    • 1994-10-19
    • NEC CORPNIPPON TELEGRAPH & TELEPHONE
    • MAEDA SHIGEKIMATSUE HIDEAKISHIRATO TADASHI
    • H03H15/00H03H21/00H04B3/06H04J11/00
    • PURPOSE: To stably perform tap weighting control by suppressing the growth of tap weighting coefficients by correction terms. CONSTITUTION: The residual error component of an output signal 104 is detected by a detector 3, and an error signal 105 is inputted to a first integrator 41 with a different polarized wave reception signal 101. After the weighting of coefficient -αis performed on the output of the first integrator by a second integrator 42, the tap weighting coefficient C1 is generated by an adder 44 via an adder 43, and it is outputted to a weighting unit 13. Also, -β is inputted to and added on the adder 43 when the polarity of the coefficient C1 shows a positive value by a discrimination unit 45 and +β is inputted to and added with the adder 43 when it shows a negative value. Similarly, coefficients C2, C3 are outputted from second and third tap weighting coefficient generators 5, 6 to weighting units 14, 15. The sum of the output of the weighting units 13-15 is taken by a synthesizer 16, and an inter-cross polarized wave compensation signal 103 is outputted, and it is coupled with a self polarized wave reception signal 102 by a coupler 2. When the signal 102 receives inter-polarized wave interference, the signal 103 goes to the signal of same amplitude as and reverse polarity of that of an inter-polarized wave interference component, and the output signal 104 of the coupler 2 goes to the signal from which the inter-polarized wave interference can be eliminated.
    • 10. 发明专利
    • INTERFERENCE COMPENSATION CIRCUIT
    • JPH01221933A
    • 1989-09-05
    • JP4722388
    • 1988-02-29
    • NIPPON TELEGRAPH & TELEPHONE
    • WATANABE KAZUJIITO MASAHIKOMATSUE HIDEAKI
    • H04B1/10H04B7/005H04B7/08
    • PURPOSE:To perform interference compensation even when the arrival direction of an interference signal coincides with that of a main signal by forming the interference signal by adding the main signals received by plural antennas with the same amplitude and negative phase via a variable coupler and an adder, etc., and using it. CONSTITUTION:A reception signal received by a first antenna 1 is separated to orthogonal components with the same phases by detectors 10 and 11, and are supplied to A/D converters 21, 21, and the reception signal of a second antenna 40 is also, separated to the orthogonal components with the same phases similarly, and are supplied to A/D converters 48 and 49. The output of the converter 48 is added on the output of the converters 22, 22 at the adders 54 and 56 via couplers 62 and 64, and similarly, the output of the converter 40 via the variable couplers 63 and 65 is added on the output of the adders 54 and 56 at the adders 55 and 57. The interference signal from which the main signal of the same phase and the orthogonal component is eliminated is formed from the adders 55 and 57 by those addition of the same amplitude and the negative phase, and by using the interference signal, it is possible to perform the interference compensation even when the arrival direction of the interference signal coincides with that of the main signal differently from a case where the antenna which receives the interference signal is used.