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    • 3. 发明专利
    • SENSOR TERMINAL EQUIPMENT
    • JPH11306477A
    • 1999-11-05
    • JP11300998
    • 1998-04-23
    • NIPPON SIGNAL CO LTD
    • OKAMOTO SHOZO
    • G08C25/00G08C15/06
    • PROBLEM TO BE SOLVED: To provide highly reliable, miniaturized and inexpensive sensor terminal equipment without requiring an external circuit for inputting a detected signal in the case of forming two pieces of data through respective signal processing means while acquiring two signals detected by one sensor. SOLUTION: Between respective signal processing means 1a and 1b, a detected signal sharing path 33a or 33b is provided and each signal processing means 1a or 1b is provided with signal discriminating part 11a or 11b for comparing the shared detected signals to form data when both the signals are compatible, but to perform a prescribed error processing when they are not. It is preferable that the signal processing means is provided with a shared path testing part 12a or 12b for preparing one piece of test data through logical operation to the detected signals, sharing these test data through the signal sharing path 33a or 33b, comparing both the signals by performing inverse logical operation to the other test data and reporting the correctness of the signal sharing path when they are coincident, but issuing an alarm of a possible fault when they are different.
    • 5. 发明专利
    • PLAT TYPE CURVED SURFACE MIRROR DEVICE
    • JP2000066123A
    • 2000-03-03
    • JP23523098
    • 1998-08-21
    • NIPPON SIGNAL CO LTD
    • KATO MASAKAZUOKAMOTO SHOZO
    • G02B26/08G02B5/10
    • PROBLEM TO BE SOLVED: To obtain a plane type curved surface mirror which is of a plane type, is always constant in a size and depth dimension, is freely variable in its focus and is capable of embodying a large focal length by discretely controlling many reflecting means which are arranged in a matrix form and deflect and reflect light in a two-dimensional direction. SOLUTION: This device comprises the reflecting means 3, a control means 4, an X-axis driving means 5 and a Y-axis driving means. The reflecting means 3 are optical scanning elements capable deflecting and reflecting the light in the two-dimensional direction by using a semiconductor process and are, for example, galvanomirrors. The reflecting means 3 are composed of the matrices of the number 1 to n in an X-axis direction and 1 to m in a Y-axis direction. The respective reflecting means 3 consist of the structures capable of arbitrarily deflecting the light to the X-Y axis. The control means 4 makes computation by the numerical value of the focal length inputted from a keyboard and executes the control of the X-Y axis to supply a X-axis driving signal Dx to the X-axis driving means 5 and a Y-axis driving signal Dy to the Y-axis driving means.
    • 6. 发明专利
    • COLLATION CIRCUIT
    • JPH11143841A
    • 1999-05-28
    • JP31046497
    • 1997-11-12
    • NIPPON SIGNAL CO LTD
    • OKAMOTO SHOZOTAKANO TOSHIOISHII TAKASHISAITO YASUO
    • G06F15/16G06F11/18G06F15/177
    • PROBLEM TO BE SOLVED: To provide a collation circuit of high reliability by having two operation means synchronous operate by the same software and having data simple to be compared and collated outputted. SOLUTION: This device is composed of microprocessor units(MPU) 1 and 2 of U and V systems which synchronous-operate and a comparison circuit 3 for comparing a comparison result output from each the MPUs 1 and 2. Each of the MPU 1 and 2 generates a ΔT interruption signal and a ΔT/2 interruption signal respectively and is synchronized and, when the ΔT interruption signal occurs, it outputs selected comparison data to other system, compares input data from the other system with the comparison contract data of its own system and outputs the comparison result output to a comparison circuit 3. Then, when the ΔT/2 interruption signal is generated, data to be transmitted to the other system is bit-reversed and, furthermore, when a specified time passes after generation of the ΔT/2 interruption signal, the comparison collation data of its own system are bit-reversed. Thus, the comparison circuit 3 has a comparison result output for indicating equality and inequality in turn transmitted from each system and, when they are matched with one another, an alternating signal for indicating a normal operation is outputted to outside.
    • 7. 发明专利
    • DUPLEX INFORMATION PROCESSOR
    • JP2001249701A
    • 2001-09-14
    • JP2000063084
    • 2000-03-08
    • NIPPON SIGNAL CO LTD
    • OKAMOTO SHOZO
    • G05B9/03G08C25/00
    • PROBLEM TO BE SOLVED: To provide an inexpensive and reliable duplex information processor without increasing the information quantity of a signal to be shared between plural MCU even in the case of an outside input whose information quality is large. SOLUTION: This duplex information processor 10 is provided with two signal processing means 10A and 10B constituted of an MCU and a signal collating part 110 for collating two signal outputs S3A and S3B. A detection signal S1 of a sensor device S constituted of plural signal sensors is introduced to signal input terminals 11A and 11B of each signal processing means 10A and 10B. Also, logical signal sharing paths 30A and 30B are connected with each shared output terminal 31A and 31B. Each signal processing means 10A and 10B are provided with logical arithmetic parts 20A and 20B constituted of temporary logical arithmetic parts 70A and 70B and true logical arithmetic parts 80A and 80B. The temporary logical arithmetic operation and the true logical arithmetic operation are combined so that one integral signal processing in the logical arithmetic parts 20A and 20B can be constituted.
    • 9. 发明专利
    • DIGITAL SIGNAL PROCESSOR
    • JPH1079725A
    • 1998-03-24
    • JP23411196
    • 1996-09-04
    • NIPPON SIGNAL CO LTD
    • OKAMOTO SHOZOTAKANO TOSHIOSAITO YASUO
    • H04L1/00H04B1/74
    • PROBLEM TO BE SOLVED: To make it possible to reduce the cost and judge the correctness by making a digital signal processing circuit into a single system. SOLUTION: The output signal of the digital signal processing circuit 4, to which known A system and B system check signals C(A) and C(B) are added, becomes a prescribed output signal corresponding to the types of the signals C(A) and C(B) when the circuit 4 is normal. A judgement signal with effect that the circuit 4 is normal is outputted from a check circuit 5 and the output signal of the circuit 4 is used for the other unit control signal. When the circuit 4 is abnormal, the signal does not become the prescribed signal corresponding to the type of the signal C(A) and C(B) and the judgment signal with effect that the circuit 4 is abnormal is outputted from the circuit 5. The output signal of the circuit 4 is not used for controlling the other unit. The correctness of a device can be judged without constituting the circuit 4 by a multiplex system and cost can be reduced.