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    • 2. 发明专利
    • Electronic component and manufacturing method thereof
    • 电子元器件及其制造方法
    • JP2009054829A
    • 2009-03-12
    • JP2007220794
    • 2007-08-28
    • Murata Mfg Co Ltd株式会社村田製作所
    • HIRA MITSUYOSHIYAMATO HIDEJIKITA RYOICHISAKAI TAKUMI
    • H05K3/34H01L21/60H01L23/12H05K3/46
    • H01L2224/16225
    • PROBLEM TO BE SOLVED: To provide an electronic component which is formed by mounting an electronic component chip on a ceramic multilayer board using bumps and assures the excellent credibility of electrical connection by a plurality of bumps.
      SOLUTION: Disclosed is the electronic component 1 which has the electronic component chip 3 with the plurality of bumps 14 to 16 mounted on a top surface 2a of the ceramic multilayer substrate 2 and also has a first electrode land 11, a second electrode land 12, and a first electrode land 13, where the bumps 14 to 16 are connected, in order on the ceramic multilayer substrate 2, the top surface 2a of the ceramic multilayer substrate 2 being made convex so that the height of the second electrode land 12 is larger than the height of the first electrode lands 11 and 13.
      COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:提供一种通过使用凸块将电子部件芯片安装在陶瓷多层板上形成的电子部件,并且确保通过多个凸块的电连接的良好可信度。 解决方案:公开了具有安装在陶瓷多层基板2的上表面2a上的多个凸块14至16的电子部件芯片3的电子部件1,并且还具有第一电极焊盘11,第二电极 在陶瓷多层基板2上依次连接突起14〜16的第一电极接合面13,陶瓷多层基板2的上表面2a为凸状,使得第二电极的高度 12大于第一电极焊盘11和13的高度。版权所有:(C)2009,JPO&INPIT
    • 4. 发明专利
    • Surface acoustic wave device
    • 表面声波设备
    • JP2012005018A
    • 2012-01-05
    • JP2010140416
    • 2010-06-21
    • Murata Mfg Co Ltd株式会社村田製作所
    • HIRA MITSUYOSHI
    • H03H9/145H03H9/64
    • PROBLEM TO BE SOLVED: To provide a compact surface acoustic wave device.SOLUTION: A surface acoustic wave device 1 includes a piezoelectric substrate 10, a surface acoustic wave element 30 formed on the piezoelectric substrate 10 and a bump pad 11 formed on the piezoelectric substrate 10. The surface acoustic wave element 30 includes interdigital electrodes 32, 33, and 34 formed on the piezoelectric substrate 10 and a pair of reflectors 31 and 35 formed on both sides in a traveling direction of a surface acoustic wave of the interdigital electrodes 32, 33, and 34 and formed on the piezoelectric substrate 10. At least one reflector 31 of the pair of the reflectors 31 and 35 is weighted so that a cross width of a side which is not opposed to the interdigital electrodes becomes smaller than a cross width of a side which is opposed to the interdigital electrodes. The bump pad 11 is formed adjacent to an area where the reflector is formed if the reflector is not weighted.
    • 要解决的问题:提供一种紧凑的声表面波装置。 解决方案:表面声波装置1包括压电基片10,形成在压电基片10上的表面声波元件30和形成在压电基片10上的凸块垫11.声表面波元件30包括叉指电极 形成在压电基板10上的32,33,34和形成在交叉指状电极32,33,34的表面声波的行进方向的两侧上并形成在压电基板10上的一对反射体31,35 一对反射器31和35中的至少一个反射器31被加权,使得与叉指电极不相对的一侧的横向宽度变得小于与叉指电极相对的一侧的交叉宽度。 如果反射器没有加权,则碰撞焊盘11形成为邻近形成反射体的区域。 版权所有(C)2012,JPO&INPIT
    • 5. 发明专利
    • Electronic component
    • 电子元件
    • JP2005116622A
    • 2005-04-28
    • JP2003345778
    • 2003-10-03
    • Murata Mfg Co Ltd株式会社村田製作所
    • HIRA MITSUYOSHIYAMATO HIDEJINISHI HIROYUKI
    • H01L23/13H01L23/14H03H9/25
    • H01L2224/16225
    • PROBLEM TO BE SOLVED: To provide an electronic component which is formed by mounting an electronic component chip on a ceramic multilayer board using bumps and assures the excellent credibility of electrical connection by a plurality of bumps.
      SOLUTION: In an electronic component, an electronic chip 3 is mounted using a plurality of bumps 14 to 16 on the upper surface 2a of a ceramic multilayer substrate 2. In this ceramic multilayer substrate 2, the internal conductive films 9, 12 are arranged on at least one layer at the lower side of a bump 15 arranged at least in the center among a plurality of bumps 14 to 16 arranged in the direction parallel to the upper surface of the ceramic multilayer substrate 2.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种通过使用凸块将电子部件芯片安装在陶瓷多层板上形成的电子部件,并且确保通过多个凸块的电连接的良好可信度。 解决方案:在电子部件中,电子芯片3使用多个凸块14至16安装在陶瓷多层基板2的上表面2a上。在该陶瓷多层基板2中,内部导电膜9,12 布置在至少布置在沿着平行于陶瓷多层基板2的上表面的方向布置的多个凸块14至16中的至少在中心的凸块15的下侧的至少一层。版权所有: (C)2005,JPO&NCIPI