专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2007059676A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2007059676A
公开(公告)日：2007-03-08
申请号：JP2005244064
申请日：2005-08-25
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KOYAMA TATSUYA , NAKANO HIDEO , MAEDA MASAKATSU , FUKUI TSUKASA
IPC分类号： H01L21/822 , H01L21/3205 , H01L23/52 , H01L27/04
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To reduce propagation of an unnecessary signal or noise between various types of circuit blocks in the same semiconductor chip, and also to reduce characteristic degradation caused by interference in a semiconductor device as a semiconductor integrated circuit having the various types of circuit blocks mixedly mounted therein. SOLUTION: In order to increase a reliability of a semiconductor chip 11 as by preventing moisture corrosion or damage of the semiconductor chip 11, a substrate contact 15 is provided to a sealing ring 12 of an aluminum wiring line to be arranged around the semiconductor chip 11, and the sealing ring 12 is connected to a ground potential via the substrate contact 15. Consequently, the propagation of an unnecessary signal or noise and interference in the same semiconductor chip is reduced. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了减少同一半导体芯片中的各种类型的电路块之间的不必要的信号或噪声的传播，并且还降低由于作为具有各种类型的半导体集成电路的半导体器件中的干扰引起的特性劣化混合安装在其中的电路块的类型。解决方案：为了通过防止半导体芯片11的湿气腐蚀或损坏来提高半导体芯片11的可靠性，将基板接触15设置在铝布线的密封环12周围半导体芯片11和密封环12经由基板触点15连接到接地电位。因此，减少了不必要的信号或噪声的传播以及相同的半导体芯片中的干扰。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2003289226A Amplifier and frequency converter 有权
标题翻译：放大器和频率转换器
公开(公告)号：JP2003289226A
公开(公告)日：2003-10-10
申请号：JP2002091869
申请日：2002-03-28
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKATANI TOSHIBUMI , ITO JUNJI , NAKANO HIDEO
IPC分类号： H03D7/14 , H03D7/18 , H03F1/34 , H03F3/45
CPC分类号： H03F3/45089 , H03F1/34 , H03F2200/372 , H03F2203/45298 , H03F2203/45386 , H03F2203/45464 , H03F2203/45544 , H03F2203/45631
摘要： PROBLEM TO BE SOLVED: To provide a negative feedback amplifier which is suitable for integration of an semiconductor integrated circuit, having a wide dynamic range.
SOLUTION: An amplifying circuit 10 amplifies a signal inputted from an input terminal P1. A phase control circuit 10 is arranged between the emitter of a bipolar transistor 101 and a ground connection. A feedback circuit 30 is connected between the input and the output of the amplifying circuit 10, and it feeds back the output of the amplifying circuit 10 to input. The variations of phase in the amplifying circuit 10 is determined by the value of an inductor 201, and the variations of phase in the feedback circuit 30 is determined by the values of a resistor 301 and a capacitor 302. The value of each element of these is selected so that the phase difference between an input signal and a feedback signal is 180°, extending in a range of the frequency of the fundamental waves of the input signal to the frequency of second-order harmonic waves. Hereby, the fundamental waves, third-order modulated waves, and second-order harmonic waves of the input signal are fed back negatively to the input.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种适用于具有宽动态范围的半导体集成电路的集成的负反馈放大器。解决方案：放大电路10放大从输入端子P1输入的信号。在双极晶体管101的发射极和接地连接之间设置相位控制电路10。反馈电路30连接在放大电路10的输入和输出之间，并将放大电路10的输出反馈到反馈电路10。放大电路10中的相位的变化由电感器201的值确定，并且反馈电路30中的相位的变化由电阻器301和电容器302的值确定。这些的每个元件的值被选择为使得输入信号和反馈信号之间的相位差为180°，在输入信号的基波的频率的范围内延伸到二次谐波的频率。因此，输入信号的基波，三阶调制波和二次谐波被反馈地反馈给输入。版权所有（C）2004，JPO

3. 发明专利

JP2006059955A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2006059955A
公开(公告)日：2006-03-02
申请号：JP2004239255
申请日：2004-08-19
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKANO HIDEO , MAEDA MASAKATSU
IPC分类号： H01L21/822 , H01L21/3205 , H01L23/52 , H01L27/04
CPC分类号： H01L2224/16225
摘要： PROBLEM TO BE SOLVED: To reduce fluctuations in characteristics of a semiconductor device where an inductor is formed on a semiconductor substrate, at the time of reduction of the area of substrate and at the time of flip-chip mounting of the semiconductor substrate.
SOLUTION: A plurality of pieces of metal layers are formed between the semiconductor substrate and the inductor on it. Switches for selecting connection/disconnection between the metal layer piece and a semiconductor GND are inserted between the plurality of metal layer pieces and GND, otherwise, switches allowing the metal pieces to select connection/disconnection between the metal layer piece and the inductor are inserted between the plurality of metal layer pieces and the inductor. A plurality of metal layer pieces of different metal layer are formed between the inductor and the metal layer piece so that metal layer pieces of two layers face each other, with the metal layer pieces connected to GND. Further, a dielectric layer is formed between the metal layer pieces formed to face two different metal layers between the inductor and the semiconductor substrate.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题为了减少在半导体衬底上形成电感器的半导体器件的特性波动，在减小衬底面积和半导体衬底的倒装芯片安装时，。解决方案：在半导体衬底和其上的电感器之间形成多个金属层。用于选择金属层和半导体GND之间的连接/断开的开关插入在多个金属层片和GND之间，否则，允许金属片选择金属层片和电感器之间的连接/断开的开关插入在多个金属层片和电感器。在电感器和金属层片之间形成多个不同金属层的金属层片，使得两层金属层彼此面对，金属层片段连接到GND。此外，在形成为面对电感器和半导体衬底之间的两个不同金属层的金属层片之间形成介电层。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2005183696A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2005183696A
公开(公告)日：2005-07-07
申请号：JP2003422987
申请日：2003-12-19
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKANO HIDEO , YOSHIDA SHOJI , MAEDA MASAKATSU
IPC分类号： H01L21/822 , H01L23/522 , H01L23/528 , H01L27/04 , H01L27/06 , H01L27/08 , H01L29/94
CPC分类号： H01L29/94 , H01L23/5223 , H01L23/5286 , H01L24/48 , H01L24/49 , H01L27/0635 , H01L27/0811 , H01L2224/48091 , H01L2224/49 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01033 , H01L2924/01082 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device serving as a semiconductor integrated circuit to which an analog circuit block and a digital circuit block are mixedly mounted, wherein a characteristic degradation due to a propagation and an interference of signals and noises between circuit blocks is prevented. SOLUTION: A digital circuit region 3 and an analog circuit region 2 are independently disposed, power supply wirings 4a, 4b and ground wirings 5a, 5b are disposed surrounding the respective circuit regions to be connected to elements in the circuit regions, and MOS capacitors 12a, 12b are formed beneath the power supply wirings 4a, 4b and the ground wirings 5a, 5b. Each terminal of the MOS capacitors 12a, 12b is connected to the power supply wirings 4a, 4b and the ground wirings 5a, 5b. Further, pads 20 to 23, 25 to 28 connected to the elements of the digital circuit region 3 and the analog circuit region 2 are disposed in circuit regions 3, 4 surrounded by the power supply wirings 4a, 4b and the ground wirings 5a, 5b of the respective circuits, and the MOS capacitors 12a, 12b. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用作半导体集成电路的半导体器件，模拟电路块和数字电路块混合安装在该半导体集成电路上，其中由于信号的传播和干扰引起的特性劣化和阻止电路块。解决方案：数字电路区域3和模拟电路区域2被独立地布置，电源布线4a，4b和接地布线5a，5b围绕各个电路区域设置以连接到电路区域中的元件，并且 MOS电容器12a，12b形成在电源配线4a，4b和接地布线5a，5b的下方。 MOS电容器12a，12b的每个端子连接到电源配线4a，4b和接地布线5a，5b。此外，连接到数字电路区域3和模拟电路区域2的元件的焊盘20至23,25至28设置在由电源布线4a，4b和接地布线5a，5b包围的电路区域3,4中的各个电路以及MOS电容器12a，12b。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2005124175A Amplifier and frequency converter 审中-公开
标题翻译：放大器和频率转换器
公开(公告)号：JP2005124175A
公开(公告)日：2005-05-12
申请号：JP2004273879
申请日：2004-09-21
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKATANI TOSHIBUMI , ITO JUNJI , NAKANO HIDEO
IPC分类号： H03D7/14 , H03F1/32 , H03F1/34 , H03F3/189
摘要： PROBLEM TO BE SOLVED: To provide a negative feedback amplifier with a wide dynamic range suitable for integration into a semiconductor integrated circuit. SOLUTION: An amplifier circuit 10 amplifies a signal inputted from an input terminal P1. A first feedback circuit 20 is placed across an emitter of a bipolar transistor 101 and an input of the amplifier circuit 10. A second feedback circuit 30 is placed across the input and an output of the amplifier circuit 10 for feeding the output of the amplifier circuit 10 back to the input. A phase change amount in the first feedback circuit 20 is determined by the values of an inductor 201 and a capacitor 202. A phase change amount in the second feedback circuit 30 is determined by the values of a resistor 301 and a capacitor 302. The values of these elements are selected so that the phase of a signal in which fundamental waves included in two feedback signals are combined and the phase of a signal in which second harmonics included in the two feedback signals are combined are shifted by approximately 180 degrees from the phase of a fundamental wave of an input signal. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供适用于集成到半导体集成电路中的宽动态范围的负反馈放大器。解决方案：放大器电路10放大从输入端子P1输入的信号。第一反馈电路20放置在双极晶体管101的发射极和放大器电路10的输入端之间。第二反馈电路30被放置在放大器电路10的输入端和放大器电路10的输出端，用于馈送放大器电路的输出 10回到输入。第一反馈电路20中的相位变化量由电感器201和电容器202的值确定。第二反馈电路30中的相位变化量由电阻器301和电容器302的值决定。值选择这些元件，使得组合包括在两个反馈信号中的基波的信号的相位，并且组合包括在两个反馈信号中的二次谐波的信号的相位从相位偏移大约180度的输入信号的基波。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2001345681A OSCILLATOR 失效
公开(公告)号：JP2001345681A
公开(公告)日：2001-12-14
申请号：JP2000162597
申请日：2000-05-31
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKANO HIDEO , MINAMI YOSHIHISA
IPC分类号： H01L27/04 , H01L21/822 , H03B5/12 , H03K3/354
摘要： PROBLEM TO BE SOLVED: To provide an oscillator with a field-effect transistor for generating an oscillation frequency with precision without influence from parasitic capacitance. SOLUTION: Each source of transistors 101, and 102 are grounded. The gate of the transistor 101 and the drain of the transistor 102 are connected, and the drain of the transistor 101 and the gate of the transistor 102 are connected. An inductor 103 is connected with the drain of the transistor 101, and an inductor 104 is connected with the drain of the transistor 102. The other end of each inductor 103 or 104 is connected to a power source. In the transistors 101 and 102, the drain electrodes and the drain diffusion regions are arranged in desired area and shapes. In addition, an oxide film between a polysilicon gate and substrate are formed in desired area and shapes all over the substrate except for a channel forming region of a transistor between the drain and the source so that the parasitic capacity of the drain electrode and the gate electrode is set at a desired value in the structure. The substrate of the transistor is connected to the voltage source.

7. 发明专利

JPS61121780A Motor start compensator 失效
标题翻译：电机启动补偿器
公开(公告)号：JPS61121780A
公开(公告)日：1986-06-09
申请号：JP24165384
申请日：1984-11-15
申请人： Matsushita Electric Ind Co Ltd
发明人： NAKANO HIDEO
IPC分类号： H02P1/26
CPC分类号： H02P1/26
摘要： PURPOSE:To facilitate the start and to alleviate the influence of a circuit to other device by connecting starting capacitors through switches with capacitor elements connected in parallel with a 3-phase motor. CONSTITUTION:Switches a S1-S3 are set to ON state at motor starting time to set the composite capacity of capacitors of the respective phases to C1+C2. After starting, switches S1-S3 are opened to set the capacity of the capacitors of the respective phases to C1. Thus, the large current of low power factor at starting time is compensated and suppressed by the leading reactive current to hold the power factor at high efficiency after starting.
摘要翻译：目的：通过将起动电容器连接到具有与三相电动机并联的电容器元件的开关来促进起动并减轻电路对其他装置的影响。构成：电机启动时，S1-S3开关置于ON状态，将各相电容的复合容量设定为C1 + C2。开始之后，开关S1-S3被打开以将各相的电容器的容量设定为C1。因此，启动时的低功率因数的大电流被起动后的高功率因数保持在功率因数的补偿和抑制。

8. 发明专利

JPS60245429A METHOD OF IMPROVING UTILITY RATE OF V-COUPLED TRANSFORMER 失效
公开(公告)号：JPS60245429A
公开(公告)日：1985-12-05
申请号：JP10098284
申请日：1984-05-18
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKANO HIDEO
IPC分类号： G05F1/70 , H01F30/12 , H02J3/18

9. 发明专利

JP2003198260A FREQUENCY CONVERTER AND WIRELESS COMMUNICATION DEVICE USING THE CONVERTER 审中-公开
公开(公告)号：JP2003198260A
公开(公告)日：2003-07-11
申请号：JP2001390488
申请日：2001-12-21
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKATANI TOSHIBUMI , ADACHI HISASHI , ITO JUNJI , NAKANO HIDEO , OKAMOTO NAOKI , KURIMOTO HIDEHIKO , NAKAMURA MASANORI
IPC分类号： H03D7/14 , H03D7/00
摘要： PROBLEM TO BE SOLVED: To provide a frequency converter having wide dynamic range, and to provide a wireless communication device. SOLUTION: A constant current source 11, a bias circuit 40, and a frequency conversion circuit 6 are provided. The bias circuit 40 has a first transistor 7, a second transistor 8, a first resistor 9, a second resistor 26 whose one end is connected to the junction of the first resistor 9 and the second transistor 8 and whose other end is grounded, and a third resistor 10 whose one end is connected to the junction. To the other end of the third resistor 10, a first input terminal RFin 2, which supplies a frequency converted signal, is connected. The frequency conversion circuit 6 is connected to the other end of the third resistor 10, and inputs a local oscillation signal supplied from a second input terminal LOin 3. By combining the frequency-converted signal and the local oscillation signal, a frequency conversion signal, that is the frequency-converted signal whose frequency is converted, is outputted to the output terminal. COPYRIGHT: (C)2003,JPO

10. 发明专利

JPS61239609A THREE-PHASE CAPACITOR DEVICE 失效
公开(公告)号：JPS61239609A
公开(公告)日：1986-10-24
申请号：JP8054985
申请日：1985-04-16
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KUSANO MAKOTO , NAKANO HIDEO , IWASAKI SHIGEO
IPC分类号： H02J3/18 , H01G4/002

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式