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1. 发明专利

JP2007242768A Module component and electronic device using the same 审中-公开
标题翻译：使用其的模块组件和电子设备
公开(公告)号：JP2007242768A
公开(公告)日：2007-09-20
申请号：JP2006060839
申请日：2006-03-07
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KASHIWAGI TAKAFUMI , YAGI YUJI , SASAOKA TATSUO
IPC分类号： H01L21/60
CPC分类号： H01L2224/16225 , H01L2224/27013 , H01L2224/32225 , H01L2224/73204 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To improve reliability of connection between a substrate 8 and an electronic component 9 in a module component 7. SOLUTION: The module component 7 is arranged between a side surface of a connecting electrode 10 and a sealing resin 11, and includes an expansion pressure absorber 12 having an elasticity lower than that of the sealing resin 11. This structure mitigates rise of internal pressure due to re-fusing of the connecting electrode 10 because the expansion pressure absorber 12 is deformed as arranged between the side surface of the connecting electrode 10 and the sealing resin 11, in the case where the module component 7 is mounted on a circuit board with the solder reflow system. Accordingly, outflow of the connecting electrode 10 from the interface separated between the sealing resin 11 and the substrate 8 can be suppressed. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提高模块部件7中的基板8与电子部件9之间的连接的可靠性。解决方案：模块部件7配置在连接电极10的侧面和密封树脂11，并且包括具有比密封树脂11低的弹性的膨胀压力吸收体12.由于膨胀压力吸收体12变形而使连接电极10再熔合，因此能够缓和内部升压在使用焊料回流系统将模块部件7安装在电路基板上的情况下，在连接电极10的侧面和密封树脂11之间。因此，可以抑制连接电极10从密封树脂11和基板8之间分离的界面的流出。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2007067039A Loading method of solder ball, insulating substrate with solder bump using the same, and module component 审中-公开
标题翻译：焊球的装载方法，使用相同的焊膏绝缘基板和模块部件
公开(公告)号：JP2007067039A
公开(公告)日：2007-03-15
申请号：JP2005248963
申请日：2005-08-30
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YAGI YUJI , KASHIWAGI TAKAFUMI , NIIMI HIDEKI
IPC分类号： H05K3/34 , H05K3/00
摘要： PROBLEM TO BE SOLVED: To provide a loading method of a solder ball with which dispersion of a transfer amount of solder flux is made minimum, and an area for loading the solder balls at once is enlarged. SOLUTION: The loading method of the solder ball is provided with a process for making projections 4 of a transfer block 1 formed of an elastically deformable penetration material having the projections 4 in positions corresponding to pads 8 abut on the pads 8 of an insulating substrate 7, and attaching adhesion liquid 6 to the pads 8; and a process for loading the solder balls 2 on the pads 8 by making the solder balls 2 abut on the pads 8 to which adhesion liquid 6 is attached. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供使焊料的转移量的分散最小化的焊球的加载方法，并且用于一次加载焊球的区域增大。解决方案：焊球的装载方法设置有用于制造由可弹性变形的穿透材料形成的传送块1的突起4的工艺，该突起4具有突起4的位置，该位置对应于焊盘8邻接在其上的焊盘8 绝缘基板7，以及将附着液体6附接到焊盘8; 以及通过使焊球2与附着有粘附液体6的焊盘8抵接的方式将焊球2加载在焊盘8上。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2006041145A Method for mounting pressing device, and semiconductor bare chip 审中-公开
标题翻译：安装压力装置的方法和半导体切片
公开(公告)号：JP2006041145A
公开(公告)日：2006-02-09
申请号：JP2004218165
申请日：2004-07-27
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YAGI YUJI , KASHIWAGI TAKAFUMI , NIIMI HIDEKI , SASAKI TOMOE
IPC分类号： H01L21/60
CPC分类号： H01L24/83 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/83192 , H01L2224/83194 , H01L2924/01079 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To suppress the extrusion of thermosetting resin paste to the minimum by solving the problem, wherein since thermosetting resin paste is centralized in the neighborhood of the center of the outer periphery of a semiconductor bare chip and extruded by almost 1.0 mm in semiconductor bare chip mounting by the thermosetting resin paste using a conventional pressing device, peripheral components cannot be mounted inside this, and the miniaturization of module components is hindered. SOLUTION: In this pressing device, a pressing tool 1 whose section positioned in the neighborhood of the center of the outer periphery of a semiconductor bare chip 2 is turned into a low-temperature section 1b is used so that, when heat and a pressure are added to the semiconductor bare chip 2, the increase in the temperature can be reduced in the neighborhood of the center of the outer periphery of the semiconductor chip 2, and the viscosity of resin paste 3 can be made higher than a section to be heated. Thus, flow can be suppressed, and extrusion can be reduced, and peripheral components more adjacent to the semiconductor chip 2 than a conventional manner can be mounted, and to further miniaturize module components. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了通过解决问题来抑制热固性树脂浆料的挤出最小化，其中由于热固性树脂浆料集中在半导体裸芯片的外周的中心附近并被几乎挤出通过使用常规的按压装置的热固性树脂浆料安装的半导体裸芯片为1.0mm，不能在其内部安装周边部件，并且妨碍了模块部件的小型化。解决方案：在该按压装置中，使用将位于半导体裸芯片2的外周的中心附近的部分的压制工具1转换为低温部1b，使得当加热和向半导体裸芯片2添加压力，可以在半导体芯片2的外周的中心附近降低温度的升高，并且可以使树脂浆料3的粘度高于加热。因此，可以抑制流动，并且可以降低挤出，并且可以安装比常规方式更靠近半导体芯片2的外围部件，并且进一步使模块部件小型化。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2007287776A Modular component, wiring board, and electronic apparatus 审中-公开
标题翻译：模块化组件，接线板和电子设备
公开(公告)号：JP2007287776A
公开(公告)日：2007-11-01
申请号：JP2006110649
申请日：2006-04-13
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MIYAMOTO KOJI , YAGI YUJI , KASHIWAGI TAKAFUMI
IPC分类号： H05K3/34 , H01L21/60
CPC分类号： H01L2224/73204
摘要： PROBLEM TO BE SOLVED: To enhance connection reliability between a substrate electrode and a component electrode in a modular component. SOLUTION: The modular component has a lid conductor 12 connected with a substrate electrode 9 at an opening 10 and arranged to cover an insulation layer 11 at the circumferential edge portion of the opening 10. With such an arrangement, a connection solder 13 is connected to the lid conductor 12 without touching the interface between the substrate electrode 9 and the insulation layer 11. Consequently, remelted connection solder 13 can be inhibited from exfoliating the interface between the substrate electrode 9 and the insulation layer 11 and flowing out. As a result, connection reliability between the substrate electrode 9 and the component electrode 14 can be enhanced. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了增强模块化部件中的基板电极和部件电极之间的连接可靠性。解决方案：模块化部件具有在开口10处与基板电极9连接的盖导体12，并且布置成在开口10的周边部分处覆盖绝缘层11.通过这种布置，连接焊料13 连接到盖导体12而不接触基板电极9和绝缘层11之间的界面。因此，可以防止再熔接的连接焊料13剥离基板电极9和绝缘层11之间的界面并流出。结果，可以提高基板电极9和部件电极14之间的连接可靠性。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2007096047A Electronic part package and its manufacturing method 审中-公开
标题翻译：电子零件包装及其制造方法
公开(公告)号：JP2007096047A
公开(公告)日：2007-04-12
申请号：JP2005284335
申请日：2005-09-29
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KASHIWAGI TAKAFUMI , INOUE TAKASHI , FURUHATA TETSUYA
IPC分类号： H01L23/29 , H01L21/56 , H01L23/31 , H03H3/08 , H03H9/25
CPC分类号： H01L24/97 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2224/97 , H01L2924/18161 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To thin an electronic part package.
SOLUTION: The structure of the electronic part package is equipped with a substrate 6, a projection electrode 7 formed in the upper side of the substrate 6, an electronic part 8 packaged in the substrate 6 through the projection electrode 7, and a protector 9 made of resin which covers the periphery of the electronic part 8 on the substrate 6. The thinning of the electronic part package can be attained by making the upper surface of the electronic part 8 be a polish side and the lower surface be a functional side, because the upper surface of the protector 9 made of resin and the electronic part 8 can be sufficiently polished.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：减薄电子部件包装。解决方案：电子部件封装的结构配备有基板6，形成在基板6的上侧的突起电极7，通过突起电极7封装在基板6中的电子部件8，以及保护器9由覆盖基板6上的电子部件8周边的树脂制成。电子部件封装的薄化可以通过使电子部件8的上表面为抛光侧而下表面为功能性因为由树脂制成的保护器9的上表面和电子部件8可以被充分地抛光。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2007059774A Semiconductor chip mounting member and its manufacturing method, semiconductor chip mounting circuit substrate and semiconductor chip mounting structure employing it 审中-公开
标题翻译：半导体芯片安装构件及其制造方法，半导体芯片安装电路基板和半导体芯片安装结构
公开(公告)号：JP2007059774A
公开(公告)日：2007-03-08
申请号：JP2005245609
申请日：2005-08-26
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KASHIWAGI TAKAFUMI , NIIMI HIDEKI , YAGI YUJI
IPC分类号： H01L23/12 , H05K1/18
CPC分类号： H01L2224/16225
摘要： PROBLEM TO BE SOLVED: To propose a new mounting structure and to provide high reliability of an electronic instrument in reference with a problem of generation of solder crack due to thermal stress and strain generated in solder under a heat cycle atmosphere in an instrument with a semiconductor chip mounted through solder flip chip mounting. SOLUTION: In a flat plate material 1 for mounting semiconductor chips; through-holes are provided at positions corresponding to the connecting pads of mounted semiconductor chip, conductive members 2 are filled into the through-holes to obtain the member for mounting semiconductor chips, and electrodes are formed on both sides of the flat plate material 1 employing the conductive members 2. Also the semiconductor mounting structure is obtained by employing the member described above. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提出一种新的安装结构并提供电子仪器的高可靠性，参考由于热应力和在焊接中产生的应变而产生的焊料裂纹的问题，其中焊料在热循环气氛下在仪器中产生具有通过焊料倒装芯片安装的半导体芯片。
解决方案：在用于安装半导体芯片的平板材料1中; 在与安装的半导体芯片的连接焊盘相对应的位置处设置通孔，将导电部件2填充到通孔中，以获得用于安装半导体芯片的部件，并且在平板材料1的两侧形成电极，导电构件2.另外，通过采用上述构件获得半导体安装结构。版权所有（C）2007，JPO＆INPIT

7. 发明专利

JP2005038913A Packaging method of electronic component 审中-公开
标题翻译：电子元器件封装方法
公开(公告)号：JP2005038913A
公开(公告)日：2005-02-10
申请号：JP2003197556
申请日：2003-07-16
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NIIMI HIDEKI , KASHIWAGI TAKAFUMI , YAGI YUJI
IPC分类号： H05K3/34 , H01L21/60
CPC分类号： H01L2224/16 , H01L2924/01078 , H01L2924/19105
摘要： PROBLEM TO BE SOLVED: To provide a packaging method of an electronic component which reduces remarkably packaging processes and can mount adjacently a passive component and a semiconductor component.
SOLUTION: The packaging method of the electronic component is composed of a process for applying soldering paste 7 to the prescribed position of an electrode formed on a circuit substrate 1 and performs the precoating of the solder, a process for applying a thermosetting adhesive 13 on the circuit substrate 1 on which the solder is precoated, a process for making the electrode and a bump electrode 14 formed in a semiconductor component 2 face each other and performing alignment and temporary stopping, a process for mounting a passive component on the electrode precoated with solder, and a process for hardening simultaneously and connecting the bump electrode 14 and precoated solder and the thermosetting adhesive 13. The passive components 9, 10 and the semiconductor component 2 are connected and fixed by the same material, so that a man-hour in a manufacturing process can be remarkably reduced and the passive components 9, 10 and the semiconductor component 2 can be connected further adjacently.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种电子部件的封装方法，其减少了显着的封装过程并且可以相邻地安装无源部件和半导体部件。解决方案：电子部件的封装方法由用于将焊膏7施加到形成在电路基板1上的电极的规定位置并进行焊料预涂布的工序，涂布热固性粘合剂在电路基板1上预先涂覆焊料的步骤13中，制作电极的方法和形成在半导体部件2中的突起电极14彼此面对并进行对准和暂时停止，将无源部件安装在电极用焊料预涂布，以及同时进行硬化和连接突起电极14和预涂焊料和热固性粘合剂13的工艺。无源部件9,10和半导体部件2由相同的材料连接和固定，可以显着地减少制造过程中的小时，并且可以连接无源部件9,10和半导体部件2 相邻。版权所有（C）2005，JPO＆NCIPI

8. 发明专利

JP2003282812A Semiconductor mounted module 有权
标题翻译：半导体安装模块
公开(公告)号：JP2003282812A
公开(公告)日：2003-10-03
申请号：JP2002085281
申请日：2002-03-26
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YAGI YUJI , KASHIWAGI TAKAFUMI , KATSUMATA MASAAKI , NISHIDA KAZUTO , SHIMIZU KAZUMICHI
IPC分类号： H01L25/18 , H01L25/04
CPC分类号： H01L2224/32225 , H01L2224/73204 , H01L2224/83192
摘要： PROBLEM TO BE SOLVED: To devise position of an electrode formed on one surface of a mounting board opposite to its other surface where a semiconductor chip is mounted so as to provide a semiconductor mounted module possessing high connection reliability. SOLUTION: The electrode 14 and a dummy electrode 15 are provided at positions on one surface of the mounting board opposite to its other surface, where the semiconductor chip 10 is mounted as the electrodes 14 and 15 are positioned corresponding to bumps 11 each formed on the four corners of the semiconductor chip 10. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：设计形成在安装板的与安装半导体芯片的其他表面相对的一个表面上的电极的位置，以提供具有高连接可靠性的半导体安装模块。解决方案：电极14和虚设电极15设置在安装板的与其另一个表面相对的一个表面上的位置，其中安装半导体芯片10的电极14和15分别对应于每个凸起11 形成在半导体芯片10的四个角上。版权所有（C）2004，JPO

9. 发明专利

JP2007220940A Printed circuit board and semiconductor device 审中-公开
标题翻译：印刷电路板和半导体器件
公开(公告)号：JP2007220940A
公开(公告)日：2007-08-30
申请号：JP2006040557
申请日：2006-02-17
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YAGI YUJI , MIYAMOTO KOJI , KASHIWAGI TAKAFUMI
IPC分类号： H05K3/34 , H01L21/60
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board capable of preventing an amount of solder from being reduced until connection failure occurs even when a solder bump is remelted in a heat treatment process such as a reflow, after a semiconductor component is packaged using the solder bump and underfill resin is injected to the circumference of the solder bump. SOLUTION: In the printed circuit board, a solder resist film for preventing solder adhesion is formed around a land electrode of the printed circuit board made of a metal material. Further, a portion on which the solder resist film is not applied is provided around the solder resist film. COPYRIGHT: (C)2007,JPO&INPIT

10. 发明专利

JP2005175044A Method of mounting electronic component 审中-公开
标题翻译：安装电子元件的方法
公开(公告)号：JP2005175044A
公开(公告)日：2005-06-30
申请号：JP2003410018
申请日：2003-12-09
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NIIMI HIDEKI , KASHIWAGI TAKAFUMI , HASHIMOTO AKIRA , KATSUMATA MASAAKI
IPC分类号： H05K3/32 , H01L21/60 , H05K3/34
CPC分类号： H01L2224/16 , H01L2924/19105
摘要： PROBLEM TO BE SOLVED: To provide a method of mounting components which makes it possible to mount a semiconductor component and electronic components close to each other when mounting the semiconductor component and electronic components on a circuit board in a mixed state, and hence enables high-density mixed mounting of the components.
SOLUTION: Before mounting the semiconductor component 2, solder paste 12 is applied on the circuit board 1. Then, after mounting the semiconductor component 2, the electronic components 9 and 10 are mounted on the circuit board 1. By this method, when printing the solder paste 12 on the circuit board 1, there is no need to go around the semiconductor component 2, and the solder paste 12 can be printed close to a portion where the semiconductor component 2 is mounted. Consequently, the semiconductor component 2 and the electronic components 9 and 10 can be mounted close to each other, resulting in enabling high-density mixed mounting of the components.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种安装部件的方法，当将半导体部件和电子部件以混合状态安装在电路板上时，可以将半导体部件和电子部件安装在彼此靠近，因此实现了组件的高密度混合安装。解决方案：在安装半导体部件2之前，将焊膏12施加在电路板1上。然后，在安装半导体部件2之后，将电子部件9和10安装在电路板1上。通过该方法，当在电路板1上印刷焊膏12时，不需要绕着半导体部件2，并且可以将焊膏12印刷到靠近半导体部件2安装部分的位置。因此，半导体组件2和电子部件9和10可以彼此靠近地安装，从而能够实现组件的高密度混合安装。版权所有（C）2005，JPO＆NCIPI

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