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1. 发明专利

JP2002184842A WAFER SUPPORTING DEVICE 失效
公开(公告)号：JP2002184842A
公开(公告)日：2002-06-28
申请号：JP2000375793
申请日：2000-12-11
申请人： MITSUBISHI MATERIALS CORP , MITSUBISHI MATERIAL SILICON
发明人： KOBAYASHI TATSUNOBU , TANAKA HIROSHI , SAKAMOTO ATSUSHI , KONGOJI TOYOHISA , MINAMI SHIYUUBIN
IPC分类号： B24B37/04 , B24B37/30 , B24B41/06 , H01L21/304 , H01L21/68 , H01L21/683
摘要： PROBLEM TO BE SOLVED: To provide a wafer supporting device which can process or treat the entire surface of a wafer and also can stably rotatively support the wafer. SOLUTION: A plurality of support structures 2 which support an outer periphery of a wafer W having an identical substantial disk-shaped profile, respectively, are disposed away from each other. Each support structure 2 is structured by a pair of pulleys 3a, 3b disposed away from each other, and an endless belt 4 which is wound between the pulleys 3a and 3b by a tension and receives an outer periphery of the wafer W on an outer periphery side of a part located between the pair of pulleys 3a and 3b. A groove 6 which receives the outer periphery of the wafer W is formed along a peripheral direction on the entire outer periphery of the endless belt 4.

2. 发明专利

JPH09148422A LOCKING STRUCTURE FOR WAFER HOUSING CONTAINER 失效
公开(公告)号：JPH09148422A
公开(公告)日：1997-06-06
申请号：JP30626795
申请日：1995-11-24
申请人： MITSUBISHI MATERIAL SILICON , MITSUBISHI MATERIALS CORP
发明人： ENDO MITSUHIRO , MINAMI SHIYUUBIN , KIYONO YOSHIHIRO
IPC分类号： B65D43/02 , B65D45/34 , B65D85/86 , H01L21/673 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide a locking structure which can improve the workability at the time of opening the upper cap of a wafer housing container by simultaneous unlocking the cap from an enclosure main body and pushing up the cap by operating levers. SOLUTION: A wafer housing container is composed of an enclosure main body 5 which houses wafers and an upper cap 4 which is put on the enclosure 5. Engaging projections 30 are respectively provided on the external side walls 4a of the cap 4 which is put on the main body 5 at positions at which the projections 30 are faced to each other. On the other hand, a pair of hook sections 9 having engaged recessed sections 31 which are respectively engaged with the projections 30 at their front end sections are provided on the main body 5. One ends of the hook sections 9 are integrally supported by a pair of lever sections 10 and the other end sections of the sections 9 are rotatably supported by the main body 5. When the lower end sections of the lever sections 10 are pushed in (in the direction of the arrow F) from such a state, the cap 4 and hook sections 9 are disengaged from each other. In order to push up the cap 4, pushing-up projections 32 are provided on the lever sections 10.

3. 发明专利

JPH0945759A PACKAGE 失效
公开(公告)号：JPH0945759A
公开(公告)日：1997-02-14
申请号：JP19379295
申请日：1995-07-28
申请人： MITSUBISHI MATERIAL SILICON , MITSUBISHI MATERIALS CORP
发明人： ENDO MITSUHIRO , MINAMI SHIYUUBIN , KIYONO YOSHIHIRO
IPC分类号： B65D85/86 , F16J12/00 , F16J15/10 , H01L21/673 , H01L21/68 , H05K5/06
摘要： PROBLEM TO BE SOLVED: To improve the sealing quality of a package, by making its sealant pressing protrusions press in a line-contact manner the top and under surfaces of its salant with large pressing forces when mounting its upper cover portion on its main body portion. SOLUTION: On the top surface of a box-form main body portion, a flange 3 wherein a sealant storing groove 5 is formed in a closed loop manner is provided. On the under surface of an upper cover portion 2, a first sealant pressing protrusion 14 with an inversed chevron section is provided in a closed loop manner in the opposite position to the sealant storing groove 5 whereinto a closed-loop-form sealant 8 is inserted. On the bottom surface of the sealant storing groove 5 of the box-form main body portion, second sealant pressing protrusions 4a, 4b with chevron sections are provided in a closed loop manner. When the upper cover portion 2 is mounted on the flange 3, the first and second sealant pressing protrusions 14, 4a, 4b are contacted in a line- contact manner with the top and under surfaces of the sealant 8 in a closed loop manner. Hence, even when the pressing force of the upper cover portion 2 on the box-form main body portion is small, the good sealing quality of a package is obtained, and the upper cover portion 2 can be dismounted from the box-form main body portion by a small force.

4. 发明专利

JPH04363048A BONDING METHOD OF THIN SHEET 失效
公开(公告)号：JPH04363048A
公开(公告)日：1992-12-15
申请号：JP1022491
申请日：1991-01-30
申请人： MITSUBISHI MATERIALS CORP , MITSUBISHI MATERIAL SILICON
发明人： MINAMI SHIYUUBIN
IPC分类号： H01L21/301 , C09J5/06 , H01L21/304 , H01L21/68 , H01L21/683 , H01L21/78
摘要： PURPOSE:To bond a thin sheet such as a silicon wafer or the like to a holding member or the like for polishing use with good accuracy. CONSTITUTION:An adhesive layer 5 is formed on a bonding face for a wafer 4; then, the wafer 4 and a holding member 3 are brought face to face via the adhesive layer 5. At this time, the temperature of the holding member 3 is set near the melting point of the adhesive layer 5. In addition, they are pressurized, and the surface of the adhesive layer 5 is pressure-bonded firmly to a holding face 3a for the holding member 3. The holding member 3 is heated to a temperature which is higher than the melting point of the adhesive layer 5; the adhesive layer 5 is melted after that, the holding member 3 is cooled; the adhesive layer 5 is hardened again. At a stage where the adhesive layer 5 is pressurized, the temperature of the holding member 3 is kept near its melting point. As a result, the adhesive layer 5 does not flow, and the parallelism of the wafer 4 with the holding member 3 can be kept with good accuracy.

5. 发明专利

JP2002025951A DOUBLE-SIDED MACHINING APPARATUS AND TRUING METHOD OF GRINDING MEANS 失效
公开(公告)号：JP2002025951A
公开(公告)日：2002-01-25
申请号：JP2000210299
申请日：2000-07-11
申请人： MITSUBISHI MATERIALS CORP , MITSUBISHI MATERIAL SILICON
发明人： KOBAYASHI TATSUNOBU , TANAKA HIROSHI , KONGOJI TOYOHISA , MINAMI SHIYUUBIN
IPC分类号： B24B7/17 , B24B53/02 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a double-sided machining apparatus and a truing method of a grinding means for carrying out the truing of the grinding means easily and accurately. SOLUTION: The almost discoidal grinding means 2 and 3 with grinding action faces 2a and 3a put opposite to each other, first and second driving unites 12 and 13 for driving these grinding means 2 and 3 in rotation, a deflecting unit 14 for deflecting the grinding means 2 and 3 relatively in a direction that crosses an axial line of these grinding means 2 and 3 in parallel, and a pace adjusting unit 15 for adjusting the space between the grinding means 2 and 3 in the axial direction, are provided. The grinding action faces 2a and 3a are mutually ground and flattened by driving the grinding means 2 and 3 around the axial line while the grinding means 2 and 3 are mutually deflected and grinding action faces 2a and 3a are put in contact with each other. Then, the procedure is repeated while the dislocated distance is changed, and the truing of the grinding means 2 and 3 is carried out.

6. 发明专利

JPH09174424A METHOD AND DEVICE FOR POLISHING SEMICONDUCTOR WAFER 失效
公开(公告)号：JPH09174424A
公开(公告)日：1997-07-08
申请号：JP33707695
申请日：1995-12-25
申请人： MITSUBISHI MATERIAL SILICON , MITSUBISHI MATERIALS CORP
发明人： MINAMI SHIYUUBIN
IPC分类号： B24B37/005 , B24B37/08 , H01L21/304 , B24B37/04
摘要： PROBLEM TO BE SOLVED: To provide high flatness and parallelism by a method wherein when the two surfaces of a semiconductor wafer are polished by upper and lower surface plates, a relative speed and load distribution are uniformalized throughout the whole areas of the two surfaces. SOLUTION: A polishing device comprises a carrier 5 to hold a semiconductor wafer 6 in a horizontal state; upper and lower surface plates 2 and 3 brought into slide contact with the upper and under surfaces of the semiconductor wafer 6 and nipping the upper and under surfaces from above and below; a lap member 4 placed on the upper surface plate 2 so that the upper surface plate 2 is rendered relatively horizontally movable; and gear driving mechanisms 9, 10, 21, and 22 to reciprocate the upper and lower surface plates 2 and 3 at a uniformalized relative speed in a direction reverse to each other throughout the whole areas of the upper and the under surfaces of the semiconductor wafer 6. In such a way that the upper and lower surface plates 2 and 3 are linearly moved in a reverse direction to each other, the upper and the under surfaces of the semiconductor wafer 6 are polished at uniform speed distribution and bearing distribution throughout the whole areas of the upper and under surfaces thereof, and machining precision, such as flatness, is excellent.

7. 发明专利

JPH09174418A CHEMICAL LAP DEVICE FOR SEMICONDUCTOR WAFER 失效
公开(公告)号：JPH09174418A
公开(公告)日：1997-07-08
申请号：JP33707595
申请日：1995-12-25
申请人： MITSUBISHI MATERIAL SILICON , MITSUBISHI MATERIALS CORP
发明人： MINAMI SHIYUUBIN
IPC分类号： B24B37/00 , B24B37/005 , B24B37/015 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a chemical lap device for a semiconductor wafer to reduce the processing allowance of a semiconductor wafer and further reduce the occurrence of a swell component and the occurrence of a warp. SOLUTION: A chemical lap device for a semiconductor wafer comprises a casing 1; and upper and lower surface plates 2 and 3 paralleling each other and arranged in the casing 1 and having at least opposite surfaces being a grinding surface formed of heat resistant resin. An alkaline solution in an amount higher than an amount enough to allow immersion of a semiconductor wafer is contained in the casing 1. Carriers 4a and 4b to hold the semiconductor wafer are moved in a horizontal plane relatively to the upper and lower surface plates 2 and 3, the upper and under surfaces of the semiconductor wafer are brought into contact with the upper and lower surface plates 2 and 3 with a low pressure to effect simultaneous polishing. An alkaline solution and a wafer surface are reacted to each other, chemical polishing is effected, and since elastic deformation of the semiconductor wafer is low, the occurrence of the swell component of the semiconductor wafer and the occurrence of the warp thereof are reduced, and the upper and under surface are finished in the same flatness as that of the surface plate.

8. 发明专利

JP2002001644A DEVICE AND METHOD FOR SLICING 失效
公开(公告)号：JP2002001644A
公开(公告)日：2002-01-08
申请号：JP2000183800
申请日：2000-06-19
申请人： MITSUBISHI MATERIAL SILICON
发明人： MINAMI SHIYUUBIN
IPC分类号： B23Q17/22 , B24B27/06 , B24B49/12 , B28D5/02
摘要： PROBLEM TO BE SOLVED: To provide a device and method for efficiently slicing with required quality, and preventing unnecessary reduction of a life of a cutting grinding wheel. SOLUTION: This slicing device successively cuts a cutting object into a platy material of a specified thickness by using a disc-shaped cutting grinding wheel in a rotating state. The slicing device comprises a displacement sensor for detecting a side surface displacement of the grinding wheel; a control computing portion for calculating a line L connecting a starting sides surface displacement p1 at a cutting-start detected by the displacement sensor with a finishing side surface displacement p2 at a cutting-end, and calculating a deviation between the line L and the side surface displacement as warping data of a cutting surface; and an indicating portion for indicating the warping data.

9. 发明专利

JP2001176824A SEMICONDUCTOR WAFER AND METHOD AND DEVICE FOR MACHINING CHAMFERED SURFACE THEREOF 失效
公开(公告)号：JP2001176824A
公开(公告)日：2001-06-29
申请号：JP35838799
申请日：1999-12-17
申请人： MITSUBISHI MATERIAL SILICON
发明人： MINAMI SHIYUUBIN
IPC分类号： B24B9/00 , H01L21/304 , H01L21/306
摘要： PROBLEM TO BE SOLVED: To prevent dust from being produced from the outer peripheral part of a gather-etched wafer, to increase the strength of the wafer outer peripheral part, and to improve operability. SOLUTION: Semiconductor wafers are etched, while being stacked over another. Raised waving parts appear all over the border line between the etching surface of the outer peripheral part of a semiconductor wafer and the surface stacked on an adjacent semiconductor wafer. The waving parts are removed, by carrying out tape chamfering and chamfering using a grindstone for polishing for the waving parts. After gather etching, a silicon wafer is sucked to a chuck table, which is rotated. The abrasive working surface of a tape for chamfering is pressed against waving parts on the top and reverse surface sides of the wafer. Consequently, the waving parts are polished and removed.

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