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    • 1. 发明专利
    • サーバ装置および映像音声再生端末
    • 服务器设备和音视频再现终端
    • JP2014211779A
    • 2014-11-13
    • JP2013088006
    • 2013-04-19
    • 三菱電機株式会社Mitsubishi Electric Corp
    • WATANABE OSAMUSAKAI SHUSUKEUENO HIROSHI
    • G06F13/00H04N21/235H04N21/262
    • G06F13/00H04N21/23
    • 【課題】本発明はサーバ負荷を軽減しつつデータ配信を行うサーバ装置の提供を目的とする。【解決手段】本発明に係るサーバ装置1は、ダウンロード情報管理部12を備え、ダウンロード許可情報には、映像音声再生端末に配信データのダウンロードを許可するか否かを示す許可/不許可の情報が記載されており、ダウンロード完了情報には、映像音声再生端末への配信データのダウンロードが完了したか否かを示す完了/未完了の情報が記載されており、ダウンロード完了情報の記載は、映像音声再生端末から書き換え可能であり、ダウンロード完了情報の記載が未完了から完了に書き換えられた場合、別の映像音声再生端末に対応するダウンロード許可情報の記載を不許可から許可に書き換えることを特徴とする。【選択図】図1
    • 要解决的问题:提供一种能够在减少服务器负载的同时分发数据的服务器设备。解决方案:服务器设备1包括下载信息管理单元12.在下载许可信息中,写入允许/禁止信息,指示是否 允许将分发数据下载到音频 - 视频再现终端。 在下载完成信息中,写入完成/不完整信息,指示是否完成了向音频 - 视频再现终端的分发数据的下载。 下载完成信息可以由音频 - 视频再现终端重写。 当下载完成信息被重写并且“不完整”的描述被改变为“完成”时,将重写另一个音频 - 视频再现终端的下载许可信息,并将“禁止”的描述改变为“允许 ”。
    • 3. 发明专利
    • JPH05300532A
    • 1993-11-12
    • JP9786592
    • 1992-04-17
    • MITSUBISHI ELECTRIC CORP
    • WATANABE OSAMUKIMURA KEIJI
    • H04N9/64
    • PURPOSE:To obtain a color detection signal that optionally sets a color range stored in a 1st storage means and detects only the necessary color by using a 1st level comparing means. CONSTITUTION:The output of a ROM 3 and a color difference signal B-Y which are matched with each other in terms of timing are inputted to a comparator COMP 8 and compared with each other. If the output of the ROM 3 is larger than the signal B-Y, '1' is outputted. Meanwhile the output of a ROM 4 and the signal B-Y which are matched with each other in terms of timing are inputted to a COMP 9 and compared with each other. If the signal B-Y is larger than the output of the ROM 4, '1' is outputted. Then the OR of outputs of both COMP 8 and 9 is secured by an AND circuit 10 so as to obtain a signal that is set at '1' at a desired color part to be detected by the output of the circuit 10. The output signal of the circuit 10 is inputted to a D type flip-flop 60 and temporarily held there to undergo the phase matching with a system clock CLK. Then a color detection signal is outputted to an output terminal 11.
    • 4. 发明专利
    • METHOD OF MOUNTING ELECTRIC COMPONENT ONTO PRINTED WIRING BOARD
    • JPH02268493A
    • 1990-11-02
    • JP9102389
    • 1989-04-10
    • MITSUBISHI ELECTRIC CORP
    • WATANABE OSAMU
    • H05K3/34H05K9/00
    • PURPOSE:To mount a printed wiring board and a shield plate without space between them and to improve performance of an electromagnetic shield by a method wherein the pattern land on the side where the shield plate joins and outside a shield case is removed. CONSTITUTION:A shield case 2 is inserted in a printed wiring board 1, and the pattern land 7 and the projection (lead part) of the shield case 2 are soldered. At this time, the pattern land is put in such conditions that the side where a shield plate 3 is joined, that is, the outside of the case side 2 is removed. The solder comes to adhere only to the inside of the projection of the case 2. In this condition, they are mounted, with the board 1 between, them in the positional relation that the outside of the case 2 and the inside of the plate are joined, whereby the plate 3 can be mounted on the board without space between. While, in case that the outside of the plate 3 is joined with the inside of the case 2, it is made in such shape that the land 7 is removed from inside of the case 2 being the side where the plate 3 is joined.
    • 5. 发明专利
    • CHROMINANCE SIGNAL PROCESSING CIRCUIT
    • JPH01286595A
    • 1989-11-17
    • JP11770488
    • 1988-05-12
    • MITSUBISHI ELECTRIC CORP
    • WATANABE OSAMU
    • H04N9/68H04N9/79H04N9/83
    • PURPOSE:To reproduce a chrominance signal up to a high frequency component by envelope-detecting a sideband component obtained with suppressing a sub- carrier frequency component from a carrier chrominance signal by means of an envelope detecting circuit, and changing the amplification degree of the carrier chrominance signal by means of an amplitude modulating circuit using the output of the circuit as a modulated signal. CONSTITUTION:A band blocking filter 14 extracts a hue changing point, etc., having many high frequency components (b), by pulling out the high frequency component (b) from a carrier chrominance signal (a), detects the envelope of the output signal by an envelope detecting circuit 16, and its output is added to an amplitude modulating circuit 17. Consequently, the signal to change the carrier chrominance signal (a) at the point where the high frequency component (b) exists, and to emphasize the high frequency component (b) is obtained. Thus, the high frequency (b) of the carrier chrominance signal (a) attenuated by receiving band restriction can be restored by a magnetic recording-reproducing device, etc., and the clearness and resolution of a color can be enhanced.
    • 9. 发明专利
    • Digital arithmetic circuit
    • 数字算术电路
    • JPS5769449A
    • 1982-04-28
    • JP14380280
    • 1980-10-15
    • Mitsubishi Electric Corp
    • KAMEYAMA MASATOSHIITOU HITOSHISAKASHITA YOSHIHIKOWATANABE OSAMU
    • G06F7/00G06F7/57G06F7/76
    • G06F7/57
    • PURPOSE:To obtain data, obtained by rewriting bits at optional positions of a digital signal in a desired bit pattern, easily at a high speed, by adding a mask register and a gate device to the arithmetic part of a CPU. CONSTITUTION:The parallel output M and output M' of a bit pattern set in a mask register 1 are applied to AND gates 61 and 62 through output data lines 4 and 5 and OR gates 63 and 64 of a gate device 6, and a mask enable signal (m) is applied to the AND gates 61 and 62 through a signal line 7 and the OR gates 63 and 64. When the signal (m) is a ''0'', an A' equal to an AM and a B' equal to a B'M are applied to an arithmetic logical operation circuit 10 through output data lines 2 and 3 respectively to perform the arithmetic of the kind of an indication passed through a control signal line 11, thereby sending an output signal F to an output data line 12. When the signal (m) is a ''1'', on the hand, the gate device 6 only permits input signals A and B to pass through it.
    • 目的:通过在CPU的算术部分添加掩模寄存器和门装置,可以容易地以高速重写在期望的位模式的数字信号的可选位置处的位获得的数据。 构成:在掩模寄存器1中设置的位模式的并行输出M和输出M'通过输出数据线4和5以及门装置6的OR门63和64被加到与门61和62上, 使能信号(m)通过信号线7和或门63和64施加到与门61和62。当信号(m)为“0”时,等于AM和A B'分别通过输出数据线2和3施加到算术逻辑运算电路10,以执行通过控制信号线11的指示种类的运算,从而将输出信号F发送到 输出数据线12.当信号(m)为“1”时,手持设备6只允许输入信号A和B通过。