专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPH0496360A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH0496360A
公开(公告)日：1992-03-27
申请号：JP21370590
申请日：1990-08-14
申请人： MITSUBISHI ELECTRIC CORP
发明人： KINOSHITA YASUSHI , WATABE KIYOTAKA
IPC分类号： H01L27/04 , H01L21/822
摘要： PURPOSE:To inhibit the dispersion of a silicide resistance value, and to display an effect on a resistor, to which accuracy is required particularly, by forming a silicide only on the top face of a polycrystalline silicon film. CONSTITUTION:The resist 4 of a layer insulating oxide film 3a is formed and patterned, and the layer insulating oxide film 3a in a region to be silicide-formed is removed while using the resist 4 as a mask. The resist is removed, and titanium is sputtered to the exposed section of the top face of a polycrystalline silicon layer 2 and RTA treatment is conducted. Consequently, a silicide such as titanium silicide 5 is formed only to the exposed section. A layer insulating oxide film 3b, an opening for a contact, a barrier metal 6 and one-layer aluminum wiring 7 are shaped. Accordingly, the silicide is not formed on the side faces of the polycrystalline silicon film, thus inhibiting the dispersion of the resistance value of the silicide.

2. 发明专利

JPH0245963A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0245963A
公开(公告)日：1990-02-15
申请号：JP19687488
申请日：1988-08-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： WATABE KIYOTAKA
IPC分类号： H01L23/20
摘要： PURPOSE:To keep a dangling bond from being formed and prevent the deterioration of electric characteristics by sealing a hydrogen gas into a closed space in which a semiconductor element is installed. CONSTITUTION:A semiconductor element 1 is sealed in such a way that it is surrounded to an airtight state by means of an enclosure 4 as a sealing member. A recessed part in the enclosure 4 functions as a hermetically sealed space which is sealed by the enclosure and a hydrogen gas is sealed into the recessed part in order to protect the element 1 from corrosion. Even if a dangling bond is formed at the interface of an insulating film in the element 1 by irradiating X-rays, hydrogen atoms are supplied from the sealed space and then, the hydrogen atoms extinguish the dangling bond after terminating it. The supply of the hydrogen gas thus keeps the dangling bond from being formed and the deterioration of electric characteristics are prevented.

3. 发明专利

JPH0278098A CONTENT REFERENCE MEMORY CELL 失效
公开(公告)号：JPH0278098A
公开(公告)日：1990-03-19
申请号：JP3542889
申请日：1989-02-15
申请人： MITSUBISHI ELECTRIC CORP
发明人： WATABE KIYOTAKA , EIMORI TAKAHISA , ARIMA HIDEAKI , AJIKA NATSUO , NAKAJIMA YUICHI , SATO SHINICHI
IPC分类号： G11C15/04
摘要： PURPOSE:To prevent the disappearance of data when power is cut off and to read the data from a bit line pair by directly connecting the respective first conducting terminals of the first and second nonvolatile memory transistors to respectively corresponding bit lines in the bit line pair. CONSTITUTION:When a word line WL is made into an 'L' level after floating gate type avalanche transistors MF1 and MF2 are respectively made into an ON state and an OFF state, data '1' are written to a memory cell. On the other hand, when a match line ML is made into an 'H' level, and an n-MOS transistor MD is made into the ON state after a bit line pair composed of bit lines BL and the inverse of BL is discharged, since the match line ML under the 'H' level is connected through the transistor MD and the transistor MF1 under the ON state to the bit line BL and cut off from the bit line the inverse of BL by the transistor MF2 under the OFF state, only the potential of the bit line BL heightens, and the data can be read by sensing the potential difference between the bit lines BL and the inverse of BL to compose the bit line pair.

4. 发明专利

JPH0281439A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0281439A
公开(公告)日：1990-03-22
申请号：JP23321888
申请日：1988-09-16
申请人： MITSUBISHI ELECTRIC CORP
发明人： WATABE KIYOTAKA
IPC分类号： H01L21/336 , H01L29/78
摘要： PURPOSE:To avoid the degradation of a transconductance by a method wherein polycrystalline silicon, high melting point metal or its silicide is used as the material of a member on the side wall of a gate electrode which is a part of an ion implantation mask for obtaining an LDD structure and, further, the material is left on the side wall of the gate electrode. CONSTITUTION:After a field oxide film 2 is selectively formed on the main surface of a p-type silicon substrate 1, a gate electrode 3 is formed. After an insulating film 5 is formed on the surfaces of the gate electrode 3 and the substrate 1, a polycrystalline silicon film 6 is formed on it so as to cover the whole surface of the substrate 1. The polycrystalline silicon film 6 is so removed as to be left on the side wall of the gate electrode 3 by anisotropic etching. Arsenic or phosphorus ions are implanted with a relatively high concentration by using the gate electrode 3 and the remaining part of the polycrystalline silicon film as a mask. Even if hot carriers are injected into the gate side wall part on the drain side, they can be drained out of a drain electrode.

你已经成功收藏专利！

检索式保存成功!

IPRDB