会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 6. 发明专利
    • SYNCHRONIZING CLOCK GENERATING CIRCUIT
    • JPS60224346A
    • 1985-11-08
    • JP8141284
    • 1984-04-23
    • MITSUBISHI ELECTRIC CORP
    • OOSHIMA KAZUYOSHISUZUKI TAKAMASA
    • H04L7/027H03K5/00H04L7/033
    • PURPOSE:To suppress an impulsive noise mixed into an input signal by providing a change point detecting circuit which detects rise and fall points of the input signal with a signal obtained by delaying the reception data input signal successively. CONSTITUTION:An oscillator 2 generates a clock signal 3 having a frequency higher than the fundamental frequency of a data input signal 1 and supplies this signal 3 to a shift register SR20, a change point detecting circuit 6, and a counter 4. The SR20 consists of plural stages of shift registers and delays and transfers the input signal 1 successively and inputs the signal to the circuit 6. The circuit 6 uses the output of the SR20 to detect the rise point and the fall point of pulses having a certain width or wider in the data input signal and resets the counter 4, which counts the high-speed clock signal 3, by a detection signal 7, and a clock signal 5 having the same period as the fundamental frequency of the input signal 1 is outputted from the counter 4. In a discriminator 8, the signal 1 is discriminated by the signal 5 to reproduce reception data.
    • 7. 发明专利
    • Monitor system of code error rate
    • 监视系统的代码错误率
    • JPS59189754A
    • 1984-10-27
    • JP6400583
    • 1983-04-12
    • Mitsubishi Electric Corp
    • KITAYAMA TADAYOSHIOOSHIMA KAZUYOSHI
    • H04L1/00H03M5/12H04L1/24H04L25/02H04L25/49
    • H04L1/241
    • PURPOSE:To measure and to foresee a code error rate in a short time with a small- scale circuit without degrading the code error rate of a receiving signal by using a biphase code as a transmission line code and connecting a low frequency cutting-off circuit to a transmission system to generate the inter symbol interference. CONSTITUTION:A low frequency cutting-off circuit 16 connected to the next stage of a receiving amplifying circuit 1, 5a generates the inter symbol interference due to low frequency cutting-off for the signal outputted from the receiving amplifying circuit 1, 5a. Bits of the first half of the biphase encoded signal are subjected to the inter symbol interference by low frequency cutting-off more greatly than bits of the latter. The output of the low frequency cutting-off circuit 16 is amplified again by a receiving amplifying circuit 2, 5b and is outputted to a discriminating reproducing circuit 6 and a timing reproducing circuit 7. In the output of the discriminating reproducing circuit 6, bits of the first half have a code error rate higher than that of bits of the latter. If the cut-off frequency of the low frequency cutting-off circuit 16 is selected to obtain parameter K=0.1 when the code error rate for no inter symbol interference is 10 , bit of the first half have 6.3X10 code error rate, and bits of the latter have 1.2X10 code error rate.
    • 目的:使用小规模电路在短时间内测量并预测码错误率,而不会通过使用双相码作为传输线路代码降低接收信号的码错误率,并连接低频截止电路 到传输系统以产生符号间干扰。 构成:连接到接收放大电路1,5a的下一级的低频切断电路16由于从接收放大电路5a输出的信号的低频截止而产生码间干扰。 双相编码信号的前半部分的比特通过低频截止比后者的位要大得多。 低频切断电路16的输出由接收放大电路5b再次放大,并被输出到鉴别再现电路6和定时再现电路7.在鉴别再现电路6的输出中, 上半部分的代码错误率高于后者的代码错误率。 如果在没有符号间干扰的码错误率为10 -9时选择低频切断电路16的截止频率以获得参数K = 0.1,则前半部分的比特为6.3×10 < 6>代码错误率,后者的位有1.2X10 <-9的代码错误率。
    • 9. 发明专利
    • Signal monitoring controlling system
    • 信号监控系统
    • JPS59234A
    • 1984-01-05
    • JP10955982
    • 1982-06-25
    • Mitsubishi Electric Corp
    • OOSHIMA KAZUYOSHIKITAYAMA TADAYOSHI
    • H04B3/46G01M11/00H04L12/44
    • H04L12/44
    • PURPOSE:To obtain a device which inexpensive and has high reliability, by detecting a collision by use of a timer and a detecting circuit of a receiving signal, and also giving a redundant bit to the head part of a transmitting signal. CONSTITUTION:As for a transmitting data inputted to a transmission controlling circuit 34, a redundant bit of fixed length is given to its head part by a redundant bit generator 35, and thereafter, said data is sent to a transmitter 2. As a result, a transition detecting circuit 31b outputs a significant output signal 37 to an AND circuit 30b by the time set by a timer 32. As for the timer 32, the time being equal to a propagation delay time extending from the transmitter 2 of the own station to an output of a waveform shaping circuit 9 through a star coupler 4 is set. When an optical signal of other station is received before receiving an optical signal of the own station, an output signal 10c of the circuit 9 is inputted to an integration circuit 26. A comparator 28 outputs a significant signal to the AND circuit 30b. The circuit 30b applies AND to outputs of the circuit 31b and the comparator 28, and outputs a collision detecting signal 33. The transmission controlling circuit 34 stops immediately transmission of a signal of the own station.
    • 目的:通过使用定时器和接收信号的检测电路检测碰撞,并且向发送信号的头部提供冗余位,以获得便宜并且具有高可靠性的装置。 构成:对于输入到发送控制电路34的发送数据,通过冗余位发生器35向其头部赋予固定长度的冗余位,之后将所述数据发送到发送器2.结果, 转换检测电路31b将定时器32设定的时间输出到AND电路30b的有效输出信号37.对于定时器32,时间等于从本站的发送机2延伸到的传播延迟时间 设置通过星形耦合器4的波形整形电路9的输出。 当接收到本站的光信号之前接收到其他站的光信号时,电路9的输出信号10c被输入到积分电路26.比较器28向AND电路30b输出有效信号。 电路30b对电路31b和比较器28的输出进行AND运算,并输出冲突检测信号33.发送控制电路34立即停止发送本台站的信号。