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1. 发明专利

JPH03201153A DATA TRANSFER SYSTEM 失效
公开(公告)号：JPH03201153A
公开(公告)日：1991-09-03
申请号：JP34382389
申请日：1989-12-28
申请人： MITSUBISHI ELECTRIC CORP
发明人： NAKANO SHINICHI
IPC分类号： G06F13/28
摘要： PURPOSE:To make it possible to hold the periodicity of cyclic transfer by providing this data transfer system with buffer register corresponding to respective transfer modes and a direct memory transfer requirement generating circuit for outputting a direct memory transfer requirement and outputting a latch signal. CONSTITUTION:The buffer registers 4 connected to a bus 2 correspondingly to respective modes to be used is provided and the direct memory transfer requirement generating circuit 5 forms direct memory transfer requiring signals corresponding to respective mode transfer requirements and outputs a latch signal for latching the data of the bus or data outputted from an external equipment to the buffer registers 4 to attain data transfer between the external equipment and memory. By this constitution makes the data transfer system capable of holding the periodicity of cyclic transfer is obtained even when plural transfer modes including the cyclic transfer mode are used.

2. 发明专利

JP2006275904A Position locating system and vehicle-mounted device 审中-公开
标题翻译：位置定位系统和车辆安装设备
公开(公告)号：JP2006275904A
公开(公告)日：2006-10-12
申请号：JP2005098016
申请日：2005-03-30
申请人： Denso Corp , Furuno Electric Co Ltd , Hitachi Ltd , Japan Automobile Research Inst Inc , Japan Radio Co Ltd , Kawasaki Heavy Ind Ltd , Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Mitsubishi Research Institute Inc , 三菱電機株式会社 , 古野電気株式会社 , 川崎重工業株式会社 , 日本無線株式会社 , 松下電器産業株式会社 , 株式会社デンソー , 株式会社三菱総合研究所 , 株式会社日立製作所 , 財団法人日本自動車研究所
发明人： TAKAHASHI JUHEI , SASAKI MASAHIRO , SHIMOGAKI YUTAKA , KASHIWABARA MASANOBU , IKEDA TOMOHIRO , KAWAZOE TOSHIHIRO , YAMADA TETSUSHI , ARAI OSAMU , NAKANO SHINICHI , NAKAMURA KAZUO , MUTO KATSUHIKO , FUJII HARUKI , HASUNUMA SHIGERU
IPC分类号： G01C21/00 , G01S13/91 , G08G1/16
摘要： PROBLEM TO BE SOLVED: To provide a position locating system and a vehicle-mounted device capable of solving the conventional problem which should be overcome to improve their precision in the future, by improving the absolute position precision of a movable body from current tens of meter level to tens of centimeter to several meter level.
SOLUTION: The position locating system is provided with a lane marker 13 for reflecting electric waves emitted from the movable body, beacons 11, 12 for sending positional information, representing the position where the lane marker 13 is set and the vehicle-mounted device 14 mounted on the moving body. The vehicle-mounted device 14 is provided with a position detection means for detecting the position of the moving body relative to the lane marker 13, a positional information acquisition means for acquiring the positional information of the lane marker 13 sent from the beacons 11, 12 and a position-locating means for locating the position of the moving body according to the position of the moving body calculated, based on the position of the moving body relative to the lane marker 13 and the positional information of the lane marker 13.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种能够解决常规问题的定位系统和车载装置，通过提高可动体的当前的绝对位置精度，可以解决将来要提高其精度的常规问题几十米到几十米到几米级。位置定位系统设置有用于反射从可移动体发射的电波的车道标记13，用于发送位置信息的信标11,12，表示车道标记13被设置的位置和车载装置14安装在移动体上。车载装置14设置有用于检测移动体相对于车道标记13的位置的位置检测装置，用于获取从信标11,12发送的车道标识器13的位置信息的位置信息获取装置以及位置定位装置，用于根据移动体相对于车道标识13的位置和车道标记13的位置信息，根据计算出的移动体的位置来定位移动体的位置。
版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2001014256A COMPUTER SYSTEM HAVING SHARED DISK DEVICE 失效
公开(公告)号：JP2001014256A
公开(公告)日：2001-01-19
申请号：JP18516699
申请日：1999-06-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： NAKANO SHINICHI , MANABE KATSUSHIGE , ISHIZAWA MASAYOSHI
IPC分类号： G06F13/10 , G06F3/06 , G06F13/14 , G06F15/167 , G06F15/177
摘要： PROBLEM TO BE SOLVED: To provide an inexpensive shared disk device connecting a plurality of computers by using a SCSI bus without using a special interface. SOLUTION: A master system computer 1 and a slave system computer 2 are connected to a shared disk device 3 by a SCSI bus 4. The computer 1 issues a SCSI command to a device managing device 32 in a fixed interval, and the device 32 monitors the state of the disk device 3 by returning the state of a device abnormality outputting part 33 as a response.

4. 发明专利

JPH10283388A LOGIC VERIFYING DEVICE 失效
公开(公告)号：JPH10283388A
公开(公告)日：1998-10-23
申请号：JP8966597
申请日：1997-04-08
申请人： MITSUBISHI ELECTRIC CORP
发明人： SHIMIZU TOSHIHIKO , ABE KAORU , NAKANO SHINICHI
IPC分类号： G01R31/28 , G06F11/22 , G06F17/50
摘要： PROBLEM TO BE SOLVED: To obtain a logic verifying device by which it is not necessary to hold a huge simulation pattern, it is possible to largely reduce the preparing time of a test pattern, and it is possible to improve the efficiency of simulation. SOLUTION: A pattern automatic generator 2 automatically generates a simulation pattern such as an address, data and control signal from an operation parameter 3, and outputs it to an LSI 1 being the object of logic verification. Automatic judging devices 4 and 14 automatically judge the validity of the operation of the LSI 1 being the object of logic verification during the execution of simulation. An inside state reproducing device 10 reports the inside state of the LSI 1 being the object of logic verification.

5. 发明专利

JPH09162719A OUTPUT BUFFER 失效
公开(公告)号：JPH09162719A
公开(公告)日：1997-06-20
申请号：JP34552195
申请日：1995-12-08
申请人： MITSUBISHI ELECTRIC CORP
发明人： ABE KAORU , NAKANO SHINICHI , SHIMIZU TOSHIHIKO
IPC分类号： H03K17/16 , H03K17/687 , H03K19/0175 , H03K19/0948
摘要： PROBLEM TO BE SOLVED: To realize an output buffer capable of controlling autonomously a timing for the operation of a support buffer group with respect to a transition characteristic changed depending on the load state of a transmission line by detecting the transition level of output of the transmission line, transiting the output level of the transmission line quickly and reducing distortion in an output waveform thereby overcoming the effect of reflection in the transmission line. SOLUTION: This output buffer has a main buffer 101 outputted usually and plural support buffer groups 102 connected in parallel to the main buffer 101, and feeds back an actual output of a transmission line to a support buffer control device 103, which controls in a detailed way the support buffer group 102 while detecting a transition state of an output level thereby quickly realizing the transition of the output of the transmission line.

6. 发明专利

JPH08335200A INPUT/OUTPUT CONTROLLER AND COMPUTER SYSTEM DEVICE 失效
公开(公告)号：JPH08335200A
公开(公告)日：1996-12-17
申请号：JP13975195
申请日：1995-06-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： NAKANO SHINICHI , MANABE KATSUSHIGE
IPC分类号： G06F13/10 , G06F13/12
摘要： PURPOSE: To provide an input/output controller and a computer system device by means of which the function and state of input/output control can be easily and flexibly changed. CONSTITUTION: This input/output controller is provided with a ROM 13 storing the microprogram of a microprocessor 10, input/output control circuit 1 for connecting input/output devices 17 and 18 under the control of the microprocessor 10, dip switch 15 for setting an operation change mode concerning input/output control, flash EEPROM 12 having a program setting table 12a and a hardware setting table 12b, and monitor control part 14 for controlling the data reloading of respective tables due to a monitoring device 16 in the operation change mode.

7. 发明专利

JPH0619732A DUPLEX SYSTEM SWITCHING DEVICE 失效
公开(公告)号：JPH0619732A
公开(公告)日：1994-01-28
申请号：JP19904892
申请日：1992-07-03
申请人： MITSUBISHI ELECTRIC CORP
发明人： OGAWA OSAMI , NAKANO SHINICHI
IPC分类号： G06F3/00 , G06F11/20
摘要： PURPOSE:To easily correspond to the switching of control system when the bus standards of terminals differ by providing control system-side buses, terminal-side buses and a switching means in accordance with the plural bus standards. CONSTITUTION:Control system 1A and 1B, the control system-side buses 2A1-2An and 2B1-2Bn consisting of n buses different in the standards and the terminals- side buses 2C1-SCn are provided. Furthermore, m terminals 3A1-3Am having the same bus interface connected to the buses 2C1-2Cn are provided. The switching device 41 provided between the control systems 1A, 1B and the terminals 3A1-3Am, the switching circuit 51 which is provided in the switching circuit 51 which is provided in the switching device 41 and changes over the buses 2A1-2An and 2B1-2Bn and a processor 6 which is connected to the switching circuit 51 and executes a switching operation are provided. Thus, correspondence to switching to the terminals of the duplexed control system 1A and 1B become possible even if the bus standard of the terminals 3A1-3Am differ.

8. 发明专利

JPH05189124A TOUCH PANEL DEVICE 失效
公开(公告)号：JPH05189124A
公开(公告)日：1993-07-30
申请号：JP534192
申请日：1992-01-16
申请人： MITSUBISHI ELECTRIC CORP
发明人： NAKANO SHINICHI
IPC分类号： G06F3/042 , G06F3/03 , G06F3/033 , G06F3/041 , G06F3/048
摘要： PURPOSE:To prevent malfunction caused by mutual disturbance infrared beams at the touch panel devices installed on plural adjacently arranged screens. CONSTITUTION:An X axis direction infrared beam 5a from a light emitting element to a light receiving element and an X axis direction infrared beam 5b from the light emitting element to the light receiving element are provided so as to be switched, and a Y axis direction infrared beam 6c from the light emitting element to the light receiving element and a Y axis direction infrared beam 6d from the light emitting element to the light receiving element are provided so as to be switched. Then, the directions of the infrared beams are set so as to prevent the malfunction caused by the mutual disturbance infrared beams at the touch panel devices installed on the adjacently arranged screens.

9. 发明专利

JP2003078903A Image supervisory system 审中-公开
标题翻译：图像监控系统
公开(公告)号：JP2003078903A
公开(公告)日：2003-03-14
申请号：JP2001266706
申请日：2001-09-04
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： NAKANO SHINICHI , ISHIZAWA MASAYOSHI
IPC分类号： H04N7/18
摘要： PROBLEM TO BE SOLVED: To provide an inexpensive image supervisory system with a simple configuration.
SOLUTION: For example, a decoder 132-1 of a supervisory center 130-1 transmits video/audio selection data, denoting it video/audio data from which microphones/cameras 12 speakers/monitors 28 and 33 display corresponding to each of the speakers/monitors 28 and 33, to each terminal 20, a supervisory control center 30 and a supervisory center 50. According to the video/audio selection data, each terminal 20 transmits digital video/audio data to the supervisory control center 30 or the supervisory center 50 that is designated, and the designated supervisory control center 30 or supervisory center 50 converts the digital video/audio data into analog data and displays them on the speakers/ monitors 28 and 33. Since the microphone/camera 12 is designated corresponding to each of the speakers/monitors 28 and 33 according to the video/audio selection data, the image supervisory system can simply be configured at a low cost.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供具有简单配置的便宜的图像监控系统。解决方案：例如，监控中心130-1的解码器132-1发送视频/音频选择数据，表示其中麦克风/摄像机12扬声器/监视器28和33显示的每个扬声器/监视器28和33显示的视频/音频数据，监视器28和33，每个终端20，监控中心30和监控中心50.根据视频/音频选择数据，每个终端20将数字视频/音频数据发送到监控中心30或监控中心50 指定的监控中心30或监控中心50将数字视频/音频数据转换为模拟数据并将其显示在扬声器/监视器28和33上。由于麦克风/摄像机12被指定为对应于扬声器/监视器28和33根据视频/音频选择数据，可以以低成本简单地配置图像监视系统。

10. 发明专利

JPH0512063A LOGIC CIRCUIT DESIGN DEVICE 失效
公开(公告)号：JPH0512063A
公开(公告)日：1993-01-22
申请号：JP16700191
申请日：1991-07-08
申请人： MITSUBISHI ELECTRIC CORP
发明人： NAKANO SHINICHI
IPC分类号： G06F11/22 , G06F11/28 , G06F11/30
摘要： PURPOSE:To easily grasp the operation state of a logic circuit and to shorten debugging time by setting the trigger conditions associated with the debugging of the logic circuit with a plurality of desired bit patterns sequentially. CONSTITUTION:A plurality of data comparison control circuits 62a to 62n are directly connected to a CPU bus 5 included in the logic circuit for debugging. A switch 9 or a connector 8 is connected to a data setting line 7 to perform the setting of data to be the trigger conditions from the outside, and the necessary trigger conditions are supplied from the switch 9 or the connector 8 to obtain a trigger signal for the debug circuit from the data comparison control circuits 62a to 62n. Thus, the operation of the logic circuit under the complicated and sequential conditions can be grasped, and the time associated with the circuit debugging can be shortened.

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