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1. 发明专利

JPS5825263A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5825263A
公开(公告)日：1983-02-15
申请号：JP12490681
申请日：1981-08-07
申请人： MITSUBISHI ELECTRIC CORP
发明人： MASUKO YOUJI , KAYANO SHINPEI
IPC分类号： H01L21/768 , H01L21/28 , H01L29/43 , H01L29/45
摘要： PURPOSE:To prevent the breakdown of junction due to wiring material by a method wherein a material easy to react to an electrode wiring is provided on the wiring. CONSTITUTION:A poly-Si layer 8 is superposed on an Al electrode wiring 6. Al of the wiring 6 reacts to an impurity diffusion layer 2 and the poly-Si layer 8. The velocity of the reaction of Al to the diffusion layer 2 is controlled, since its reaction to the poly-Si layer 8 advances more easily than the former, and thus a region produced by the mutual diffusion is made shallow. Therefore, the breakdown of junction due to the penetration of Al can be prevented even when the junction is shallow, and thus the high integration of the device by using the shallow junction is enabled.

2. 发明专利

JPS5764926A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5764926A
公开(公告)日：1982-04-20
申请号：JP14073880
申请日：1980-10-07
申请人： Mitsubishi Electric Corp
发明人： FUKUMOTO HAYAAKI , SATOU SHINICHI , TAKANO HIROZOU , KOTANI HIDEO , HARADA KOUJI , KAYANO SHINPEI
IPC分类号： H01L21/22 , H01L21/265
CPC分类号： H01L21/265
摘要： PURPOSE:To reduce the lateral spread of a diffusion layer in order to permit a pattern to be more microscopic, by a method wherein regions selectively injected with impurity ions are selectively scanned with an electron beam controlled suitalby, and the regions irradiated with the beam are annealed. CONSTITUTION:For example, in the process for forming the source and drain of an MOSFET, a gate film 3 and a polycrystaline Si film 6 are provided on a substrate 1 separated by a field film 2 and impurity ions are injected into the exposed substrate surface. Then, diffusion regions 4, 5 injected with the ions are selectively scanned with an electron beam 8 through control by means of a computer, and an annealing treatment is locally applied by means of the energy of the electron beam. Because the beam diameter can be made submicroscopic, it is possible to selectively anneal necessary portions without laterally spreading the diffusion layers 4, 5. In addition, it becomes possible to effect control in the depthwise direction by means of acceleration energy and output.
摘要翻译：目的：为了减少扩散层的横向扩散，以便允许图案更微观，通过其中选择性地注入杂质离子的区域被选择性地用电子束来控制扫描的方法，并且用光束照射的区域是退火。构成：例如，在用于形成MOSFET的源极和漏极的工艺中，在由场膜2分离的衬底1上设置栅极膜3和多晶硅膜6，并将杂质离子注入暴露的衬底表面。然后，借助于计算机通过控制，用电子束8选择性地扫描注入了离子的扩散区域4,5，并且通过电子束的能量局部地施加退火处理。由于光束直径可以是亚微观的，所以可以选择性地退火所需部分而不会横向扩散扩散层4,5。另外，可以通过加速能量和输出来实现深度方向的控制。

3. 发明专利

JPS5737830A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5737830A
公开(公告)日：1982-03-02
申请号：JP11449280
申请日：1980-08-19
申请人： Mitsubishi Electric Corp
发明人： SATOU SHINICHI , HARADA HIROJI , FUKUMOTO HAYAAKI , TAKANO HIROZOU , KOTANI HIDEO , KAYANO SHINPEI
IPC分类号： H01L21/033 , H01L21/283 , H01L21/318 , H01L21/336
CPC分类号： H01L29/66575 , H01L21/033 , H01L21/283 , H01L21/3185
摘要： PURPOSE: To form a microscopic contact hole without forming a mask for the subject semiconductor device by a method wherein the contact region on the surface of a substrate is converted to a nitriding film by injecting an N
2 ion on the contact region using a direct patterning method and after the surface has been oxidized, the nitriding film is removed.
CONSTITUTION: After a gate polycrystalline Si 14 and a source and drain diffusion layer 2 have been formed on the substrate 1, the N
2 ion is injected in the region 8 which is contacted to an electrode using the ion beam direct patterning method. Then, the injected region 8 is converted to a nitriding film by performing an annealing treatment in an N
2 atmosphere at the temperature of 1,000W1,050°C. Subsequently, after an oxide film 9 has been formed on the surface excluding the nitriding film by performing a thermal oxidation teratment, a contact hole is formed by re moving the nitriding film 9 using phosphoric acid and the like, for example, and an electrode wiring 7 is formed. Through these procedures, a microscopic contact hole of approximately 1μm or below can be formed without fail.
COPYRIGHT: (C)1982,JPO&Japio
摘要翻译：目的：为了通过以下方法形成微细接触孔，所述微孔接触孔通过其中通过使用直接图案化方法将接触区域上注入N 2离子将基底表面上的接触区域转变为氮化膜的方法在表面被氧化后，除去氮化膜。构成：在基板1上形成栅极多晶Si 14和源极和漏极扩散层2之后，使用离子束直接图案化方法将N 2离子注入到与电极接触的区域8中。然后，通过在氮气气氛中在1000-1.050℃的温度下进行退火处理，将注入区域8转化为氮化膜。随后，在通过进行热氧化破坏而在除了氮化膜之外的表面上形成氧化膜9之后，例如通过使用磷酸等将氮化膜9重新移动而形成接触孔，并且电极配线形成7。通过这些方法，可以形成大约1mum以下的微观接触孔。

4. 发明专利

JPH0225449B2 失效
公开(公告)号：JPH0225449B2
公开(公告)日：1990-06-04
申请号：JP13225183
申请日：1983-07-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： FUKUMOTO HAYAAKI , HAMA MASAHARU , KAYANO SHINPEI
IPC分类号： G01N15/08

5. 发明专利

JPS5749232A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5749232A
公开(公告)日：1982-03-23
申请号：JP12572380
申请日：1980-09-08
申请人： Mitsubishi Electric Corp
发明人： KOTANI HIDEO , SATOU SHINICHI , TAKANO HIROZOU , FUKUMOTO HAYAAKI , HARADA HIROJI , KAYANO SHINPEI
IPC分类号： H01L21/28 , H01L21/60
CPC分类号： H01L21/76897
摘要： PURPOSE:To reduce the cost of a semiconductor device and to increase the reliability of the device by emitting selectively Mo ions to the contacting hole forming region of an Si oxidized film, and heat treating it, thereby shortening the step of forming the contacting hole. CONSTITUTION:An Si substrate 1 formed with a conductive layer 2 on one main surface is covered with an Si oxidized film 3 formed, for example with a conductive layer 4 in the film. Mo ions are emitted directly from a pattern generator to the region to be formed with a contacting hole to the conductive layer 2, 4 of the film 3. It is heat treated at the temperature higher than 500 deg.C simultaneously upon or after the emission of the Mo ions, the Mo oxide formed on the emitted part is sublimated, and Mo silicide 8 is formed on the layers 2, 4. Thus, the formation of the contacting hole 7 can be facilitated, thereby increasing the reliability of the device.
摘要翻译：目的：为了降低半导体器件的成本，并且通过选择性地将Mo离子发射到Si氧化膜的接触孔形成区域并且对其进行热处理来提高器件的可靠性，从而缩短形成接触孔的步骤。构成：在一个主表面上形成有导电层2的Si衬底1被例如在膜中形成有导电层4的Si氧化膜3覆盖。 Mo离子从图案发生器直接发射到形成有与膜3的导电层2,4接触的区域。在发射或发射之后同时在高于500摄氏度的温度下进行热处理的Mo离子，形成在发射部分上的Mo氧化物升华，并且在层2,4上形成Mo硅化物8，从而可以方便地形成接触孔7，从而增加了器件的可靠性。

6. 发明专利

JPS551154A ELECTROSTATIC INDUCTION TRANSISTOR LOGICAL CIRCUIT DEVICE 失效
公开(公告)号：JPS551154A
公开(公告)日：1980-01-07
申请号：JP7468478
申请日：1978-06-19
申请人： MITSUBISHI ELECTRIC CORP
发明人： KAYANO SHINPEI , KIJIMA KOUICHI
IPC分类号： H01L21/8222 , H01L27/02 , H01L27/06 , H03K19/094
摘要： PURPOSE:To set the characteristic of bipolar transistor separately from that of electrostatic induction transistor thereby to improve the electric characteristic of the transistor and increase the integration degree thereof. CONSTITUTION:A semiconductor layer 2 which becomes a first region is grown on a semiconductor substrate, 1 and in said layer 2 a plurality of regions 3 which becomes second regions are diffusion-formed. Then, shallow regions 4 which become third regions are provided in the layer 2 exposed between the regions 3, and a region 12 which becomes a fourth region in contact with the region 3 at the end part is diffusion-formed up to the substrate 1, and in said region 12 there is provided a region 5 which forms a fifth region. Thereafter, an electrode 6 is fitted to the region 3 contacting the region 12, electrodes 7 to the regions 4, and an electrode 8 to the region 5. In this manner, a composite structure is formed, and the regions 3, 5 and 12 constitute a PNP type bipolar element, and the substrate,1 and the regions 2 through 4 constitute an electrostatic induction transistor. According to this arrangement, the regions which is the base of the bipolar element can be set separately which is the channel of the electrostatic element, and therefore its characteristic is improved.

7. 发明专利

JPH0249654B2 失效
公开(公告)号：JPH0249654B2
公开(公告)日：1990-10-30
申请号：JP8952283
申请日：1983-05-20
申请人： MITSUBISHI ELECTRIC CORP
发明人： FUKUMOTO HAYAAKI , HAMA MASAHARU , KAYANO SHINPEI
IPC分类号： G01N27/06 , G01N27/416 , G01N33/18

8. 发明专利

JPS5756036A Plasma chemical vapor phase reactor 失效
标题翻译：等离子体化学气相反应器
公开(公告)号：JPS5756036A
公开(公告)日：1982-04-03
申请号：JP13123480
申请日：1980-09-20
申请人： Mitsubishi Electric Corp
发明人： HARADA HIROJI , SATOU SHINICHI , FUKUMOTO HAYAAKI , TAKANO HIROZOU , KOTANI HIDEO , KAYANO SHINPEI
IPC分类号： B01J19/08 , C23C16/50 , H01J37/32 , H01L21/18 , H01L21/205
CPC分类号： H01J37/32623 , C23C16/50
摘要： PURPOSE:To improve the growth rate of films by providing magnets generating magnetic field parallel with the surface of the electrodes of a plasma chemical vapor phase reactor in the neighborhood of the surface of one of the electrodes of said device. CONSTITUTION:In a plasma chemical reactor producing semiconductor films such as silicon nitride films or the like, magnets 12, 12' are provided near the surface of one substrate 7, so that the magnetic lines 13 of force created by these are made parallel with the surface near the surface of a silicon wafer. Then, the electrons generated by plasma discharge are confined around said magnetic lines of force and therefore the density of plasma is icreased considerably near the magnetic lines of force, that is, on the surface of the silicon wafer, and the growth rate of the films is increased.
摘要翻译：目的：通过在所述装置的一个电极的表面附近提供与等离子体化学气相反应器的电极的表面平行的磁场，从而提高磁体的生长速度。构成：在制造诸如氮化硅膜等的半导体膜的等离子体化学反应器中，在一个基板7的表面附近设置磁体12,12'，使得由它们产生的力的磁线13与表面附近的硅晶片表面。然后，通过等离子体放电产生的电子被限制在所述磁力线周围，因此等离子体的密度显着地靠近磁力线，即在硅晶片的表面上，并且膜的生长速率增加了。

9. 发明专利

JPS5563861A SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPS5563861A
公开(公告)日：1980-05-14
申请号：JP13807878
申请日：1978-11-07
申请人： MITSUBISHI ELECTRIC CORP
发明人： NAGAO SHIGEO , KAYANO SHINPEI
IPC分类号： H01L29/80 , H01L21/8222 , H01L27/02 , H01L27/06 , H03K19/094
摘要： PURPOSE:To satisfy conditions for the carrier lifetime of an injection transistor and a static induction transistor, by providing only the static induction transistor region of a static induction transistor logic circuit with a trap for controlling the lifetime of minority carriers. CONSTITUTION:An N -type semiconductor layer 2 is produced on an N -type semiconductor substrate 1. A P-type injector 3, a P-type static induction transistor gate region 4 and an N -type static induction transistor drain region 5 are provided. A static induction transistor channel part 2b is provided with a trap means for controlling the lifetime of positive holes which are minority carriers. The trap means is manufactured by selectively diffusing or ion-implanting a transition metal or a heavy metal. Since the lifetime of carriers in each static induction transistor region for performing switching operation is short, high-speed switching is effected. Because the lifetime of carriers in an injection bipolar transistor is long, desirable electric properties are obtained.

10. 发明专利

JPS54102295A EPITAXIAL CROWTH METHOD 失效
公开(公告)号：JPS54102295A
公开(公告)日：1979-08-11
申请号：JP1021078
申请日：1978-01-31
申请人： MITSUBISHI ELECTRIC CORP
发明人： KAYANO SHINPEI
IPC分类号： C30B25/16 , H01L21/20 , H01L21/205
摘要： PURPOSE:To rapidly carry out the discharge of impurities from furnace released from the substrate and repressing the auto doping and also, to prevent the decrease of growth velocity of epitaxial layer, by periodically changing the pressure of gas in reaction furnace. CONSTITUTION:The carrier gas 6, the source gas 7 (for example; SiH4) and the doping gas 8 (for example; AsH4), are induced to the reaction furnace 5 and the substrate 1 composed of Si single crystal having filling layer containing highly concentrated As on the susceptor 4, is heated at a fixed temperature. On this ocassion, the vacuum pump 10 is provided between the furnace 5 and the exhaustduct 9 and epitaxial growth is carried out keeping the furnace 5 at low pressure less than 100 Torr. Meanwhile, the valve for low pressure 11 is periodically opened and shut and the valve for high pressure 12 is maintained at always opening state. That is, the pressure of the furnace 5 is lowered and discharge of impure particle released from the substrate 1, is accerelated at the state of opening the valve 11. The pressure of the furnace 5 is made high determined by the valve diameter of the valve 12 and the epitaxial growth is accerelated at the state of shutting the valve 11. That is, the epitaxial layer slightly affected by the impurities in the substrate 1, is obtained.

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