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1. 发明专利

JPH02153565A SEMICONDUCTOR MEMORY DEVICE 失效
公开(公告)号：JPH02153565A
公开(公告)日：1990-06-13
申请号：JP16757889
申请日：1989-06-29
申请人： MITSUBISHI ELECTRIC CORP
发明人： WAKAMIYA WATARU , SATO SHINICHI , OZAKI KOJI , EMORI TAKAHISA , TANAKA YOSHINORI
IPC分类号： H01L21/76 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108
摘要： PURPOSE:To improve a semiconductor memory device in the degree of integration by a method wherein RAM cells constituting a memory cell array of the semiconductor memory device are surrounded with a field shield isolating structure so as to be insulated and isolated. CONSTITUTION:A RAM 1 is composed of a transfer gate transistor (Tr) 2, a gate oxide film 12, a shield electrode layer 13, and a capacitor 3 formed on a semiconductor substrate 4. The RAM cell 1 is insulated and isolated by an element isolating region 16 of a field shield isolating structure composed of an impurity diffusion layer 5 of the Tr 2 and others which keeps the Tr 2 in an OFF-state always. The layer 5 is formed as being self-aligned to the region 16, a capacitor is extended to a position above a layer 13, whereby the RAM cell 1 is not required to be insulated and isolated using a thick oxide film, so that obstacles to high integration caused by a redundant region such as a bird's beak or the like can be completely eliminated and the RAM cell 1 can be easily and highly integrated.

2. 发明专利

JPS6151835A Manufacture of resin-sealed semiconductor device 失效
标题翻译：树脂密封半导体器件的制造
公开(公告)号：JPS6151835A
公开(公告)日：1986-03-14
申请号：JP17453984
申请日：1984-08-20
申请人： Mitsubishi Electric Corp
发明人： EMORI TAKAHISA , NAGATOMO MASAO
IPC分类号： H01L21/56 , H01L23/28
CPC分类号： H01L21/56 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： PURPOSE:To improve moisture resistance and to improve the long reliability by reducing the specific weight of a filler contained in a sealing resin composition smaller than a sealing resin, and separating the filler from the surface of wirings of a semiconductor element at resin-sealing time. CONSTITUTION:The surface of wirings of a semiconductor element 1, i.e., the surface formed with a passivation film 7 is disposed upside with respect to the gravity direction, and sealed with resin composition made of epoxy resin 8, and filler 9 having a specific weight larger than the epoxy resin. The resin 8 is in melted state, the filler 9 presented in the lower half of the resin 8 is separated from the film 7 on the wiring surface of the element 1, the filler 9 is protruded from the film 7, but does not arrive as the aluminum wirings 4.
摘要翻译：目的：通过降低比密封树脂小的密封树脂组合物中所含的填料的比重来提高耐湿性并提高长的可靠性，并且在树脂密封时间将填料与半导体元件的布线表面分离。构成：半导体元件1的配线表面即形成有钝化膜7的表面相对于重力方向上侧设置，并用由环氧树脂8制成的树脂组合物和具有比重的填料9密封大于环氧树脂。树脂8处于熔融状态时，树脂8的下半部分中的填料9与元件1的布线表面上的膜7分离，填料9从膜7突出，但不会以铝布线4。

3. 发明专利

JPS6151834A Manufacture of resin-sealed semiconductor device 失效
标题翻译：树脂密封半导体器件的制造
公开(公告)号：JPS6151834A
公开(公告)日：1986-03-14
申请号：JP17453884
申请日：1984-08-20
申请人： Mitsubishi Electric Corp
发明人： EMORI TAKAHISA , NAGATOMO MASAO
IPC分类号： H01L21/56
CPC分类号： H01L21/56 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： PURPOSE:To improve moisture resistance and to improve the long reliability by reducing the specific weight of a filler contained in a sealing resin composition smaller than a sealing resin, and separating the filler from the surface of wirings of a semiconductor element at resin-sealing time by utilizing buoyancy of the filler. CONSTITUTION:The surface of wirings of a semiconductor element 1, i.e., the surface formed with a passivation film 7 is disposed upside with respect to the gravity direction, and sealed with resin composition made of epoxy resin 8, and filler 9 having a specific weight smaller than the epoxy resin. The resin 8 is in melted state, the filler 9 presented in the upper half of the resin 8 is separated from the film 7 on the wiring surface of the element 1, the filler 9 is protruded from the film 7, but does not arrive as the aluminum wirings 4.
摘要翻译：目的：通过降低比密封树脂小的密封树脂组合物中所含的填料的比重来提高耐湿性并提高长的可靠性，并且在树脂密封时间将填料与半导体元件的布线表面分离通过利用填料的浮力。构成：半导体元件1的配线表面即形成有钝化膜7的表面相对于重力方向上侧设置，并用由环氧树脂8制成的树脂组合物和具有比重的填料9密封小于环氧树脂。树脂8处于熔融状态时，树脂8的上半部分中的填料9与元件1的布线表面上的膜7分离，填料9从膜7突出，但不会以铝布线4。

4. 发明专利

JPS63226057A SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPS63226057A
公开(公告)日：1988-09-20
申请号：JP28732486
申请日：1986-12-01
申请人： MITSUBISHI ELECTRIC CORP
发明人： EMORI TAKAHISA
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108
摘要： PURPOSE:To enhance cell integration by a method wherein the side wall of a trench is divided into many sections by lateral grooves for the formation of a multiplicity of capacitors in a single trench so designed as to occupy but a little area in the surface of a substrate. CONSTITUTION:The bottom and side walls of a single trench 1 are divided into many sections by central oxide films 11, isolating oxide films 12, and grooves 22. A given number of capacitors may be constructed when a capacitor insulating film forming region 14 is formed for the formation of thin film on a trench wall 21, the capacitor insulating film forming region 14 is filled with an insulating substance for the formation of insulating films for capacitors and, on their outsides, capacitor electrodes 13 are built of polycrystalline silicon or the like. The capacity of a capacitor is adjusted by changing the size (diameter and depth) of the trench 1, the number of sections, or the HiC structure. A transfer gate 4 is positioned to serve as a word line on the upper surface of a substrate but the capacitors are buried completely in the trench 1.

5. 发明专利

JPS63140565A SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPS63140565A
公开(公告)日：1988-06-13
申请号：JP28732386
申请日：1986-12-01
申请人： MITSUBISHI ELECTRIC CORP
发明人： EMORI TAKAHISA
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108
摘要： PURPOSE:To highly integrate the cell of a semiconductor storage device by dividing a trench sidewall in many sections by lateral grooves, and forming a transfer gate in a trench. CONSTITUTION:After the bottom and the sidewall of a trench are divided in many sections by a central oxide film 11, dividing oxide films 12 and lateral grooves 22, insulating film forming regions 14 for forming thin insulating films on the trench sidewalls 21 are formed, insulators are filled in the regions 14 as insulating films for capacitors, and capacitor electrodes 13 made of polysilicon or the like are formed on the outside. Thus, the capacitors of arbitrary number can be formed. The capacity of the capacitor is regulated by the size (diameter and depth) of the trench 1, the number of divided sections or an HiG structure. A transfer gate 4a which becomes a word line is disposed on the top of the electrode 13 in the trench 1, and buried in the trench 1. Thus, the capacitor forming part can be highly integrated.

6. 发明专利

JPS6285446A METAL WIRINGS FORMING FOR SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6285446A
公开(公告)日：1987-04-18
申请号：JP22562285
申请日：1985-10-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： EMORI TAKAHISA , OOGA HIROTOMO , ITO HIROMI , OZAKI KOJI
IPC分类号： H01L21/768
摘要： PURPOSE:To form a metal wiring layer having smooth upper layer by temporarily melting the metal wiring layer having faulty coverage and low melting point as a barrier of high melting point metal and a lower layer, thereby burying completely a contacting hole with the metal wiring material. CONSTITUTION:A lower layer 1 exposed in a contacting hole 3 is coated with fluoride of high melting point metal, and Si-reduced to form a high melting point metal layer 5. Then, a low melting point metal such as AlSi is deposited by sputter depositing on an insulating film 2 including the layer 5 in the hole 3 to form low melting point metal wirings 4. Thereafter, it is annealed at the temperature of the melting point of the metal 4 or higher and of the melting point metal or lower of the layer 5, the metal 4 is temporarily melted to bury the hole 3, and the wirings 4 of the smooth upper layer are completed.

7. 发明专利

JPS6279626A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6279626A
公开(公告)日：1987-04-13
申请号：JP22063585
申请日：1985-10-03
申请人： MITSUBISHI ELECTRIC CORP
发明人： OZAKI KOJI , EMORI TAKAHISA , OOGA HIROTOMO , ITO HIROMI
IPC分类号： H01L21/768 , H01L21/31
摘要： PURPOSE:To make a surface flat without the rediffusion of an impurity by increasing the power of a CVD equipment together with forming an insulation film by CVD at a temperature of the extent that no impurity in a semiconductor substrate is rediffused. CONSTITUTION:A semiconductor substrate 1 which has a rugged pattern 2 on its surface is contained in a chamber for CVD and an insulation film 4 is formed by plasma CVD at a temperature of approx. 800 deg.C. In this case, if the power of a CVD equipment is increased, sputtering effect appears and reflowing can be achieved. By increasing the power of the plasma CVD in such a way, the reflowing of the insulation film can be done at a low temperature on the semiconductor substrate 1 which has a rough pattern simultaneously with the formation of the insulation film, so the surface can be made flat without the redistribution of an impurity introduced in the semiconductor substrate.

8. 发明专利

JPS6273623A PHOTOCHEMICAL REACTOR 失效
公开(公告)号：JPS6273623A
公开(公告)日：1987-04-04
申请号：JP21302785
申请日：1985-09-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： ITO HIROMI , OZAKI KOJI , EMORI TAKAHISA , OOGA HIROTOMO
IPC分类号： H01L21/205 , H01L21/263 , H01L21/302 , H01L21/31
摘要： PURPOSE:To contrive the efficient utilization of the excitation light emitted from a lamp by providing an incident window functioning also as a lamp in a reaction vessel and arranging a reflective member on the outer surface of the incident window unitarily. CONSTITUTION:As an incident window 1a functions also as a lamp, only two planes, front and back sides of a structural member of the lamp become the surfaces giving a reflection loss before light enters a reaction vessel 7 and accordingly the reflection loss is reduced exceedingly. Also, a light reflecting film 2 is formed on a surface of the lamp on opposite side to the reaction vessel 7 by vapor deposition, so that the reflection of light to the side of the reaction vessel occurs inside the lamp due to the reflective film 2. Accordingly, there is no need of evacuation or inert gas purge of an optical path and the large spaces for them become unnecessary. For the light irradiation of a large- area substrate, a plane lamp is used with its extent made vertically. Consequently, an excitation light can be utilized efficiently.

9. 发明专利

JPS61252668A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61252668A
公开(公告)日：1986-11-10
申请号：JP9514785
申请日：1985-05-01
申请人： MITSUBISHI ELECTRIC CORP
发明人： MATSUDA SHUICHI , EMORI TAKAHISA , SUGIMOTO KENJI
IPC分类号： H01L29/78 , H01L21/28 , H01L21/336
摘要： PURPOSE:To make it possible to shorten a heat treating time, by forming a metal film of electrode material, and thereafter selectively implanting ions in a region, which is to become a gate electrode. CONSTITUTION:On a semiconductor substrate 1, an oxide film 2 an an impurity introduced polycrystalline silicon layer 3 are formed, and selective etching is performed. Then, an oxide film is laminated thereon. Dry etching is performed on the entire surface, and an insulating film 4 for the side wall of a gate is formed. A metal film 5 of an electrode material is formed on a pattern. Then, Si ions are selectively implanted in the gate part of the electrode-material metal film 5, and an ion-implanted part 7 is formed. Si is diffused into the metal by heat treatment at a temperature of 600-650 deg.C and a silicide is obtained. At this time, since the Si is diffused into the gate part from the surface and the basis, the silicide formation becomes quick and the region of the silicide part 6 becomes large. Then, a part of the metal film 5 other than the silicide part 6 is removed by etching liquid, and the electrode of a source, a drain and a gate are formed. Thus heat treating time can be shortened, high- concentration polycrystalline silicon can be used, and the lower-resistance gate electrode can be formed.

10. 发明专利

JPS6151833A Manufacture of resin sealed semiconductor device 失效
标题翻译：树脂密封半导体器件的制造
公开(公告)号：JPS6151833A
公开(公告)日：1986-03-14
申请号：JP17453784
申请日：1984-08-20
申请人： Mitsubishi Electric Corp
发明人： EMORI TAKAHISA
IPC分类号： H01L21/56
CPC分类号： H01L21/56 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： PURPOSE:To increase damp-proof and improve long term reliability of a semiconductor device, by employing filler with a larger specific gravity than that of sealing resin, being contained in sealing resin composite, and by rotating fast a resin forming mold to move the filler away from the wiring surface of the semiconductor device. CONSTITUTION:A semiconductor device including a semiconductor element 1 is fixed in a resin forming mold 11. Resin composite consisting of epoxy resin 8 and filler 9 with a larger specific gravity than that of the epoxy resin 8 is sealed in the mold 11. The mold 11 is fast rotated by ''0'' point as a center with the wiring surface of the semiconductor element 1 directed outwardly of the revolution. Since the filler 9 in the epoxy resin 8 being under a melting state is moved away from the passivation film 7, it can be prevented that the filler 9 may pass through the passivation film 7 and reach the aluminium wiring 4.
摘要翻译：目的：通过使用密封树脂复合材料中包含的密封树脂比重大的填料，通过旋转树脂成型模移动填料，增加半导体器件的防潮性能，提高半导体器件的长期可靠性远离半导体器件的布线表面。构成：将包含半导体元件1的半导体器件固定在树脂形成模具11中。由环氧树脂8和比重大于环氧树脂8的填料9组成的树脂复合体被密封在模具11中。模具 11以“0”点快速旋转为中心，半导体元件1的布线表面朝向旋转方向。由于环氧树脂8中处于熔化状态的填料9远离钝化膜7，可以防止填料9通过钝化膜7并到达铝布线4。

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