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1. 发明专利

JP2002190158A ERROR-CORRECTING CODING METHOD OF DISK MEDIUM, OPTICAL DISK, ERROR-CORRECTING METHOD, ERROR-CORRECTING CODING CIRCUIT AND ERROR-CORRECTING CIRCUIT 失效
公开(公告)号：JP2002190158A
公开(公告)日：2002-07-05
申请号：JP2000387562
申请日：2000-12-20
申请人： MATSUSHITA ELECTRIC IND CO LTD , HITACHI LTD
发明人： TAKAGI YUJI , USUI MAKOTO , YABUNO HIROYUKI , NAKAMURA ATSUSHI , KOBAYASHI RYOJI , KIMURA NAOHIRO , TAIRA SHIGEKI , KAWAMAE OSAMU , HOSHISAWA HIROSHI
IPC分类号： G06F11/10 , G11B20/12 , G11B20/18 , H03M13/27 , H03M13/29
摘要： PROBLEM TO BE SOLVED: To overcome the problems such that the single burst error permits the correction of the correcting code in the line direction to be sometimes impossible, and a plurality of burst error occurrences permit the correction of the whole product code to become impossible, in a conventional error-correcting method for recording the product code two-dimensionally coded in the line direction. SOLUTION: By the product-code formation step, a reliable error correction can be carried out by alternately arranging two product codes stored on a memory every line and recording these in the slant direction, and in the case of coding, even if it is the recording in the slant direction, the address can be read at a fixed interval by performing a data transposition step and a one- way cyclic step.

2. 发明专利

JP2002367296A Error correction encoding method of disk medium, error correction encoding method, disk medium, error correction method and error correction circuit 审中-公开
标题翻译：磁盘错误校正方法，错误校正方法，磁盘介质，错误校正方法和错误校正电路
公开(公告)号：JP2002367296A
公开(公告)日：2002-12-20
申请号：JP2001169742
申请日：2001-06-05
申请人： Hitachi Ltd , Matsushita Electric Ind Co Ltd , Toshiba Corp , 松下電器産業株式会社 , 株式会社日立製作所 , 株式会社東芝
发明人： TAKAGI YUJI , USUI MAKOTO , YABUNO HIROYUKI , NAKAMURA ATSUSHI , KOBAYASHI RYOJI , KIMURA NAOHIRO , TAIRA SHIGEKI , KAWAMAE OSAMU , HOSHISAWA HIROSHI , NOZEN CHOSAKU , KASHIWABARA YUTAKA
IPC分类号： G06F11/10 , G06F12/16 , G11B20/10 , G11B20/12 , G11B20/18 , H03M13/27 , H03M13/29
摘要： PROBLEM TO BE SOLVED: To provide an error correction encoding method which reduces the influence of the burst error accompanying a trend toward a higher density in development of next generation DVDs, has high interchangeability with heretofore and is strong to the burst error. SOLUTION: This error correction encoding method of a disk medium comprises interleaving and delivering two product codes in accordance with a prescribed interleaving rule and recording the same to the disk medium. The method described above has a second interleaving step of substituding the upper R/2 lines of S pieces of respective sector data of the product code on one side of the two product codes and succeeding R/2 lines with line units and a third interleaving step of alternately delivering the two product codes in the line units and recording the data by each of the delivered (R+1) lines as physical sector data in order of delivery to the disk medium, by which the method is made strong to the burst error and the recording of the address in the recording data in the same manner as heretofore is made possible.
摘要翻译：要解决的问题：为了提供一种在下一代DVD的开发中减少伴随着更高密度的趋势的突发错误的影响的纠错编码方法，与以前具有高可互换性，并且对于突发错误是强大的。解决方案：盘介质的纠错编码方法包括根据规定的交织规则对两个产品代码进行交织和传送，并将其记录到盘介质。上述方法具有第二交错步骤，用于将两个乘积码的一侧上的乘积代码的S个相应扇区数据的上R / 2线和后续的R / 2线与线单元和第三交织步骤在行单元中交替地递送两个乘积代码，并且通过递送的（R + 1）行中的每个作为物理扇区数据将数据记录到传送到盘介质的顺序，由此使该方法对于突发错误并且以与之前相同的方式在记录数据中记录地址成为可能。

3. 发明专利

JP2002329368A ERROR CORRECTION ENCODING METHOD FOR DISK MEDIUM, ERROR CORRECTION ENCODING CIRCUIT, DISK MEDIUM, ERROR CORRECTION METHOD, AND ERROR CORRECTION CIRCUIT 失效
公开(公告)号：JP2002329368A
公开(公告)日：2002-11-15
申请号：JP2001132243
申请日：2001-04-27
申请人： MATSUSHITA ELECTRIC IND CO LTD , HITACHI LTD , TOSHIBA CORP
发明人： TAKAGI YUJI , USUI MAKOTO , YABUNO HIROYUKI , NAKAMURA ATSUSHI , KOBAYASHI RYOJI , KIMURA NAOHIRO , TAIRA SHIGEKI , KAWAMAE OSAMU , HOSHISAWA HIROSHI , NOZEN CHOSAKU , KASHIWABARA YUTAKA
IPC分类号： G06F11/10 , G11B20/10 , G11B20/12 , G11B20/18 , H03M13/27 , H03M13/29
摘要： PROBLEM TO BE SOLVED: To provide an error correction encoding method which is compatible to conventional methods and is strong against burst error by reducing an influence of burst error accompanied with the rise of density in DVD development for the next generation. SOLUTION: An error correction encoding method for disk mediums is provided which interleaves two product codes in the order based on a prescribed interleave rule and sends them to record them in a disk medium. The error correction encoding method has a second interleave step where R/2 higher rows of each of S sector data of one of two product codes and R/2 following rows are substituted in the unit of rows and a third interleave step where two products codes are alternately sent in the unit of rows and sent data of every (R+1)th row are recorded in the disk medium as physical sector data in the sending order, and thus this method is strong against burst error and can record an address in recording data in the same manner as conventional methods.

4. 发明专利

JP2006147133A Method for correcting edge of recording pulse 审中-公开
标题翻译：校正脉冲边缘的方法
公开(公告)号：JP2006147133A
公开(公告)日：2006-06-08
申请号：JP2005303753
申请日：2005-10-18
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YAMAMOTO HITOSHI , YABUNO HIROYUKI
IPC分类号： G11B7/0045
摘要： PROBLEM TO BE SOLVED: To provide a method for correcting an edge of a recording pulse by which an edge position of the recording pulse is always corrected properly without depending on the factors of a circuit configuration, voltage and temperature, and an individual difference of a chip.
SOLUTION: The method for correcting an edge of an recording pulse of this invention comprises; a step for producing a delay measuring pulse by delaying a reference clock; a step for ANDing two delay measuring pulses with different delays to measure the number of delay elements per unit delay time; a step for NORing two delay measuring pulses with different delays to measure the number of delay elements per unit delay time; a step for averaging a difference between the numbers of delay elements obtained by the AND measurement and NOR measurement to obtain a correction value for correcting the error of the number of delay elements produced by Duty collapse of delay measuring pulses; and a step for correcting the number of delay elements obtained by the AND measurement using the correction value.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于校正记录脉冲的边缘的方法，通过该方法，记录脉冲的边缘位置总是可以适当地校正，而不依赖于电路配置，电压和温度的因素，以及个体芯片的差异解决方案：用于校正本发明的记录脉冲的边缘的方法包括：通过延迟参考时钟产生延迟测量脉冲的步骤; 用于对具有不同延迟的两个延迟测量脉冲进行和操作以测量每单位延迟时间的延迟元件的数量的步骤; 用于NORing具有不同延迟的两个延迟测量脉冲的步骤来测量每单位延迟时间的延迟元件的数量; 用于对通过AND测量获得的延迟元件的数量与NOR测量值之间的差异进行平均以获得用于校正由延迟测量脉冲的占空比衰减产生的延迟元件的数量的误差的校正值的步骤; 以及用于校正通过使用校正值的AND测量获得的延迟元件的数量的步骤。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2001266506A INFORMATION REPRODUCING METHOD AND DEVICE 失效
公开(公告)号：JP2001266506A
公开(公告)日：2001-09-28
申请号：JP2000084279
申请日：2000-03-24
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： YABUNO HIROYUKI , SATO TAKAHIRO , YAMAMOTO GIICHI , USUI MAKOTO
IPC分类号： G11B20/18 , H03M13/15 , H04L1/00
摘要： PROBLEM TO BE SOLVED: To provide an information reproducing device high in error correction capacity. SOLUTION: The device is provided with a data packet storage means, a user symbol substitution means which substitutes additional data to specific data under prescribed conditions, a comparison means which compares the first data part and second data part and sets a different symbol position to a vanishing position, a selection means to switch and output the first parity part and second parity part, an error correction means which switches error correction of only the data part or error correction of both the data part and additional data to perform vanishing error correction by the vanishing position detected by the comparison means. The comparison means and the error correction means perform the vanishing correction. Besides, when the data recorded on the additional data part are known, the substitution to the specific data is performed by the user symbol substitution means without using the read additional data.

6. 发明专利

JP2006202473A Data recording method, recording medium, reproducing device/method, reproduction control device/method/program, recording device/method, recording control device/method/program 有权
标题翻译：数据记录方法，记录介质，再现设备/方法，再现控制设备/方法/程序，记录设备/方法，记录控制设备/方法/程序
公开(公告)号：JP2006202473A
公开(公告)日：2006-08-03
申请号：JP2006049098
申请日：2006-02-24
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： TAKAGI YUJI , USUI MAKOTO , YABUNO HIROYUKI
IPC分类号： G11B20/12 , G11B20/18 , G06F11/08 , G06F11/10 , G11B20/10 , H03M13/27 , H03M13/29 , H03M13/35
CPC分类号： G11B20/1833 , G11B20/1803 , G11B20/1866 , G11B2020/1287 , G11B2220/2562 , H03M13/29 , H03M13/2954
摘要： PROBLEM TO BE SOLVED: To solve a problem that entire reliability is limited by lowest reliability since reliability is made inferior because of difference in error detection performance in comparison with data held between a synchronizing signal and a second error-correction code when data are held on both the sides between the constitutive symbols of the second error-correction code of low error detection ability in a conventional data recording method for recording two error-correction codes and the synchronizing signal on prescribed interleave rules. SOLUTION: A data stream is constituted by containing the first error-correction code having the first correction ability, in which user data are encoded, the second error-correction code having the second correction ability, in which control information is encoded, higher than the first correction ability and the synchronizing signal and alternately interleaving the second error-correction code and the synchronizing signal in respect to the first error-correction code. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了解决由于与数据中保持的同步信号和第二纠错码之间的数据相比，由于与错误检测性能的差异而导致的可靠性降低，所以可靠性受到最低可靠性的限制在用于记录两个纠错码的常规数据记录方法和规定的交织规则上的同步信号之间，保持在低错误检测能力的第二纠错码的构成符号之间的两侧。解决方案：数据流通过包含编码用户数据的第一校正能力的第一纠错码，其中控制信息被编码的具有第二校正能力的第二纠错码，高于第一校正能力和同步信号，并且相对于第一纠错码交替地交织第二纠错码和同步信号。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2004272393A Cpu built-in lsi and optical disk unit using the same, and lsi device 审中-公开
标题翻译： CPU内置LSI和使用其的光盘单元和LSI设备
公开(公告)号：JP2004272393A
公开(公告)日：2004-09-30
申请号：JP2003059134
申请日：2003-03-05
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SATO MACHIKO , YABUNO HIROYUKI
IPC分类号： G06F3/06 , G06F3/08 , G06F9/06 , G06F9/445 , G06F9/50 , G06F9/54 , G11B20/10
CPC分类号： G06F9/445
摘要： PROBLEM TO BE SOLVED: To provide a CPU built-in LSI where the use capacity of an RAM is reduced and an optical disk device using it by partially integrating software recorded in an external memory in an RAM. SOLUTION: In a CPU built-in LSI 101, an RAM 103 is provided with: a software storage area 108 for storing software read by module units from an external memory 107; and an entry table 109 for storing entry including at least the location information and size information of a module stored in the software storage area 108. A CPU 102 decides the storage position of the module to be read from the external memory 107 to the software storage area 108 by referring to the entry table 109 according to an integration position investigation program 121. COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供一种RAM内置LSI，其中RAM的使用容量减少，并且通过将记录在外部存储器中的软件部分地集成在RAM中来使用它的光盘装置。解决方案：在内置LSI 101的CPU中，RAM103设置有：用于存储从外部存储器107通过模块单元读取的软件的软件存储区域108; 以及用于存储至少包括存储在软件存储区域108中的模块的位置信息和大小信息的条目表109.CPU 102决定要从外部存储器107读取的模块的存储位置到软件存储器区域108根据集成位置调查程序121参照入口表109.版权所有（C）2004，JPO＆NCIPI

8. 发明专利

JP2004046989A Demodulating circuit, information reproducing device, and information reproducing method 审中-公开
公开(公告)号：JP2004046989A
公开(公告)日：2004-02-12
申请号：JP2002204632
申请日：2002-07-12
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YABUNO HIROYUKI
IPC分类号： G11B20/14 , G11B7/005 , G11B7/007
摘要： PROBLEM TO BE SOLVED: To solve the problem that scale of a phase error detecting circuit detecting/correcting phase deviation between a carrier wave component of a wobbling signal and a carrier wave generated by a PLL is large, in conventional demodulation circuit and information reproducing device.
SOLUTION: This device is provided with: a carrier wave generating means for extracting a carrier wave from a wobbling signal obtained from media; a phase adjusting means for delaying a phase by the prescribed delay quantity so as to adjust to the carrier wave of the wobbling signal; a phase demodulating means for performing phase modulation from the wobbling signal and a carrier wave after phase adjusting outputted from the phase adjusting means; and a synchronism detecting means for detecting a synchronizing signal of the information from an output of the phase demodulating means and deciding the prescribed delay quantity by the phase adjusting means from the detected result.
COPYRIGHT: (C)2004,JPO

9. 发明专利

JP2001014794A RECORDING TYPE OPTICAL DISK AND ITS RECORDING METHOD 失效
公开(公告)号：JP2001014794A
公开(公告)日：2001-01-19
申请号：JP17966999
申请日：1999-06-25
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： YABUNO HIROYUKI , TANAKA SHINICHI
IPC分类号： G11B20/10 , G06F12/14 , G06F21/24 , G11B7/00 , G11B7/0055 , G11B7/30 , G11B19/02 , G11B20/18
摘要： PROBLEM TO BE SOLVED: To provide a recording type optical disk disabling digital copy from a reproduction-only optical disk to recording type optical disk and its recording method. SOLUTION: This recording type optical disk is composed of a data area 1 where data are recorded, and a read-in area 2 including a control data block 3 consisting of two areas of a pre-pit recording area 5 where fixed data containing invalid scrambled key data 11 are permanently recorded in a non- erasable form and a recordable area 4, to disable recording of scrambled key information for releasing scrambling of the data, and errors enough to disable error correction are inserted in a part of an inner code pertaining to an area where the scramble key 11 does not exist in the pre-pit recording area.

10. 发明专利

JP2007295315A Signal transmission circuit 审中-公开
标题翻译：信号传输电路
公开(公告)号：JP2007295315A
公开(公告)日：2007-11-08
申请号：JP2006121348
申请日：2006-04-25
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： OKUMURA TOMOAKI , YABUNO HIROYUKI
IPC分类号： H03K5/13 , H03L7/00
摘要： PROBLEM TO BE SOLVED: To provide a signal transmission circuit and a signal transmitting method which compensates the phase difference between a plurality of data signals transferred between chips. SOLUTION: The signal transmission circuit comprises output terminals 101-103 for outputting data signals, a first to third delays 11-13 for delaying the phases of the data signals outputted from the plurality of output terminals, a delay value setting unit 14 for setting the delay values to the first to third delays 11-13, a phase difference detector 15 for measuring the phase differences between the data signals outputted from the first to third delays 11-13 to output phase difference information, and a calculator 16 for calculating the compensation values for the delay values used when the first to third delays 11-13 delay the phases of the data signals, based on the phase difference information. The delay value setting unit 14 compensates the delay values of the first to third delays 11-13, based on the compensation values. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供补偿芯片之间传送的多个数据信号之间的相位差的信号传输电路和信号发送方法。解决方案：信号传输电路包括用于输出数据信号的输出端子101-103，用于延迟从多个输出端子输出的数据信号的相位的第一至第三延迟11-13，延迟值设置单元14 用于将延迟值设置为第一至第三延迟11-13，用于测量从第一至第三延迟11-13输出的数据信号之间的相位差以输出相位差信息的相位差检测器15，以及用于基于相位差信息，计算当第一至第三延迟11-13延迟数据信号的相位时使用的延迟值的补偿值。延迟值设定单元14基于补偿值补偿第一至第三延迟11-13的延迟值。版权所有（C）2008，JPO＆INPIT

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