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1. 发明专利

JPH0713946A PROGRAM LOADER 失效
公开(公告)号：JPH0713946A
公开(公告)日：1995-01-17
申请号：JP14459993
申请日：1993-06-16
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MIZUNO MASANOBU
IPC分类号： G06F15/16 , G06F9/445 , G06F15/177
摘要： PURPOSE:To generate a program so as to facilitate the manegement and maintenance of a program source and also to provide an effective program load means by word unit at the time transferring a load object for processing change-over. CONSTITUTION:A first load object file and a second load object file which are generated from the program source where a whole application processing is described are adopted as an input so as to compare data by word unit between the files. An object difference means 31 which picks-up the load destination address and word data of the second load object file concerning the word with data difference so as to generate a stored difference object file and a data transfer means 32 which transfers load object data to the program memory of a processor 4 by word unit are provided so that the down load of object data adding the difference object is executed.

2. 发明专利

JPH03174662A FUNCTION SIMULATION METHOD 失效
公开(公告)号：JPH03174662A
公开(公告)日：1991-07-29
申请号：JP31382689
申请日：1989-12-01
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MIZUNO MASANOBU
IPC分类号： G06F11/25 , G06F11/26 , G06F17/50
摘要： PURPOSE:To improve the processing efficiency of the function simulation by providing a signal value storage means and a flag storage means which stores a flag showing that all bits have the same specific value to set the flag when all bits has the specific value and to write each bit if all bits have no specific value. CONSTITUTION:A flag is set to a flag storage means 5 when the signal values having the fixed number of bits to be written into a signal value storage means 4 have the same signal value, e.g., the unfixed value, the high impedance value, 1 or 0, etc. Then only the set-up of a flag is decided at a flag storage means 5 as long as all signal values have the same unfixed value, the high impedance value, 1 or 0 when the signal value having a fixed bit is read out as the input signal value. Thus the function simulation is carried out at a high speed.

3. 发明专利

JPH03171372A FUNCTION SIMULATING METHOD 失效
公开(公告)号：JPH03171372A
公开(公告)日：1991-07-24
申请号：JP31114889
申请日：1989-11-30
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAKAI YUJI , MIZUNO MASANOBU
IPC分类号： G06F11/25 , G06F11/26 , G06F17/50
摘要： PURPOSE:To easily understand the detailed actions of the function description for the automaton describing task and the transfer description having complicated actions by displaying the function description of a logic circuit after converting it into an intermediate description having a simple and clear action and then carrying out the function simulation. CONSTITUTION:A conversion/display means 12 analyzes the sentence structure and the meaning of the function description 11 of a logic device with this function 11 used as an input. Then the means 12 produces and displays an intermediate description 13 having a simple and clear action and equivalent to the function 11 in terms of the action. A simulation means 14 uses the function 13 produced and displayed by the means 12 as an input and performs the simulation based on the description 13 to output the simulation result 15. Thus the description 13 equivalent to the description 11 of the logic device is produced and displayed for execution of the simulation. As a result, the detailed actions of the automaton description having a complicated action and the task transfer description can be easily understood.

4. 发明专利

JPS63285664A LOGICAL SIMULATION DEVICE 失效
公开(公告)号：JPS63285664A
公开(公告)日：1988-11-22
申请号：JP12192187
申请日：1987-05-19
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MIZUNO MASANOBU
IPC分类号： H03K19/00 , G06F17/50 , G06F19/00
摘要： PURPOSE:To perform the logical simulations at a high speed by carrying out these simulations in parallel with each other. CONSTITUTION:A logical element having a change of the input signal and a wiring are detected out of the data on the connecting relation of logic circuits stored in a memory 14. Then a serial/parallel converting block 17 performs evaluation of the logical element and the wiring in parallel among plural function cells and therefore carrying out the serial/parallel conversion of a data flow to transfer the data on the function information on the logical element and the wiring, the delay information, etc., to an idle function cell via a data bus 20. Each function cell evaluates the output signal value and holds this signal value until the input delay time elapses by the clock signal controlled by a time control block 15. The function cells having the elapsed delay times transfer the data on the output signal value in parallel to a parallel/signal converting block 18 via a data bus 21 and are set under the idle states. In such a way, the logical simulations are carried out at the high speed.

5. 发明专利

JP2003006265A Behavioral model generation method and behavioral model generation device 审中-公开
标题翻译：行为模型生成方法和行为模型生成装置
公开(公告)号：JP2003006265A
公开(公告)日：2003-01-10
申请号：JP2001192295
申请日：2001-06-26
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： OGAWA OSAMU , MIZUNO MASANOBU
IPC分类号： G06F17/50
摘要： PROBLEM TO BE SOLVED: To solve a difficulty in selecting architecture appropriately if system architecture is comparatively evaluated and selected with top-down approach from specification description or functional behavioral description because of no methods available to appropriately estimate performance of a block to be newly implemented on hardware or to perform a high-speed simulation modeling.
SOLUTION: A transition state is assigned to the functional behavioral description using a high-level synthesis means, a cycle delay is counted at a state transition point and a model to add the delay is generated in outputting an outcome of processing. This enables to generate a behavioral model which has a processing delay based on a feasible hardware and can perform the high- speed simulation. This result makes it possible to evaluate the architecture with shorter turnaround time and higher accuracy.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：为了解决如果从规范描述或功能行为描述中进行自上而下的方法相对评估和选择的系统架构来解决选择架构的困难，因为没有可用于适当估计要在新实现的块的性能的方法硬件或执行高速仿真建模。解决方案：使用高级合成装置将过渡状态分配给功能行为描述，在状态转换点对周期延迟进行计数，并且在输出处理结果时产生添加延迟的模型。这使得能够生成具有基于可行硬件的处理延迟并且可以执行高速模拟的行为模型。该结果使得可以以更短的周转时间和更高的精度来评估架构。

6. 发明专利

JP2000020562A METHOD FOR GENERATING SIMULATION TEST BENCH AND DEVICE THEREFOR 失效
公开(公告)号：JP2000020562A
公开(公告)日：2000-01-21
申请号：JP18235898
申请日：1998-06-29
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAKAHASHI HIROSHI , MIZUNO MASANOBU
IPC分类号： G01R31/28 , G01R31/3183 , G06F17/50
摘要： PROBLEM TO BE SOLVED: To make generatable a simulation test bench capable of compression test pattern files of plural input signal lines into one test pattern file thereby reducing the occupied quantity of the test pattern file in a recording medium. SOLUTION: In the case of generating the simulation test bench of a digital LSI circuit with plural input signal lines, test patterns are generated for every input signal line (a step 10), the test patterns with the same input timing are connected by bit connection for at least two or more input lines and the test pattern file to which the data compression is performed is generated (a step 11). And the simulation test bench to be inputted in the corresponding input signal line is generated by reading the test pattern file and performing bit distribution (a step 12).

7. 发明专利

JPH0991316A SIMULATION RESULT DISPLAY DEVICE 失效
公开(公告)号：JPH0991316A
公开(公告)日：1997-04-04
申请号：JP24414695
申请日：1995-09-22
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MIZUNO MASANOBU , KAWAGUCHI KENICHI , TANAKA MASAKAZU
IPC分类号： G06F17/50
摘要： PROBLEM TO BE SOLVED: To provide the simulation result display device which can display a waveform fast even with a large amount of simulation result data and can obtain the display wave which is precise enough for design verification when a circuit simulation result is displayed as a waveform and circuit operation is verified qualitatively for the development of a digital signal processing LSI, etc. SOLUTION: This device selects data out of a signal processing simulation result data sequence and displays a waveform by decreasing the number of data and is equipped with a data selection section specifying means 1 which specifies a section wherein the selection of data is decided in the data sequence, a data selecting means 2 which selects the data having the maximum and minimum signal values out of the data sequence in the section specified by the data selection section specifying means 1, and a drawing means 3 which displays the data selected by the data selecting means 2 as a waveform on a display device 5.

8. 发明专利

JPH0567168A FAULT SIMULATION METHOD FOR LOGIC CIRCUIT 失效
公开(公告)号：JPH0567168A
公开(公告)日：1993-03-19
申请号：JP23016091
申请日：1991-09-10
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： FUKUMOTO YUKIHIRO , MIZUNO MASANOBU
IPC分类号： G06F11/25 , G06F11/26 , G06F17/50
摘要： PURPOSE:To verify a test pattern independently of the description level of a circuit model and to set and verify an arbitrary kind of fault by retrieving a table with an input vector as the key to generate a fault condition list. CONSTITUTION:The fault propagation technique of the simultaneous fault simulation method is used. In the fault simulation method where an output value and a fault state value are unequivocally determined by an input vector at a point of time, a table of correspondence between inputs and kinds of detectable fault is provided, and the input vector at each simulation time is used as the key to retrieve the table. If fault which can be detected by output pins exists for the input vector, a fault state list is generated for output pins, and the test pattern of a module where the output value and the fault state are unequivocally determined by the input vector is verified independently of the description level of the circuit model, and further, an arbitrary kind of fault is set and verified.

9. 发明专利

JPH0440565A FUNCTION SIMULATION METHOD 失效
公开(公告)号：JPH0440565A
公开(公告)日：1992-02-10
申请号：JP14780990
申请日：1990-06-06
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MIZUNO MASANOBU , NAKAYA KAZUE
IPC分类号： G01R31/28 , G06F11/25 , G06F11/26 , G06F17/50
摘要： PURPOSE:To efficiently evaluate the operation of a function element and to execute the simulation at a high speed by providing an operation flag for showing its operation, in the case the function element updates an output signal value to a prescribed signal value which does not depend on an input signal value. CONSTITUTION:The device is provided with an operation flag storage means 4 for storing an operation flag for showing a fact that an operation for updating an output signal of a function element for configuring a logical unit of an object to be simulated to a prescribed signal value which does not depend on an input signal value of the function element is executed. In such a state, at the time of evaluating the function element, in the case of evaluating repeatedly the operation for updating the output signal value of the function element to the prescribed signal value which does not depend on the input signal value, only setting of the operation flag and the decision are executed. Accordingly, the processing for updating the output signal value by a 1-bit unit each time of evaluation and deciding whether the signal value is varied or not is curtailed. In such a way, the function element is evaluated efficiently and the simulation can be executed at a high speed.

10. 发明专利

JPS63102595A PORTABLE TERMINAL EQUIPMENT 失效
公开(公告)号：JPS63102595A
公开(公告)日：1988-05-07
申请号：JP24869386
申请日：1986-10-20
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MIZUNO MASANOBU , BESSHO YOSHIHIRO , TANABE KENZO , KAWAGUCHI KIMIO
IPC分类号： H04Q9/00 , H04L13/00 , H04L29/12
摘要： PURPOSE:To operate the plural pieces of equipment with the same terminal equipment by transmitting an inputted general-use code through a set communication wire. CONSTITUTION:A general-use inputted from a keyboard 1 is transmitted to an equipment 5 main body, converted to a control signal in the internal part of the equipment 5 main body and thus, the action of the equipment is controlled. A communication control equipment 8 and the equipment having a converting table 7 to the general-use code can be all operated by a portable terminal equipment 1 as well as the equipment 5 main body. In the same way, the image data of the common form or the sction condition of all pieces of equipment having a converting table 7 to set a code for a displaying device and a communication control equipment 8 can be displayed in the portable terminal equipment 1.

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