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    • 1. 发明专利
    • VIDEO SIGNAL PROCESSING CIRCUIT
    • JPH10164618A
    • 1998-06-19
    • JP31736796
    • 1996-11-28
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIROOKUMURA NAOJI
    • H04N9/89H04N9/475
    • PROBLEM TO BE SOLVED: To prevent a laterally drawn noise from being generated by the interference of line clock and to provide a satisfactory receiving state, in which the noise is hardly conspicuous, by a little shifting the clock frequency of a line lock PLL circuit from the frequency of the burst clock. SOLUTION: A frequency f2Hz of the line lock clock generated by a line lock PLL circuit 13 is set to a frequency different from a burst lock clock frequency f1Hz. The input signal of A/D converter interfered by the line lock clock is sampled by the burst lock clock and its frequency is different from the frequency of interference, its level is shifted little by little for each sampling point. Further, since the level is changed for each line as well by the jitter or the line lock PLL, a luminance change amount seems changed at random for each pixel. Since the interference level is difference for each pixel, not the laterally drawn low frequency noise but random noise occurs and a picture extremely easy to watch is provided.
    • 2. 发明专利
    • JPH05292474A
    • 1993-11-05
    • JP8851992
    • 1992-04-09
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIRO
    • H04N5/455H04N7/00H04N7/015H04N9/00
    • PURPOSE:To provide a satisfactory receiving state by relaxing the sense of incompatibility caused by the rapid change of picture quality when waveforms are equalized in the middle of viewing by performing the improvement of picture quality such as waveform equalization at the time of moving images. CONSTITUTION:Motion information composed of three bits is transmitted to a still picture discriminating circuit 6 as a control signal in a MUSE signal, for example. At such a time, when this information is '0', a normal state is obtained and when it is '1', completely still pictures are expressed. Therefore, a still picture discriminating signal can be easily obtained from this control signal at a MUSE signal demodulator. The still picture discriminating signal obtained in this way is inputted to a CPU 4 and at the CPU 4, a correcting mode is not started in the case of the completely still picture according to prescribed algorithm, namely, control is performed so as not to switch signals after waveform equalization. Then, the transmitted signal is not switched to the waveform equalized signal during the completely still picture but siwtched to the waveform equalized signals for the first time after moving images appear.
    • 3. 发明专利
    • SATELLITE BROADCASTING RECEIVER
    • JPH04107076A
    • 1992-04-08
    • JP22581590
    • 1990-08-27
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIRO
    • H04N5/20H04B1/08H04N5/445
    • PURPOSE:To let a user know the on-air of other broadcasts than NTSC by ANDing the outputs of a video signal detecting circuit and an NTSC synchronization detecting circuit, and detecting the broadcast other than NTSC in order to operate a display. CONSTITUTION:The output of a video signal processing circuit 6 is inputted through a noise removing circuit 12 to a level detecting circuit 13, and a signal level is detected after DC-converting and averaging it. The signal level is compared with a reference voltage by a comparator circuit 14 in order to detect the presence of the video signals. An NTSC synchronization detecting circuit 9 detects the presence of NTSC signals. The outputs of a video signal detecting circuit 8 and the circuit 9 are ANDed, and the output of an AND circuit 10 is turned to H only in the case of the presence of the video signals and the absence of the NTSC signals. A display device 11, is turned on and off according to the output of the circuit 10, and such display is operated when signals except for the NTSC are received.
    • 4. 发明专利
    • TELEVISION SIGNAL SYSTEM CONVERTER
    • JPH01303996A
    • 1989-12-07
    • JP13497888
    • 1988-06-01
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIRO
    • H04N11/20H04N7/01
    • PURPOSE:To observe an entire pattern by displaying a slave pattern with the same aspect ratio as that of a high definition TV signal in case of displaying the high definition TV signal with different aspect ratio from that of the standard TV signal onto a standard TV receiver. CONSTITUTION:As soon as a high definition TV signal is converted into a scanning line number of the standard TV signal by a scanning line conversion circuit 2, a horizontal/vertical compression circuit 3 generates a slave pattern signal compressed in horizontal and vertical directions. Then an output signal from the scanning line conversion circuit 2 and an output signal from the horizontal/vertical compression circuit 3 are inputted to a pattern synthesis circuit 4 as a signal for master pattern and slave pattern respectively. The pattern synthesis circuit 4 synthesizes two signals so that a slave pattern of the high definition TV signal with a long aspect ratio is displayed on a part of the master pattern whose aspect ratio is 4:3 where both edges are cut off. Thus, the information of both ends of the pattern unable to be observed from the master pattern is observed.
    • 5. 发明专利
    • VERTICAL RESOLUTION CORRECTING CIRCUIT
    • JPS63262978A
    • 1988-10-31
    • JP9660887
    • 1987-04-20
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIROFUJITA MASAAKI
    • H04N7/01
    • PURPOSE:To correct a vertical resolution in a double speed transformation without narrowing the band of a luminance signal by limiting the band of a correcting signal formed from the two luminance signals different in the band. CONSTITUTION:Double speed luminance signals Y5, -Y6 respectively inputted to transistors 18, 19 are added through resistances 25, 26. This addition signal has only the double writing of the double speed taken out by a blanking circuit 16 constituted of an electrolytic capacitor 29 and a transistor 22 to adjust an amplitude by the division of the resistances 25-27, further, a capacitor 32 is connected in parallel to this resistance 27, thereby, the high frequency part component of the correcting signal D2 is deteriorated. Thereby, even when the difference between the double speed luminance signal Y5 and the correcting signal D2 is taken by a differential amplifier constituted of the transistors 20, 21 and a resistance 28 and a constant current source 30, the vertical resolution can be corrected without narrowing the band of the luminance signal.
    • 6. 发明专利
    • COLOR TRANSIENT CORRECTION CIRCUIT
    • JPS62166686A
    • 1987-07-23
    • JP919486
    • 1986-01-20
    • MATSUSHITA ELECTRIC IND CO LTD
    • YAMATE KAZUNORIMIYABE KAZUHIRO
    • H04N9/68
    • PURPOSE:To shorten a color transient period, to reduce a color bleeding and to make a picture clear by turning the first switch circuit on when a differential output is present according to an output pulse of a comparison circuit and turning the second switch on when it is not present to synthesize respective outputs and having the output. CONSTITUTION:A color difference signal 1 is inputted to the first switch circuit 18 and a delay circuit 17 and a delay signal (delayed color difference signal) 16 is inputted to the second switch circuit 19 and a differentiation circuit 3. Then, the color difference signal 16 is differentiated in the differentiation circuit 3, a signal (differentiation waveform) 10 is passed through a full wave rectifier circuit 4, a full wave rectification output 11 is compared with a reference voltage in the comparison circuit 6 to obtain a color transient correction pulse 7. When the pulse 7 is outputted, the switch circuit 18 is turned on, the switch circuit 19 is turned off, the voltage of the color difference signal input 1 is outputted to the output 14. When the pulse 7 is not present, the switch circuit 19 is turned on and the circuit 18 is turned off and the delayed color difference signal 16 is outputted to the output 14.
    • 7. 发明专利
    • TELEVISION RECEIVER
    • JPH11122585A
    • 1999-04-30
    • JP27836097
    • 1997-10-13
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIRONAKANISHI KOICHIIMANAKA HIDEKI
    • H04N5/46H04N7/00
    • PROBLEM TO BE SOLVED: To reduce an opportunity that picture quality of a television receiver using a memory for many functions in common is limited and to drastically improve the operability by using a control means to adaptively change the amount of use of the memory used for decoding of a video signal processing means based on a discrimination result of a signal discrimination means. SOLUTION: In the case that a BS channel set to a competing program recording setting register 9 is a channel for a MUSE broadcast, a microcomputer 7 throws a changeover means 4 to the position of a MUSE decoder when obtaining the detection result of presence of synchronization of a synchronization detection circuit 2-1 and a field memory 3 is used for decoding a MUSE signal. Then the changeover means 6 selects an output of the MUSE decoder 3 as an external monitor output and provides an output. In the case that the BS channel is a channel for an NTSC broadcast, the microcomputer 7 throws the changeover means 4 to the position of an EDTV decoder 1 when receiving the detection result of presence of synchronization of the synchronization detection circuit 2-1 and the field memory 3 is used for processing a signal of an EDTV decoder 1.
    • 8. 发明专利
    • TELEVISION SIGNAL RECEIVER
    • JPH08223499A
    • 1996-08-30
    • JP2791895
    • 1995-02-16
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIRO
    • H04N5/46
    • PURPOSE: To suppress disturbance due to mutual interference of digital signal processing circuits by providing 1st and 2nd switch circuits turning on/off power to the 1st and 2nd digital signal processing circuits and a circuit controlling the switch circuits. CONSTITUTION: n order to prevent disturbance by mutual interference by simultaneous operation of 1st and 2nd system signal processing circuits 1, 2, 1st and 2nd switch circuits 1, 2 switching on/off the power to the 1st and 2nd system signal processing circuits 1, 2, and a control circuit 12 controlling the 1st and 2nd switch circuits 1, 2 are provided. When a digital signal processing circuit 5 of the 1st system signal processing circuit 1 is in use, power, clock signal or a synchronizing signal are not given to a 2nd digital signal processing circuit 9 of the 2nd system to stop the operation of the 2nd digital signal processing circuit 9. Thus, the disturbance by mutual interference by simultaneous operation of the digital signal processing circuits 5, 9 is reduced.
    • 9. 发明专利
    • CLAMP POTENTIAL COMPENSATING CIRCUIT
    • JPH0774982A
    • 1995-03-17
    • JP21961793
    • 1993-09-03
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIYABE KAZUHIRO
    • H04N5/16
    • PURPOSE:To obtain accurate clamp potential by preparing this clamp potential compensating circuit with a clamping circuit, a clamp potential detecting circuit, a reference potential generating circuit, and a comparator circuit and adding a certain potential to the DC potential of a clamped video signal. CONSTITUTION:A feedback clamping circuit is formed by the clamping circuit 1, the clamp potential detecting circuit 2, the reference potential generating circuit 3, and the comparator circuit 4. When an error from an ideal value of clamp potential by the feedback clamping circuit is defined as XV, the clamp potential can be set up to the ideal value by shifting a DC level only by the XV through a DC level shifting circuit 5. Since the error XV is inherent in a signal processing circuit, the error XV should be set up to a value corresponding to the circuit. Since the circuit 5 is connected to the post stage of the clamping circuit 1, an error generated in the signal processing circuit is compensated and ideal clamp potential can be obtained.