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1. 发明专利

JP2004158938A Imaging apparatus 有权
公开(公告)号：JP2004158938A
公开(公告)日：2004-06-03
申请号：JP2002320591
申请日：2002-11-05
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ASADA RYOJI , FUNAKOSHI HIROMASA
IPC分类号： H04N5/232 , H04N5/225 , H04N5/92 , H04N7/01
CPC分类号： H04N7/012 , H04N7/0112
摘要： PROBLEM TO BE SOLVED: To provide an imaging apparatus which converts 24p-image signals in a progressive scan system at a frame frequency of 24 Hz into 60i-signals in an interlace scan system at a field frequency of 60 Hz as a standard television system in a 2:3 pull-down process, and does not generate a transverse stripe, etc. over a screen center to reduce image quality deterioration. SOLUTION: If the output timing of a 24p-image signal from an imaging unit 2 does not agree with the phase of a 60i-vertical synchronizing signal, a delay unit 8 delays the image signal by a time taken for scanning the 60i-signal over a (1/2) field and inputs the delayed signal in a memory 3 to write the 24p-image signal in the memory 3 synchronously with the 60i-vertical synchronizing signal. COPYRIGHT: (C)2004,JPO

2. 发明专利

JP2000196966A HIGH-SENSITIVITY IMAGE PICKUP DEVICE 失效
公开(公告)号：JP2000196966A
公开(公告)日：2000-07-14
申请号：JP37466898
申请日：1998-12-28
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ASADA RYOJI , FUNAKOSHI HIROMASA , MOTODA KAZUMA
IPC分类号： H04N5/243 , H04N5/335 , H04N5/341 , H04N5/347 , H04N5/353 , H04N5/367 , H04N5/372 , H04N5/376
摘要： PROBLEM TO BE SOLVED: To provide a high-sensitivity image pickup device which can be improved in sensitivity by prolonging the storing time and can suppress the floating of a black level and, accordingly, can obtain a high picture quality when the sensitivity of the device is high. SOLUTION: A CCD image pickup element 1 stores videos by converting the videos into charges and outputs the stored charges as image pickup signals. A CCD driving circuit 2 controls the charge storing time of the element 1. A black level control circuit 31 contains a circuit that generates such a black level controlled variable that negates the black level variation in which the level of the image pickup signal corresponding to the dark video outputted from the element 1 changes in accordance with the storing time and controls the level of the image pickup signal corresponding to the dark video based on the black level controlled variable.

3. 发明专利

JP2532619B2 失效
公开(公告)号：JP2532619B2
公开(公告)日：1996-09-11
申请号：JP27868388
申请日：1988-11-04
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ASADA RYOJI , MYAGAWA YASUMI
IPC分类号： G06F13/10 , H04N5/235 , H04N5/335 , H04N5/341 , H04N5/355 , H04N5/361 , H04N5/365 , H04N5/369 , H04N5/3722

4. 发明专利

JPH08140061A TIME COMPRESSION/LINE COMPOSITE CIRCUIT AND IMAGE PICKUP DEVICE USING SAME 失效
公开(公告)号：JPH08140061A
公开(公告)日：1996-05-31
申请号：JP27491894
申请日：1994-11-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SUBE MAKOTO , ASADA RYOJI , NISHIKAWA SHOJI
IPC分类号： H04N5/262 , H04N7/01
摘要： PURPOSE: To provide an inexpensive and compact time compression/line composite circuit by utilizing the 1H memory of a vertical contour emphasis signal preparation circuit. CONSTITUTION: The vertical contour emphasis signal preparation circuit for delaying the input signals of one system for 1H in a memory 1, delaying them for 1H further in the memory 4 and preparing contour emphasis signals by OH, 1H and 2H delay signals is provided with selectors 13 and 16 and a memory control circuit 7. By switching the selector 13, respectively supplying the input signals of two systems to the memory 1 and the memory 4, switching the operation of the memory by the memory control circuit 7, simultaneously performing write to the memory 1 and the memory 4, performing read alternately at each H by a frequency which is the double of the one at the time of the write and switching the selector 16 so as to output the signals of the memory during the read, time compression/line synthesis are performed.

5. 发明专利

JPH06105323A FLESH COLOR DETECTING CIRCUIT AND IMAGE PICKUP DEVICE 失效
公开(公告)号：JPH06105323A
公开(公告)日：1994-04-15
申请号：JP25431892
申请日：1992-09-24
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： YAMAGUCHI JUNJI , ASADA RYOJI , NISHIKAWA SHOJI
IPC分类号： H04N9/64
摘要： PURPOSE:To provide the flesh color detecting circuit which discriminates a flesh-colored area from a video signal and outputs a value showing the flesh- colored degree of the area. CONSTITUTION:R, G and B signals are arithmetically converted into chrominance signals I and Q by a chrominance signal generating circuit 201 and outputted to a flesh-colored degree judge circuit 202. The chrominance signal I is subtracted from a set value Iset of the signal I by a subtracter 101 and the absolute value is calculated by an absolute value circuit 103 in the next stage. Further, a coefficient k1 is multiplied by a multiplier 105. Similarly, the chrominance signal Q is subtracted from a set value Qset of the signal Q by a subtracter 102, and the absolute value is calculated by an absolute value circuit 104 in the next stage. Further, a coefficient k2 is multiplied by a multiplier 106. The output signal from the multiplier 105 is subtracted from a third set value Rset by a subtracter 107 and further, the output signal of the multiplier 106 is subtracted by a subtracter 108. A negative clip circuit 109 replaces all the negative values of the output signal from the subtracter 108 with zero and defines it as the output signal of the flesh color detecting circuit.

6. 发明专利

JPH0630324A IMAGE PICKUP DEVICE COMPATIBLE WITH WIDE PATTERN 失效
公开(公告)号：JPH0630324A
公开(公告)日：1994-02-04
申请号：JP18204492
申请日：1992-07-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ASADA RYOJI , NISHIKAWA SHOJI
IPC分类号： H04N5/232 , H04N5/14 , H04N5/335 , H04N5/378 , H04N7/015
摘要： PURPOSE:To realize the image pickup device compatible with a wide pattern with a small circuit scale without the addition of a memory or the like by using a signal processing circuit for the standard television receiver image pickup device and an LSI (LSI for digital signal processing and LSI for data detection or the like) in common. CONSTITUTION:A wide pattern image pickup signal is converted into a digital signal by an A/D converter 4, the signal is subjected to 1/n division at a divider circuit 5 based on a frequency of 1/n frequency division of a read clock fck of an image pickup element compatible with the wide pattern and n kinds of clocks whose phase is deviated by 360 deg./n respectively, each signal subjected to 1/n frequency division is digital-processed by digital signal processing LSIs 6, 7, a synthesis circuit 8 synthesizes the signals into a wide pattern image pickup signal of an original fck rate and a D/A converter 4 converts the synthesized digital signal into an analog signal. Thus, signal processing circuit and LSIs for the image pickup device for a conventional standard television receiver are used in common for the image pickup device compatible with the wide pattern with a small circuit scale.

7. 发明专利

JPH05183397A PATTERN GENERATION CIRCUIT 失效
公开(公告)号：JPH05183397A
公开(公告)日：1993-07-23
申请号：JP34612191
申请日：1991-12-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ASADA RYOJI , NISHIKAWA SHOJI
IPC分类号： H03K3/78 , H03K4/02 , H04N17/00
摘要： PURPOSE:To provide a pattern generation circuit with constitution capable of easily changing a pattern change position with a small circuit scale by changing the preset value of a register. CONSTITUTION:A counter 17 is reset by a synchronizing signal HD, and counts the number of clocks. A control circuit 20 outputs a control pulse so that the register 18 in which the clocks from the reset position of the counter 17 to a change position are stored can be selected by a select circuit 19. The first value of the register 18 is compared with the value of the counter 17 by a comparator 21, and the pattern change position is generated when coincidence can be obtained. The counter 17 is reset by such pulse. Simultaneously, the control circuit 20 generates a select pulse so that the register 18 in which the values of clocks from the pattern change position at that time to the next pattern change position are stored can be selected by the select circuit 19.

8. 发明专利

JPH0575927A FLAW CORRECTION CIRCUIT 失效
公开(公告)号：JPH0575927A
公开(公告)日：1993-03-26
申请号：JP26727691
申请日：1991-09-17
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ASADA RYOJI , NISHIKAWA SHOJI
IPC分类号： H04N5/335 , H04N5/367 , H04N5/372 , H04N5/376 , H04N5/378
摘要： PURPOSE:To correct many flaws with a simple circuit constitution by making it unnecessary to prepare a memory corresponding to the size of a field memory or a frame memory to output a flaw correction control signal for correcting flaws on a CCD. CONSTITUTION:A storing means 7a in a microcomputer 7 stores the position of a flaw as a horizontal picture element position of the CCD 1 and the number of lines obtained by dividing vertical lines in each prescribed lines. Those data are set up in registers 8a, 8b in accordance with the scanning of the CCD 1 and scanning positions are counted by counters 9a, 9b. When the flaw position coincides with the scanning position, a coincidence signal is outputted from a comparing means 10 to correct the flaw.

9. 发明专利

JPH0548947A COLOR CAMERA 失效
公开(公告)号：JPH0548947A
公开(公告)日：1993-02-26
申请号：JP22482991
申请日：1991-08-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ASADA RYOJI , NISHIKAWA SHOJI
IPC分类号： H04N5/21 , H04N5/228 , H04N9/04 , H04N9/64 , H04N9/65
摘要： PURPOSE:To perform the high resolution and to generate the high picture quality video signal of a high SN ratio by providing a circuit to remove the high area component of a luminance signal in the condition to hold a noise removing effect in order to remove the cross color of a video signal. CONSTITUTION:A limitter circuit 20 to clip the-output of a two-dimensional band pass filter 12 and a gain control circuit 21 to variable-amplify the output are provided. A gain control circuit 22 to variable-amplify other output of the two-dimensional band pass filter 12 is provided, and both outputs of gain control circuits 21 and 22 are added by an adder 23. The output of the adder 23 is subtracted by a subtracter 24 from the 1H delayed luminance signal, the delaying signal of an enhancer circuit 13 to generate an outline signal is added to the output by an adder 18, synthesized with a color difference signal by an encoder 11, and then, a video signal having a high SN value is obtained.

10. 发明专利

JPH03120963A CONTOUR CORRECTION DEVICE 失效
公开(公告)号：JPH03120963A
公开(公告)日：1991-05-23
申请号：JP25901589
申请日：1989-10-04
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ASADA RYOJI
IPC分类号： H04N5/208
摘要： PURPOSE:To clip a noise component emphasized by adaptive emphasis by setting larger coring level to a luminance signal whose dark level is deeper. CONSTITUTION:An input and output characteristic of a data conversion circuit 14 is shown in figure (i). That is, the input level is converted into an output level in such a way that when the input level is M1 or below (corresponding to a luminance signal level with no adaptive emphasis applied thereto), an output signal level of an inverting amplifier 13 at a time t1 is 0, when the input level is from M1 to MAX (corresponding to a luminance signal level with adaptive emphasis applied thereto), an output signal level of an inverting amplifier 13 at a time t1 is increased monotonously, and when the input level is MAX, the output data is a maximum level of CL1. When a signal shown in figure (d) is inputted to the data conversion circuit 14 having the input and output characteristic, a coring level data shown in figure (f) is obtained. The coring level data is. employed for the coring circuit 11, which controls adaptively the coring level inversely to the level increase/decrease of the luminance signal. Thus, noise increased with adaptive emphasis is eliminated.

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