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1. 发明专利

JP3834166B2 Amplitude calculation circuit 有权
公开(公告)号：JP3834166B2
公开(公告)日：2006-10-18
申请号：JP19247399
申请日：1999-07-07
申请人：日本電気株式会社
发明人：正貴市原
IPC分类号： H04L27/20 , H04N9/65 , H03F1/32 , H04L27/00 , H04L27/36 , H04N9/66
CPC分类号： H04L27/368 , H03F1/3247 , H03F1/3294 , H03F2201/3233

2. 发明专利

JP2005287063A Digital video encoder 有权
标题翻译：数字视频编码器
公开(公告)号：JP2005287063A
公开(公告)日：2005-10-13
申请号：JP2005117860
申请日：2005-04-15
申请人： Rohm Co Ltd , ローム株式会社
发明人： KAWAMURA YASUNORI
IPC分类号： H04N5/14 , H03M1/74 , H04N9/65
摘要： PROBLEM TO BE SOLVED: To provide a digital video encoder whose power consumption is reduced by improving its D/A converter part.
SOLUTION: D/A converters 21Y, 21U, 21V in the D/A converter part 2 convert a digital luminance signal Y
D , a digital chroma signal C
D and a digital composite signal V
D generated by an encoder part 1 into an analog luminance signal Y
A , an analog chroma signal C
A and an analog composite signal V
A , respectively. In the D/A converters 21Y, 21U, 21V, a constant current source is on/off-controlled depending on the input digital signals to output currents.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供通过改进其D / A转换器部分来降低功耗的数字视频编码器。解决方案：D / A转换器部分2中的D / A转换器21Y，21U，21V将数字亮度信号Y D ，数字色度信号C D 以及由编码器部分1产生的模拟亮度信号Y A 的模拟色信号C A 和模拟复合信号V A 。在D / A转换器21Y，21U，21V中，恒定电流源根据输入的数字信号而导通/截止以输出电流。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2005167997A Color signal demodulating apparatus 有权
标题翻译：彩色信号解调装置
公开(公告)号：JP2005167997A
公开(公告)日：2005-06-23
申请号：JP2004325574
申请日：2004-11-09
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MATSUMURA TOSHIHIRO , MIYASHITA KAZUYA
IPC分类号： H04N9/65
摘要： PROBLEM TO BE SOLVED: To provide a color signal demodulating apparatus which conducts receiving/modulation of a color signal by an NTSC system and a PAL system in the same circuit, even under deterioration conditions such as a weak electric field or a burst compression. SOLUTION: The color signal modulating apparatus of the NTSC system consists of a clock timing changing circuit 11 to burst-lock a phase each line deviated by 90 degrees, and of a phase axis rotation circuits 22a and 22b to achieve a phase axis rotation calculation, whereby the conversion of the phase axis of a burst signal is achieved. Modulation of the color signal of the PAL system, in addition to the modulation of the color signal of the NTSC system, is thereby achieved; the modulation of the color signal by using a common device is achieved, depending on no broadcasting system, such as the NTSC and the PAL system; and the modulation of the color signal is achieved, even under deteriorated conditions such as weak electric field or burst compression. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：解决的问题：即使在诸如弱电场或突发之类的恶化条件下，也可以提供一种彩色信号解调装置，它通过同一电路中的NTSC系统和PAL系统进行彩色信号的接收/调制压缩。解决方案：NTSC系统的彩色信号调制装置由时钟定时改变电路11和相位轴旋转电路22a和22b组成，每个时钟定时改变电路11对每一行偏离90度的相位进行突发锁定，以实现相位轴旋转计算，从而实现突发信号的相位轴的转换。因此，除了NTSC制式的色彩信号的调制之外，还可以调制PAL系统的彩色信号。根据没有广播系统，例如NTSC和PAL系统，实现使用公共设备对彩色信号的调制; 并且即使在诸如弱电场或突发压缩的恶化条件下也可以实现彩色信号的调制。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP3652009B2 Clock Generator 失效
公开(公告)号：JP3652009B2
公开(公告)日：2005-05-25
申请号：JP14536396
申请日：1996-06-07
申请人：ローム株式会社
发明人：泰則河村
IPC分类号： G09G1/16 , G09G5/18 , H03L7/18 , H04N5/06 , H04N5/073 , H04N5/12 , H04N5/46 , H04N7/01 , H04N9/44 , H04N9/475 , H04N9/64 , H04N9/65
CPC分类号： H04N9/642 , G09G1/16 , G09G5/18 , H04N5/06 , H04N5/073 , H04N5/126 , H04N5/46 , H04N9/641

5. 发明专利

JP2005045674A Device and method for generating trigonometric function wave, and device and method for outputting color signal 审中-公开
标题翻译：用于产生三角函数波的装置和方法，以及用于输出彩色信号的装置和方法
公开(公告)号：JP2005045674A
公开(公告)日：2005-02-17
申请号：JP2003279391
申请日：2003-07-24
申请人： Kyoshin Technosonic Co Ltd , 共信テクノソニック株式会社
发明人： MATSUSHITA KAZUFUMI , SUGI SHUICHI
IPC分类号： H04N9/65 , H03B28/00
摘要： PROBLEM TO BE SOLVED: To provide a DDS (direct digital synthesizer) circuit as a trigonometric function wave generating device whose cost can be suppressed.
SOLUTION: This trigonometric function wave generating device is configured as the following. A phase incremental value θ is calculated, and a sawtooth wave SW is outputted on the basis of a phase integrated value θ
1 obtained by calculating the phase incremental value θ. A parabolic signal P is outputted on the basis of the sawtooth wave SW. An error between the parabolic signal P and a sinusoidal signal is corrected for each phase X and the sinusoidal signal is outputted as a sinusoidal signal W1. In comparison with when data are read from a ROM in each phase to generate a sinusoidal signal or when Taylor series expansion is used to generate a sinusoidal signal, it is possible to easily output the sinusoidal signal W1 obtained by suppressing an error of a sinusoidal signal with a relatively small circuit scale to be able to suppress cost.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种DDS（直接数字合成器）电路作为可以抑制成本的三角函数波发生装置。
解决方案：该三角函数波生成装置配置如下。计算出相位增量值θ，并且通过计算相位增量值θ获得的相位积分值θ 1 输出锯齿波SW。基于锯齿波SW输出抛物线信号P. 对于每个相位X校正抛物线信号P和正弦信号之间的误差，并且将正弦信号作为正弦信号W1输出。与每相中的ROM读取数据以产生正弦信号相比，当使用泰勒级数展开来产生正弦信号时，可以容易地输出通过抑制正弦信号的误差而获得的正弦信号W1 具有相对较小的电路规模以能够抑制成本。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP3601748B2 A method of generating a color imaging device and a digital component signal 失效
公开(公告)号：JP3601748B2
公开(公告)日：2004-12-15
申请号：JP28138596
申请日：1996-10-01
申请人：ソニー株式会社
发明人：敏生吉井
IPC分类号： H04N9/07 , H04N9/64 , H04N9/65 , H04N11/06 , H04N11/24

7. 发明专利

JP3460786B2 Camera system 失效
公开(公告)号：JP3460786B2
公开(公告)日：2003-10-27
申请号：JP23164197
申请日：1997-08-28
申请人：リズム時計工業株式会社
发明人：一則阿部
IPC分类号： H04N9/04 , H04N9/45 , H04N9/64 , H04N9/65

8. 发明专利

JP2003153298A VIDEO ENCODER AND IMAGE PROCESSING SYSTEM USING THE SAME 审中-公开
公开(公告)号：JP2003153298A
公开(公告)日：2003-05-23
申请号：JP2001349024
申请日：2001-11-14
申请人： SONY CORP
发明人： HAKOMORI ATSUSHI
IPC分类号： H04N9/65 , H04N9/64 , H04N9/68 , H04N11/14
摘要： PROBLEM TO BE SOLVED: To provide a video encoder capable of adjusting output level and of more effectively making use of the performance of the device of the poststage and an image processing system using the same. SOLUTION: The video encoder is provided with a level adjusting circuit 157 which adjusts the output levels of an inputted brightness signal Y152, a color signal C153, and a composite video signal CVBS by adding DC offset meeting a value SV previously set in a register or the like for outputting to a display device 17. This encoder adjusts the output levels to more effectively make use of the performance of a device, including the driver of the poststage.

9. 发明专利

JP2001024715A AMPLITUDE CALCULATION CIRCUIT 失效
公开(公告)号：JP2001024715A
公开(公告)日：2001-01-26
申请号：JP19247399
申请日：1999-07-07
申请人： NEC CORP
发明人： ICHIHARA MASAKI
IPC分类号： H04N9/65 , H03F1/32 , H04L27/00 , H04L27/20 , H04L27/36 , H04N9/66
摘要： PROBLEM TO BE SOLVED: To provide an amplitude calculation circuit which accurately calculates amplitude in a very small circuit scale with a very low power consumption. SOLUTION: Inputted I (in-phase component) and Q (quadrature component) base band signals are converted to positive values by absolute value circuits 111 and 112 to become an input vector Vin.0. A phase rotation circuit (R0) 101 rotates the input vector Vin.0 by θ=45 deg. clockwise, to increase the amplitude Vin.0 by l/cos(θ0) times and outputs an output vector Vout.0. This output vector is converted to an absolute value by an absolute value circuit 113 to obtain a vector Vin.1 which is symmetrical with respect to the X axis. Hereafter, this operation is repeated in phase rotation circuits (R1) 102, (R2) 103, (R3) 104, (R4) 105 and in absolute value circuits 113 to 116.

10. 发明专利

JP2000341714A VIDEO TRANSMITTER 失效
公开(公告)号：JP2000341714A
公开(公告)日：2000-12-08
申请号：JP15274199
申请日：1999-05-31
申请人： TOSHIBA CORP
发明人： OGASAWARA NAGAHARU , SHINOHARA NOBUTAKA , KUMAGAI YASUTAKA , SHIMIZU NOBUKAZU
IPC分类号： H04N11/06 , H04N9/44 , H04N9/65 , H04N9/66 , H04N11/24
摘要： PROBLEM TO BE SOLVED: To attain A/D conversion based on a synchronizing sampling method and to make it possible to transmit also a video signal having much jitter at high quality by transmitting a digital video signal read out by a reading means for reading out video signal data on the basis of a smoothed clock signal. SOLUTION: An A/D conversion part 110 converts a video signal of analog signal inputted through a change-over switch 104 into a digital signal by using a sampling signal generated from a sampling signal generation part 109. A clock extraction part (CLK extraction part) 111 extracts a clock signal including jitter from the digital video signal outputted from the A/D conversion part 110. The video signal is written in a memory 112 at the timing of the extracted clock signal. The clock signal extracted from the video signal inputted to the memory 112 is read out by a clock signal smoothed by a PLL (smoothing) circuit 113 and transmitted.

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