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    • 1. 发明专利
    • Ceramic wiring board for probe card, and probe card using the same
    • 用于探针卡的陶瓷接线板和使用其的探针卡
    • JP2012073162A
    • 2012-04-12
    • JP2010219063
    • 2010-09-29
    • Kyocera Corp京セラ株式会社
    • IMANAKA KAZUYAFURUKUBO YUYA
    • G01R1/073H01L21/66H05K1/03
    • PROBLEM TO BE SOLVED: To provide a ceramic wiring board for a probe card in which positional deviation of a measurement terminal provided to the ceramic wiring board for the probe card and a measurement pad formed on a Si wafer is small, and which rarely causes defective appearance due to adhesion of a foreign substances, and to provide the probe card using the same.SOLUTION: A ceramic sintered body contains 2.0 to 4.0 mass% of Mn in MnOequivalent, 4.0 to 8.0 mass% of Ti in TiOequivalent, and 0.4 to 2.1 mass% of Mo in MoOequivalent in terms of 100 mass% of total amount of Al and Si contained in the ceramic sintered body in AlOand SiOequivalent respectively.
    • 要解决的问题:提供一种用于探针卡的陶瓷布线板,其中,提供给用于探针卡的陶瓷布线板的测量端子和形成在Si晶片上的测量垫的位置偏差小,并且其中 很少由于外来物质的粘附而引起外观不良,并且提供使用其的探针卡。

      解决方案:陶瓷烧结体在Mn 2 O 3 中含有2.0〜4.0质量%的Mn,4.0〜 8.0质量%的TiO 2中的Ti 2 当量,MoO 3 中的Mo为0.4〜2.1质量% Al 3 中的陶瓷烧结体中所含的Al和Si的总量的质量%,SiO 2 等效。 版权所有(C)2012,JPO&INPIT

    • 2. 发明专利
    • Ceramic wiring board for probe card and probe card using the same
    • 用于探针卡和探针卡的陶瓷接线板
    • JP2011208980A
    • 2011-10-20
    • JP2010074576
    • 2010-03-29
    • Kyocera Corp京セラ株式会社
    • FURUKUBO YUYANAKAYAMA TORU
    • G01R1/073G01R31/26H01L21/66H01L23/15H05K3/46
    • PROBLEM TO BE SOLVED: To provide a ceramic wiring board for probe card which has low wiring resistance, in which positional shift between a probe pin provided at the ceramic wiring board for probe card and a measurement pad formed on a surface of a Si wafer is small during a heat load test, and which can be suitably used for inspection of electric characteristics, and to provide a probe card using the same.SOLUTION: In the ceramic wiring board for probe card including: a signal wiring layer having the main ingredient of at least one kind of conductive material selected from copper, tungsten, and molybdenum, as a conductive layer, between layers of ceramic insulating layers of an insulating substrate on which the plurality of ceramic insulating layers are laminated; and a ground wiring layer, the ceramic insulating layer includes a mullite-based sintered body, and the ceramic insulating layer in contact with the ground wiring layer, from among the ceramic insulating layers, includes a needle-like alumina crystal having an aspect ratio of four or more on a surface of the ceramic insulating layer.
    • 要解决的问题:提供一种布线电阻低的用于探针卡的陶瓷布线板,其中设置在探针卡的陶瓷布线板上的探针与形成在Si晶片表面上的测量垫之间的位置偏移为 在热负荷试验中较小,可以适合用于电气特性的检查,并提供使用该特性的探针卡。解决方案:在用于探针卡的陶瓷布线板中,包括:信号布线层,其主要成分为 选自铜,钨和钼中的至少一种导电材料作为导电层,在绝缘基板的层叠多层陶瓷绝缘层的陶瓷绝缘层之间; 和接地布线层,所述陶瓷绝缘层包括莫来石系烧结体,并且与所述接地布线层接触的所述陶瓷绝缘层,从所述陶瓷绝缘层中,包括具有长宽比的针状氧化铝晶体 四个或更多个在陶瓷绝缘层的表面上。
    • 3. 发明专利
    • Wiring board for probe card, and probe card using the same
    • 用于探针卡的接线板和使用该卡的探针卡
    • JP2010054323A
    • 2010-03-11
    • JP2008219244
    • 2008-08-28
    • Kyocera Corp京セラ株式会社
    • YAMAMOTO KOJIHASEGAWA TOMOHIDEFURUKUBO YUYAMORI KATSUHITO
    • G01R1/073H01L23/12H01L23/13H05K1/11H05K3/46
    • PROBLEM TO BE SOLVED: To provide a wiring board for a probe card which includes wiring containing a main component as a composite conductor including a low-resistance conductor and a high-melting-point conductor, a main surface area of 700 cm 2 or more and a thickness of 4.5 mm or more, improves the dimension accuracy and is excellent in the planarity, and the probe card using it. SOLUTION: A signal wiring layer 12 and a grounding wiring layer 13 are provided between layers within an insulating substrate 1 in which a plurality of the insulating layers including an alumina sintered element are laminated. The signal wiring layer 12 contains the main component as the composite conductor including at least one low-resistance conductor selected from a group of Cu, Ag and Au of 25-50 mass% and the high-melting-point conductor including at least one of Mo and W of 50-75 mass%. A ratio of an area of the signal wiring layer 12 to the main surface area between the layers is 20% or less. The grounding wiring layer contains the main component as the high-melting-point conductor including at least one of Mo and W. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:为了提供一种探针卡的布线板,其包括包含作为包括低电阻导体和高熔点导体的复合导体的主要成分的布线,主表面积为700cm < SP> 2< / SP>以及厚度为4.5mm以上,提高了尺寸精度,并且平坦度优异,并且使用它的探针卡。 解决方案:在层叠有包括氧化铝烧结元件的多个绝缘层的绝缘基板1内的层之间设置信号布线层12和接地布线层13。 信号布线层12含有作为复合导体的主要成分,该复合导体包含从25〜50质量%的Cu,Ag,Au的组中选出的至少一种低电阻导体,高熔点导体包含以下各项中的至少一种: Mo和W为50-75质量%。 信号布线层12的面积与层间的主面积的比例为20%以下。 接地布线层包含作为包含Mo和W中的至少一个的高熔点导体的主要成分。(C)2010,JPO&INPIT
    • 4. 发明专利
    • Ceramic wiring board for probe card and probe card using the same
    • 用于探针卡和探针卡的陶瓷接线板
    • JP2012127905A
    • 2012-07-05
    • JP2010281568
    • 2010-12-17
    • Kyocera Corp京セラ株式会社
    • FURUKUBO YUYANAKAYAMA TORUIMANAKA KAZUYA
    • G01R1/073H01L21/66
    • PROBLEM TO BE SOLVED: To provide a ceramic wiring board for a probe card, which hardly causes displacement between a measuring terminal disposed on the ceramic wiring board for a probe card and a measuring pad formed on a surface of a Si wafer during a heat load test, has no poor appearance with foreign matter adhesion, and achieves high chemical resistance; and a probe card using the same.SOLUTION: A ceramic sintered body contains 2.0 to 4.0 pts.mass of Mn in terms of MnO, 4.0 to 8.0 pts.mass of Ti in terms of TiO, and 0.4 to 1.2 pts.mass of Mo in terms of MoOrelative to 100 pts.mass of mullite, with grain boundaries having W-Mo alloy. In X-ray diffraction, the ceramic sintered body has a ratio of the diffraction intensity of the main peak of the Mo-W alloy to the diffraction intensity of the main peak of the mullite of 0.17 to 0.90.
    • 要解决的问题:提供一种用于探针卡的陶瓷布线板,其在布置在用于探针卡的陶瓷布线板上的测量端子和形成在Si晶片的表面上的测量垫之间几乎不发生位移 热负荷试验,外来物质附着性差,耐化学性高; 和使用其的探针卡。 解决方案:陶瓷烧结体以Mn 2 O 3 含有2.0〜4.0质量%的Mn, 以TiO 2 为4.0〜8.0质点的Ti,MoO 3 为0.4〜1.2质量度的Mo, SB>相对于100pts.mass的莫来石,其晶界具有W-Mo合金。 在X射线衍射中,陶瓷烧结体具有Mo-W合金的主峰的衍射强度与莫来石的主峰的衍射强度的比值为0.17〜0.90。 版权所有(C)2012,JPO&INPIT
    • 5. 发明专利
    • Wiring board for probe card and probe card using the same
    • 用于探针卡的接线板和使用该卡的探针卡
    • JP2011153907A
    • 2011-08-11
    • JP2010015429
    • 2010-01-27
    • Kyocera Corp京セラ株式会社
    • NAKAYAMA TORUFURUKUBO YUYA
    • G01R1/073H01L21/66
    • PROBLEM TO BE SOLVED: To provide a wiring board for a probe card and the probe card using the same which, in a heat load test, has a small position displacement between a measuring terminal disposed on the wiring board for the probe card and a measuring pad formed on the surface of a Si wafer and can be suitably used for electrical characteristics inspection.
      SOLUTION: The wiring board for the probe card includes an insulating base, and an internal wiring layer consisting of a composite conductor of copper and tungsten disposed in this insulating base, wherein the insulating base is formed with a ceramic sintered body which has mullite as a main component and one selected from spinel, zirconia and forsterite.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种用于探针卡的布线板和使用该布线板的探针卡,在热负荷测试中,在布置在探针卡的布线板上的测量端子之间具有小的位置位移 以及形成在Si晶片的表面上的测量焊盘,可以适用于电气特性检查。 解决方案:用于探针卡的布线板包括绝缘基底和布置在该绝缘基底中的由铜和钨的复合导体组成的内部布线层,其中绝缘基底形成有陶瓷烧结体,该陶瓷烧结体具有 莫来石为主要成分,选自尖晶石,氧化锆和镁橄榄石。 版权所有(C)2011,JPO&INPIT
    • 6. 发明专利
    • Ceramic wiring board for probe card, and probe card using the same
    • 用于探针卡的陶瓷接线板和使用其的探针卡
    • JP2011134753A
    • 2011-07-07
    • JP2009290368
    • 2009-12-22
    • Kyocera Corp京セラ株式会社
    • FURUKUBO YUYAYAMAMOTO KOJINAKAYAMA TORU
    • H05K3/46G01R1/073
    • PROBLEM TO BE SOLVED: To provide a ceramic wiring board for a probe card that has low wiring resistance and a small position shift between a probe pin provided to the ceramic wiring board for the probe card and a measurement pad formed on a surface of an Si wafer in a thermal load test, and is suitably usable for inspection of electric characteristics, and a probe card using the same. SOLUTION: The ceramic wiring board 1 for the probe card includes an insulating base 11 made of a ceramic sintered compact including mullite as a main crystal phase, and a composite conductor of copper and tungsten which is provided in the insulating base 11 and has a composition of 40 to 60 vol.% copper and 40 to 60 vol.% tungsten, so that the probe card 2 can be obtained which has a small position shift between a measurement terminal provided to the ceramic wiring board 1 for the probe card and a measurement pad formed on the surface of the Si wafer in the thermal load test, and is suitably usable for the inspection of the electric characteristics. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种用于探针卡的陶瓷布线板,其布线电阻低,并且在设置在用于探针卡的陶瓷布线板的探针与位于表面上的测量垫之间的位置偏移小 的热负荷试验中的Si晶片,并且适合用于电特性的检查,以及使用该Si晶片的探针卡。 解决方案:用于探针卡的陶瓷布线板1包括由包括莫来石作为主晶相的陶瓷烧结体制成的绝缘基座11和设置在绝缘基座11中的铜和钨的复合导体, 具有40至60体积%的铜和40至60体积%的钨的组成,使得可以获得在提供给用于探针卡的陶瓷布线板1的测量端之间的位置偏移小的探针卡2 以及在热负荷试验中形成在Si晶片的表面上的测量焊盘,并且适合用于检查电气特性。 版权所有(C)2011,JPO&INPIT
    • 7. 发明专利
    • Ceramic circuit board for probe card and probe card using the same
    • 用于探针卡和探针卡的陶瓷电路板
    • JP2012132823A
    • 2012-07-12
    • JP2010286107
    • 2010-12-22
    • Kyocera Corp京セラ株式会社
    • NAKAYAMA TORUFURUKUBO YUYAIMANAKA KAZUYA
    • G01R1/073H01L21/66
    • PROBLEM TO BE SOLVED: To provide a ceramic circuit board for probe cards configured to reduce displacement between a measuring terminal provided on the ceramic circuit board for the probe card and a measurement pad formed on the surface of a Si wafer in a heat load test and having a via hole conductor with a small resistance change in a chemical resistance test, and to provide a probe card using the same.SOLUTION: The ceramic circuit board for probe cards includes a via hole conductor primarily consisting of molybdenum in an insulating base consisting of a mullite-based sintered body. The via hole conductor includes 0.8-8.2 pts.mass of titanium in terms of TiOand 1.4-3.4 pts.mass of manganese in terms of MnO with respect to 100 pts.mass of molybdenum.
    • 要解决的问题:提供一种用于探针卡的陶瓷电路板,其被配置为减小设置在用于探针卡的陶瓷电路板上的测量端子与形成在Si晶片表面上的测量焊盘之间的位移 负载试验和具有耐化学性试验中电阻变化小的通孔导体,并提供使用该通孔导体的探针卡。 解决方案:用于探针卡的陶瓷电路板包括主要由钼构成的通孔导体,绝缘基体由莫来石基烧结体组成。 通孔导体包含0.8-8.2质量份的钛,以TiO 2 和1.4-3.4质量度的锰,以MnO计相对于100点 的钼。 版权所有(C)2012,JPO&INPIT
    • 8. 发明专利
    • Ceramic multilayer substrate
    • 陶瓷多层基板
    • JP2008109063A
    • 2008-05-08
    • JP2006319956
    • 2006-11-28
    • Kyocera Corp京セラ株式会社
    • FURUKUBO YUYAYAMAMOTO SENTARO
    • H05K3/46B28B11/14H05K1/02H05K3/00
    • PROBLEM TO BE SOLVED: To provide a ceramic multilayer substrate of high dimensional accuracy, which can be split by a splitting groove.
      SOLUTION: The ceramic multilayer substrate is provided with respectively sintered first insulating layer 3 and second insulating layer 5 of different contraction start temperatures, an outermost layer 11 comprises the first insulating layers 3 and 11, the second insulating layers 5 and 13, laminated adjacent to the inner side of the first insulating layers 3 and 11, are provided, and the splitting groove 7 is formed to the middle of the first insulating layers 3 and 11. Thus, the first insulating layers 3 and 11 are not completely partitioned in the adjacent substrate region, high-contraction suppression effect in the surface direction of the entire ceramic multilayer substrate 1 can be maintained and substantially uniformized, and the ceramic multilayer substrate 1 of high dimensional accuracy which can be easily split by the splitting groove 7 is provided.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供可以通过分割槽分裂的高尺寸精度的陶瓷多层基板。 解决方案:陶瓷多层基板设有具有不同收缩开始温度的分别烧结的第一绝缘层3和第二绝缘层5,最外层11包括第一绝缘层3和11,第二绝缘层5和13, 并且分隔槽7形成在第一绝缘层3和11的中间。因此,第一绝缘层3和11不完全分隔 在相邻的基板区域中,能够维持整个陶瓷多层基板1的表面方向的高收缩抑制效果,并且基本上均匀化,能够容易地被分割槽7分割的高尺寸精度的陶瓷多层基板1为 提供。 版权所有(C)2008,JPO&INPIT
    • 9. 发明专利
    • Wiring board and method of manufacturing the same
    • 接线板及其制造方法
    • JP2007294926A
    • 2007-11-08
    • JP2007082465
    • 2007-03-27
    • Kyocera Corp京セラ株式会社
    • FURUKUBO YUYAKAWAI SHINYATERAO SHINYAMATSUMOTO HISATO
    • H05K3/46H01L23/12
    • H01L2224/48091H01L2224/48227H01L2924/181H01L2924/19105H01L2924/00012H01L2924/00014
    • PROBLEM TO BE SOLVED: To provide a wiring board not allowing a swelling to occur even if baked in a non-oxidation atmosphere.
      SOLUTION: A method of manufacturing a wiring board includes: a step A of preparing a green sheet A mainly composed of a glass powder A that is crystallized during baking and containing an organic binder, and a green sheet B mainly composed of a glass powder B and containing the organic binder; a step B of forming a wiring layer mainly composed of copper on at least one surface of the green sheet A and the green sheet B; a step C of preparing a laminated body by laminating the green sheet A and the green sheet B, with the green sheet A disposed on an outermost layer; and a step D of baking the laminated body at a baking temperature from 750 to 1,000°C in a non-oxidation atmosphere. The glass powder A is used with a minimum viscosity of ≥10
      6 Pa s during baking, and crystallinity of ≥90 mass% after baking.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供即使在非氧化气氛中烘烤也不会发生溶胀的布线板。 < P>解决方案:制造布线板的方法包括:制备主要由烘烤结晶并含有有机粘合剂的玻璃粉末A组成的生片A的步骤A和主要由 玻璃粉B并含有机粘合剂; 在生坯片A的至少一个表面和生片B上形成主要由铜构成的布线层的工序B; 通过层压生片A和生片B制备层压体的步骤C,生片A设置在最外层上; 以及在非氧化气氛中在750〜1000℃的烘烤温度下烧结层叠体的工序D. 使用玻璃粉末A,烘烤时的最低粘度≥10 6 Pa,烘烤后的结晶度≥90质量%。 版权所有(C)2008,JPO&INPIT
    • 10. 发明专利
    • Solar cell
    • 太阳能电池
    • JP2014157950A
    • 2014-08-28
    • JP2013028478
    • 2013-02-16
    • Kyocera Corp京セラ株式会社
    • FURUKUBO YUYA
    • H01L31/06
    • Y02E10/50
    • PROBLEM TO BE SOLVED: To provide a solar cell capable of increasing photoelectric conversion efficiency, in a constitution including a quantum dot layer on a semiconductor substrate.SOLUTION: In a solar cell, a multilayer of quantum dot layers 5 including a plurality of quantum dots 5a are disposed on the main surface 3 of the light incident side of a semiconductor substrate 1. A quantum dot layer 5A of the light incident side has an occupied area ratio of the quantum dots 5a smaller than that of the quantum dots 5a in a quantum dot layer 5B of the semiconductor substrate 1 side. Accordingly, even when the quantum dot layers 5 are multilayered, light 6, such as sun light, easily transmits through the quantum dots 5a, and carriers can be sufficiently produced even in the quantum dot layer 5B of the semiconductor substrate 1 side, so that photoelectric conversion efficiency can be increased.
    • 要解决的问题:提供一种能够提高光电转换效率的太阳能电池,包括在半导体基板上的量子点层的结构。解决方案:在太阳能电池中,包括多个量子点的量子点层5的多层 5a设置在半导体衬底1的光入射侧的主表面3上。光入射侧的量子点层5A在量子点中的量子点5a的占据面积比小于量子点5a的占据面积比 半导体衬底1侧的点层5B。 因此,即使量子点层5多层化,太阳光等的光6容易透过量子点5a,即使在半导体基板1侧的量子点层5B中也能够充分地生成载流子, 光电转换效率可以提高。