专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2000195796A SUBSTRATE TREATING APPARATUS 失效
公开(公告)号：JP2000195796A
公开(公告)日：2000-07-14
申请号：JP37265398
申请日：1998-12-28
申请人： KOKUSAI ELECTRIC CO LTD
发明人： TAKADA MASATOSHI , IMAI YOSHINORI , YAMAGUCHI NOBUAKI
IPC分类号： H01L21/205
摘要： PROBLEM TO BE SOLVED: To easily and surely reduce the unwanted substance concn. by controlling evacuating means and gas purging means so as to repeat the vacuum evacuation and the atmospheric pressure recovery in the apparatus until a concn. measuring means provides a specified measured value or less. SOLUTION: A main controller 50 opens a fourth valve, a fourth oxygen concn. meter 41 measures the oxygen concn. in a first reactor chamber and sends measured value data to the main controller 50 after a time lapsed, an operation recipe control unit of the main controller 50 compares the measured value with a value of oxygen concn. preset in the operation recipe control unit through a main operating unit 51, the main controller 50 sends vacuum evacuation and atmospheric pressure recovery control continuing signals again to a sequencer 53 when the measured value exceeds the preset value of oxygen concn., the sequencer 53 opens an exhaust valve and again evacuates the first reactor chamber through a fourth exhaust pipe, and the vacuum evacuation and the atmospheric pressure recovery steps are repeated until the measured oxygen concn. value in the first reactor chamber is a specified value or less.

2. 发明专利

JPH11354398A METHOD OF PROCESSING WAFER 失效
公开(公告)号：JPH11354398A
公开(公告)日：1999-12-24
申请号：JP15949898
申请日：1998-06-08
申请人： KOKUSAI ELECTRIC CO LTD
发明人： NOGAMI SHIGEMOTO , HAYASHIBARA HIDEMOTO , TSURITANI CHIKAKO , YAMAGUCHI NOBUAKI
IPC分类号： H01L21/677 , H01L21/02 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide a processing method in a single-wafer processor, allowing the wafer processing condition to be checked at any time and, if abnormally processed, the stored position to be identified even after being stored in a cassette. SOLUTION: The processing method in a single-wafer processor having cassette chambers CM1, CM2 for carrying the wafer in and out, reaction chambers PM1, PM2, CS1, CS2 for processing the wafer, and wafer transfer chamber TM for transferring the wafer between the chambers, comprises treating one or two wafers according to a recipe from a recipe executing means 24, writing, as wafer information in memory means 28, the reaction chambers executing the process of the wafer and wafer processing procedures executed there one by one corresponding to each wafer under processing, recording their progress conditions, and writing the current position and current processing condition of the wafer. By updating the wafer information, the current position and process history of each wafer are stored, including the process under execution and can be displayed on a screen.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式