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1. 发明专利

JP2013030593A Semiconductor devices, semiconductor module structure formed by vertically laminated semiconductor devices, and manufacturing method of semiconductor module structure 审中-公开
标题翻译：半导体器件，通过垂直层叠半导体器件形成的半导体器件结构以及半导体器件结构的制造方法
公开(公告)号：JP2013030593A
公开(公告)日：2013-02-07
申请号：JP2011165200
申请日：2011-07-28
申请人： J Devices:Kk , 株式会社ジェイデバイス
发明人： YAMAGATA OSATAKE , KATSUMATA AKIO , INOUE KOJI , SAWACHI SHIGENORI , ITAKURA SATORU , YAMAJI YASUHIRO
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L24/97 , H01L24/19 , H01L24/24 , H01L24/29 , H01L24/32 , H01L24/82 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/24226 , H01L2224/2518 , H01L2224/29099 , H01L2224/2919 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/01029 , H01L2924/014 , H01L2924/078 , H01L2924/0951 , H01L2924/12041 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/1579 , H01L2924/15798 , H01L2924/00014 , H01L2224/82 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which forms a vertical lamination structure and enables LSI chips, having different sizes, to be easily and vertically laminated.SOLUTION: A semiconductor device includes: an organic substrate 1; a through via 4 penetrating through the organic substrate 1 in the thickness direction; an external electrode 5b and an internal electrode 5a provided on both surfaces of the organic substrate 1 and electrically connecting with the through via 4; a semiconductor element 2 mounted on one main surface of the organic substrate 1 through an adhesive layer 3 with an element circuit surface facing up; an insulation material layer 6 sealing the semiconductor element 2 and an area surrounding the semiconductor element 2; a metal thin film wiring layer 7 provided in the insulation material layer 6 and partially exposing on an external surface; a metal via 10 electrically connecting with the metal thin film wiring layer 7; and an external electrode 9 formed on the metal thin film wiring layer 7. The metal thin film wiring layer 7 electrically connects an electrode disposed on the element circuit surface of the semiconductor element 2, the internal electrode 5a, the metal via 10, and the external electrode 9 formed on the metal thin film wiring layer 7.
摘要翻译：要解决的问题：提供一种形成垂直层压结构的半导体器件，并且能够容易且垂直地层叠具有不同尺寸的LSI芯片。解决方案：半导体器件包括：有机衬底1; 穿过有机基板1的厚度方向的贯通孔4; 设置在有机基板1的两面并与通孔4电连接的外部电极5b和内部电极5a; 半导体元件2，其通过具有面向上的元件电路表面的粘合剂层3安装在有机基板1的一个主表面上; 密封半导体元件2的绝缘材料层6和围绕半导体元件2的区域; 设置在绝缘材料层6中并部分地暴露在外表面上的金属薄膜布线层7; 与金属薄膜布线层7电连接的金属通孔10; 以及形成在金属薄膜布线层7上的外部电极9.金属薄膜布线层7电连接设置在半导体元件2的元件电路表面上的电极，内部电极5a，金属通孔10和形成在金属薄膜布线层7上的外部电极9.版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2014093430A Semiconductor device, semiconductor laminated module structure, laminated module structure and manufacturing methods of those 有权
标题翻译：半导体器件，半导体层压模块结构，层压模块结构及其制造方法
公开(公告)号：JP2014093430A
公开(公告)日：2014-05-19
申请号：JP2012243276
申请日：2012-11-05
申请人： J Devices:Kk , 株式会社ジェイデバイス
发明人： INOUE KOJI , KATSUMATA AKIO , SAWACHI SHIGENORI , YAMAGATA OSATAKE
IPC分类号： H01L23/12 , H01L21/56 , H01L23/29 , H01L23/31 , H01L25/04 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L24/96 , H01L24/97 , H01L2224/12105 , H01L2224/19 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2224/82 , H01L2224/83 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which easily enables vertical lamination of LSI chips having different sizes from each other.SOLUTION: A semiconductor device comprises: an insulating substrate; a semiconductor element mounted on one principal surface of the insulating substrate with an element circuit surface up; a first insulating material layer A for encapsulating a top face of the element circuit surface of the semiconductor element and a top face of the insulating substrate around the element circuit surface; a first metal thin film wiring layer which is arranged on the first insulating material layer A and a part of which is exposed outside; a first insulating material layer B arranged on the first metal thin film wiring layer; a second insulating material layer arranged on the other principal surface of the insulating substrate; a second metal thin film wiring layer which is arranged in the second insulating material layer and a part of which is exposed outside; a via which pierces the insulating substrate and electrically connects the first metal thin film wiring layer and the second metal thin film wiring layer; and an external electrode formed on the first metal thin film wiring layer. The semiconductor device has a structure in which the second metal thin film wiring layer, an electrode arranged on the element circuit surface of the semiconductor element, the first metal thin film wiring layer, the via and the external electrode on the first metal thin film wiring layer are electrically connected.
摘要翻译：要解决的问题：提供一种容易实现彼此不同尺寸的LSI芯片的垂直层叠的半导体器件。解决方案：半导体器件包括：绝缘基板; 半导体元件安装在绝缘基板的一个主表面上，元件电路表面向上; 用于封装半导体元件的元件电路表面的顶面和围绕元件电路表面的绝缘基板的顶面的第一绝缘材料层A; 第一金属薄膜布线层，其布置在第一绝缘材料层A上并且其一部分暴露在外部; 布置在第一金属薄膜布线层上的第一绝缘材料层B; 布置在所述绝缘基板的另一个主表面上的第二绝缘材料层; 第二金属薄膜布线层，其布置在第二绝缘材料层中并且其一部分暴露在外部; 穿过所述绝缘基板并将所述第一金属薄膜布线层与所述第二金属薄膜布线层电连接的通孔; 以及形成在第一金属薄膜布线层上的外部电极。半导体器件具有这样的结构，其中第一金属薄膜布线层，布置在半导体元件的元件电路表面上的电极，第一金属薄膜布线层，通孔和外部电极在第一金属薄膜布线层电连接。

3. 发明专利

JP2013162071A Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013162071A
公开(公告)日：2013-08-19
申请号：JP2012025042
申请日：2012-02-08
申请人： J Devices:Kk , 株式会社ジェイデバイス
发明人： SAWACHI SHIGENORI , YAMAGATA OSATAKE , INOUE KOJI , ITAKURA SATORU , CHIKAI TOMOYA , HORI MASAHIKO , KATSUMATA AKIO
IPC分类号： H01L25/065 , H01L25/07 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L25/0657 , H01L23/49816 , H01L23/5384 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L24/97 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/06135 , H01L2224/12105 , H01L2224/24226 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48145 , H01L2224/73265 , H01L2224/73267 , H01L2224/82031 , H01L2224/82039 , H01L2224/92244 , H01L2225/06524 , H01L2225/06548 , H01L2225/06562 , H01L2225/06586 , H01L2225/06589 , H01L2225/1023 , H01L2225/1029 , H01L2225/1035 , H01L2924/12042 , H01L2924/12044 , H01L2924/15311 , H01L2924/00014 , H01L2924/00015 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which achieves downsizing by forming a plurality of semiconductor chips into a vertically-stacked structure; and to provide a semiconductor device manufacturing method in which the number of manufacturing processes is significantly reduced.SOLUTION: A semiconductor device comprises: a semiconductor element 2; a support substrate 1; an insulating material layer 4 for encapsulating the semiconductor element 2 and surroundings of the semiconductor element 2; a metal thin film wiring layer 6 provided in the insulating material layer 4 and a part of which is exposed on an outer surface; and a metal via 9 provided in the insulating material layer 4 and electrically connected to the metal thin film wiring layer 6. There is a plurality of numbers of semiconductor elements 2. Each semiconductor element 2 is stacked via an insulating material such that a circuit surface faces the metal thin film wiring layer 6 side. Electrode pads of each semiconductor element 2 are exposed without being shielded by another semiconductor element stacked thereon and electrically connected with the metal thin film wiring layer.
摘要翻译：要解决的问题：提供一种通过将多个半导体芯片形成为垂直堆叠结构来实现小型化的半导体器件; 并且提供其中制造工艺的数量显着减少的半导体器件制造方法。解决方案：半导体器件包括：半导体元件2; 支撑基板1; 用于封装半导体元件2和半导体元件2的周围的绝缘材料层4; 设置在绝缘材料层4中并且其一部分暴露在外表面上的金属薄膜布线层6; 以及设置在绝缘材料层4中并电连接到金属薄膜布线层6的金属通孔9.多个半导体元件2.多个半导体元件2通过绝缘材料堆叠，使得电路表面面向金属薄膜布线层6侧。每个半导体元件2的电极焊盘暴露而不被另一个堆叠在其上的半导体元件屏蔽，并与金属薄膜布线层电连接。

4. 发明专利

JP2014220537A 半導体装置有权
标题翻译：半导体器件
公开(公告)号：JP2014220537A
公开(公告)日：2014-11-20
申请号：JP2014172343
申请日：2014-08-27
申请人：株式会社ジェイデバイス , J Devices:Kk , 株式会社東芝 , Toshiba Corp
发明人： IMAIZUMI YUKARI , KAWAZU TAKESHI , KUDO ISAO , KATSUMATA AKIO , HIRUTA YOICHI
IPC分类号： H01L23/29
CPC分类号： H01L2224/16145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73204 , H01L2224/73265 , H01L2225/06562 , H01L2924/15311 , H01L2924/1815 , H01L2924/00014 , H01L2924/00
摘要：【課題】本発明は、半導体素子動作時の熱を効果的に封止部材内部に拡散させ、半導体装置の放熱性の向上、熱抵抗の低減を実現する半導体装置を提供する。【解決手段】半導体装置において、基板と、基板上に配置される半導体素子と、半導体素子上に配置される放熱部材と、基板の上部と、半導体素子と、放熱部材とを被覆する封止部材とを備え、放熱部材の半導体素子に配置される面の表面積は、半導体素子の放熱部材が配置される面の表面積よりも大きいことを特徴とする。本発明に係る半導体装置によれば、封止部材内部に放熱部材を埋め込むことによって、従来の放熱部材より小さな面積の放熱部材によって半導体素子動作時の熱を効果的に封止部材内部に拡散させ、半導体装置の放熱性を向上させ、熱抵抗の低減を図ることが可能となる。【選択図】図4
摘要翻译：要解决的问题：提供一种将半导体元件的工作中产生的热量有效地分散在密封部件中的半导体器件，提高半导体器件的散热性能，降低耐热性。解决方案：半导体器件包括基板，设置在所述基板上的半导体元件，设置在所述半导体元件上的散热构件，以及覆盖所述基板的上部，所述半导体元件和所述散热构件的密封构件。设置在散热元件的半导体元件上的表面的表面积大于设置有半导体元件的散热构件的表面的表面积。根据本发明的半导体装置，散热构件被埋在密封构件的内部，从而通过散热构件将半导体元件的操作期间产生的热量有效地分散到密封构件的面积小于传统的散热构件，提高半导体器件的散热性能，降低耐热性。

5. 发明专利

JP2014082245A Semiconductor storage device and method of manufacturing the same 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：JP2014082245A
公开(公告)日：2014-05-08
申请号：JP2012227643
申请日：2012-10-15
申请人： J Devices:Kk , 株式会社ジェイデバイス
发明人： ITAKURA SATORU , KATSUMATA AKIO , UMEKI AKIHIRO , SHIRAISHI YASUSHI , ABE JUNICHIRO
IPC分类号： H01L25/10 , H01L25/00 , H01L25/11 , H01L25/18
CPC分类号： G11C16/30 , G06F3/00 , G11C5/02 , G11C5/025 , G11C5/06 , G11C5/063 , G11C7/10 , G11C7/1069 , G11C11/4096 , H01L22/10 , H01L25/0657 , H01L25/105 , H01L25/18 , H01L2224/16225 , H01L2225/06562 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2924/19105
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor storage device that enables modularization of a power supply IC and various kinds of passive elements, and that can deal with reduction in a controller power supply voltage and pluralization of power supplies for a controller and a NAND type flash memory.SOLUTION: A semiconductor storage device 100 is configured by: a controller package 110 having a BGA terminal on a rear face; and one or more memory packages 120 mounted on the controller package and each having a plurality of semiconductor storage elements. The controller package includes: a substrate having the BGA terminal on a rear face; a power supply IC mounted on a bottom substrate and supplying a plurality of power supplies; and a controller mounted on the bottom substrate, operated by a plurality of power supplies from the power supply IC, providing an interface with an external system via the BGA terminal, and controlling reading and writing operations to the semiconductor storage elements.
摘要翻译：要解决的问题：提供一种能够模块化电源IC和各种无源元件的半导体存储装置，并且可以减少控制器电源电压和多个用于控制器和NAND型的电源闪存。解决方案：半导体存储设备100通过以下方式配置：控制器组件110，其背面具有BGA终端; 以及安装在控制器封装上并且每个具有多个半导体存储元件的一个或多个存储器封装120。所述控制器封装包括：背面具有所述BGA端子的基板; 电源IC，其安装在底部基板上并供给多个电源; 以及安装在底部基板上的控制器，由来自电源IC的多个电源操作，经由BGA端子提供与外部系统的接口，以及控制对半导体存储元件的读取和写入操作。

6. 发明专利

JP2012033559A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2012033559A
公开(公告)日：2012-02-16
申请号：JP2010169574
申请日：2010-07-28
申请人： J Devices:Kk , Toshiba Corp , 株式会社ジェイデバイス , 株式会社東芝
发明人： IMAIZUMI YUKARI , KAWAZU TAKESHI , KUDO ISAO , KATSUMATA AKIO , HIRUTA YOICHI
IPC分类号： H01L23/36 , H01L23/34
CPC分类号： H01L23/4334 , H01L23/3128 , H01L24/16 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L2224/05554 , H01L2224/16145 , H01L2224/29036 , H01L2224/291 , H01L2224/2919 , H01L2224/29339 , H01L2224/30505 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06589 , H01L2924/01014 , H01L2924/01019 , H01L2924/01047 , H01L2924/01079 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device effectively dispersing heat generated during the operation of a semiconductor element into a sealing member, improving a heat radiating property of the semiconductor device, and reducing heat resistance.SOLUTION: A semiconductor device comprises a substrate, a semiconductor element disposed on the substrate, a heat radiating member disposed on the semiconductor element, and a sealing member covering an upper part of the substrate, the semiconductor element, and the heat radiating member. The surface area of a surface disposed on the semiconductor element of the heat radiating element is larger than the surface area of a surface on which the heat radiating member of the semiconductor element is disposed. According to the semiconductor device of this invention, the heat radiating member is buried in the inside of the sealing member, thereby effectively dispersing heat generated during the operation of the semiconductor element into the sealing member by the heat radiating member with a smaller area than a conventional heat radiating member, improving the heat radiating property of the semiconductor device, and reducing heat resistance.
摘要翻译：解决的问题：为了提供将半导体元件的工作中产生的热量有效地分散在密封部件中的半导体器件，提高半导体器件的散热性，降低耐热性。解决方案：半导体器件包括衬底，设置在衬底上的半导体元件，设置在半导体元件上的散热构件和覆盖衬底的上部，半导体元件和散热的密封构件会员。设置在散热元件的半导体元件上的表面的表面积大于设置有半导体元件的散热构件的表面的表面积。根据本发明的半导体装置，散热构件被埋在密封构件的内部，从而通过散热构件将半导体元件的操作期间产生的热量有效地分散到密封构件的面积小于传统的散热构件，提高半导体器件的散热性能，降低耐热性。版权所有（C）2012，JPO＆INPIT

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